|
libTriton version 1.0 build 1592
|
[internal] List of the supported semantics for the RV32 and RV64 architectures.
| Mnemonic | Description |
|---|---|
| ADD | Add (register) |
| ADDI (pseudo: MV, NOP) | Add (immediate) |
| ADDIW (pseudo: SEXT.W) | Add word (immediate) / 64-bit only / |
| ADDW | Add word (register) / 64-bit only / |
| AND | And (register) |
| ANDI | And (immediate) |
| AUIPC | Add upper intermediate to pc |
| BEQ (pseudo: BEQZ) | Branch if equal |
| BGE (pseudo: BLEZ, BGEZ) | Branch if greater or equal |
| BGEU | Branch if greater or equal (unsigned) |
| BLT (pseudo: BLTZ, BGTZ) | Branch if less |
| BLTU | Branch if less (unsigned) |
| BNE (pseudo: BNEZ) | Branch if not equal |
| DIV | Signed integer division |
| DIVU | Unsigned integer division |
| DIVUW | Word unsigned integer division / 64-bit only / |
| DIVW | Word signed integer division / 64-bit only / |
| JAL (pseudo: J) | Jump and link |
| JALR (pseudo: JR, RET) | Jump and link register |
| LB | Load register signed byte |
| LBU | Load register unsigned byte |
| LD | Load register double word / 64-bit only / |
| LH | Load register signed halfword |
| LHU | Load register unsigned halfword |
| LUI | Load upper intermediate |
| LW | Load register signed word |
| LWU | Load register unsigned word / 64-bit only / |
| MUL | Signed multiply |
| MULH | Signed multiply high |
| MULHSU | Signed-unsigned multiply high |
| MULHU | Unsigned multiply high |
| MULW | Word multiply / 64-bit only / |
| OR | Or (register) |
| ORI | Or (immediate) |
| REM | Signed integer reminder |
| REMU | Unsigned integer reminder |
| REMUW | Word unsigned integer reminder / 64-bit only / |
| REMW | Word signed integer reminder / 64-bit only / |
| SB | Store register byte |
| SD | Store register double word / 64-bit only / |
| SH | Store register halfword |
| SLL | Logical left shift (register) |
| SLLI | Logical left shift (immediate) |
| SLLIW | Word logical left shift (immediate) / 64-bit only / |
| SLLW | Word logical left shift (register) |
| SLT (pseudo: SLTZ, SGTZ) | Set if less than register |
| SLTI | Set if less than immediate |
| SLTIU (pseudo: SEQZ) | Set if less than immediate (unsigned) |
| SLTU (pseudo: SNEZ) | Set if less than register (unsigned) |
| SRA | Arithmetic right shift (register) |
| SRAI | Arithmetic right shift (immediate) |
| SRAIW | Word arithmetic right shift (register) / 64-bit only / |
| SRAW | Word arithmetic right shift (immediate) / 64-bit only / |
| SRL | Logical right shift (register) |
| SRLI | Logical right shift (immediate) |
| SRLIW | Word logical right shift (register) / 64-bit only / |
| SRLW | Word logical right shift (immediate) / 64-bit only / |
| SUB (pseudo: NEG) | Subtract |
| SUBW (pseudo: NEGW) | Subtract word / 64-bit only / |
| SW | Store register word |
| XOR | Exclusive or (register) |
| XORI (pseudo: NOT) | Exclusive or (immediate) |
| Mnemonic (compressed inst.) | Description |
|---|---|
| C.ADD | Add (register) |
| C.ADDI | Add (immediate) |
| C.ADDI16SP | Add to SP (immediate, multiplied by 16) |
| C.ADDI4SPN | Add to SP (immediate, multiplied by 4) |
| C.ADDIW | Add word (immediate) / 64-bit only / |
| C.ADDW | Add word (register) / 64-bit only / |
| C.AND | And (register) |
| C.ANDI | And (immediate) |
| C.BEQZ | Branch if equal to zero |
| C.BNEZ | Branch if not equal to zero |
| C.J | Jump |
| C.JAL | Jump and link / 32-bit only / |
| C.JALR | Jump and link register |
| C.JR | Jump register |
| C.LD | Load register double word / 64-bit only / |
| C.LDSP | Load register double word from SP / 64-bit only / |
| C.LI | Load immediate |
| C.LUI | Load upper intermediate |
| C.LW | Load register signed word |
| C.LWSP | Load register word from SP / 64-bit only / |
| C.MV | Move register |
| C.NOP | No operation |
| C.OR | Or (register) |
| C.SD | Store register double word / 64-bit only / |
| C.SDSP | Store register double word to SP / 64-bit only / |
| C.SLLI | Logical left shift (immediate) |
| C.SRAI | Arithmetic right shift (immediate) |
| C.SRLI | Logical right shift (immediate) |
| C.SUB | Subtract |
| C.SUBW | Subtract word / 64-bit only / |
| C.SW | Store register word |
| C.SWSP | Store register word to SP |
| C.XOR | Exclusive or (register) |
1.10.0