[internal] List of the supported semantics for the x86 and x86-64 architectures.

Mnemonic	Extensions	Description
AAA		ASCII Adjust After Addition
AAD		ASCII Adjust AX Before Division
AAM		ASCII Adjust AX After Multiply
AAS		ASCII Adjust AL After Subtraction
ADC		Add with Carry
ADCX	adx	Unsigned Integer Addition of Two Operands with Carry Flag
ADD		Add
AND		Logical AND
ANDN	bmi1	Logical AND NOT
ANDNPD	sse2	Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
ANDNPS	sse1	Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values
ANDPD	sse2	Bitwise Logical AND of Packed Double-Precision Floating-Point Values
ANDPS	sse1	Bitwise Logical AND of Packed Single-Precision Floating-Point Values
BEXTR	bmi1/tbm	Bit Field Extract
BLSI	bmi1	Extract Lowest Set Isolated Bit
BLSMSK	bmi1	Get Mask Up to Lowest Set Bit
BLSR	bmi1	Reset Lowest Set Bit
BSF		Bit Scan Forward
BSR		Bit Scan Reverse
BSWAP		Byte Swap
BT		Bit Test
BTC		Bit Test and Complement
BTR		Bit Test and Reset
BTS		Bit Test and Set
CALL		Call Procedure
CBW		Convert byte (al) to word (ax)
CDQ		Convert dword (eax) to qword (edx:eax)
CDQE		Convert dword (eax) to qword (rax)
CLC		Clear Carry Flag
CLD		Clear Direction Flag
CLFLUSH	sse2	Flush Cache Line
CLI		Clear Interrupt Flag
CLTS		Clear Task-Switched Flag in CR0
CMC		Complement Carry Flag
CMOVA		Move if not below
CMOVAE		Move if not below or equal
CMOVB		Move if below
CMOVBE		Move if below or equal
CMOVE		Move if zero
CMOVG		Move if not less
CMOVGE		Move if not less or equal
CMOVL		Move if less
CMOVLE		Move if less or equal
CMOVNE		Move if not zero
CMOVNO		Move if not overflow
CMOVNP		Move if not parity
CMOVNS		Move if not sign
CMOVO		Move if overflow
CMOVP		Move if parity
CMOVS		Move if sign
CMP		Compare Two Operands
CMPSB		Compare byte at address
CMPSD		Compare doubleword at address
CMPSQ		Compare quadword at address
CMPSW		Compare word at address
CMPXCHG		Compare and Exchange
CMPXCHG16B		Compare and Exchange 16 Bytes
CMPXCHG8B		Compare and Exchange 8 Bytes
CPUID		CPU Identification
CQO		Convert qword (rax) to oword (rdx:rax)
CWD		Convert word (ax) to dword (dx:ax)
CWDE		Convert word (ax) to dword (eax)
DEC		Decrement by 1
DIV		Unsigned Divide
ENDBR32		No Operation
ENDBR64		No Operation
EXTRACTPS	sse4.1	Extract Packed Single Precision Floating-Point Value
IDIV		Signed Divide
IMUL		Signed Multiply
INC		Increment by 1
INVD		Invalidate Internal Caches
INVLPG		Invalidate TLB Entry
JA		Jump if not below (Jump if above)
JAE		Jump if not below or equal (Jump if above or equal)
JB		Jump if below
JBE		Jump if below or equal
JCXZ		Jump if cx is zero
JE		Jump if zero (Jump if equal)
JECXZ		Jump if ecx is zero
JG		Jump if not less or equal (Jump if greater)
JGE		Jump if not less (Jump if not less)
JL		Jump if less
JLE		Jump if less or equal
JMP		Jump
JNE		Jump if not equal
JNO		Jump if not overflow
JNP		Jump if not parity
JNS		Jump if not sign
JO		Jump if overflow
JP		Jump if parity
JRCXZ		Jump if rcx is zero
JS		Jump if sign
LAHF		Load Status Flags into AH Register
LDDQU	sse3	Load Unaligned Integer 128 Bits
LDMXCSR	sse1	Load MXCSR Register
LEA		Load Effective Address
LEAVE		High Level Procedure Exit
LFENCE	sse2	Load Fence
LODSB		Load byte at address
LODSD		Load doubleword at address
LODSQ		Load quadword at address
LODSW		Load word at address
LOOP		Loop According to ECX Counter
LZCNT		Count the Number of Leading Zero Bits
FXRSTOR	sse1	Restore the x87 FPU, MMX, XMM, and MXCSR register state from m512byte
FXRSTOR64	sse1	Restore the x87 FPU, MMX, XMM, and MXCSR register state from m512byte (REX.W = 1)
FXSAVE	sse1	Save the x87 FPU, MMX, XMM, and MXCSR register state to m512byte
FXSAVE64	sse1	Save the x87 FPU, MMX, XMM, and MXCSR register state to m512byte (REX.W = 1)
INT3		Generate breakpoint trap.
MFENCE	sse2	Memory Fence
MOV		Move
MOVABS		Move
MOVAPD	sse2	Move Aligned Packed Double-Precision Floating-Point Values
MOVAPS	sse1	Move Aligned Packed Single-Precision Floating-Point Values
MOVBE	mmx/sse2	Move Data After Swapping Bytes
MOVD	mmx/sse2	Move Doubleword
MOVDDUP	sse3	Move One Double-FP and Duplicate
MOVDQ2Q	sse2	Move Quadword from XMM to MMX Technology Register
MOVDQA	sse2	Move Aligned Double Quadword
MOVDQU	sse2	Move Unaligned Double Quadword
MOVHLPS	sse1	Move Packed Single-Precision Floating-Point Values High to Low
MOVHPD	sse2	Move High Packed Double-Precision Floating-Point Values
MOVHPS	sse1	Move High Packed Single-Precision Floating-Point Values
MOVLHPS	sse1	Move Packed Single-Precision Floating-Point Values Low to High
MOVLPD	sse2	Move Low Packed Double-Precision Floating-Point Values
MOVLPS	sse1	Move Low Packed Single-Precision Floating-Point Values
MOVMSKPD	sse2	Extract Packed Double-Precision Floating-Point Sign Mask
MOVMSKPS	sse1	Extract Packed Single-Precision Floating-Point Sign Mask
MOVNTDQ	sse2	Store Double Quadword Using Non-Temporal Hint
MOVNTI	sse2	Store Doubleword Using Non-Temporal Hint
MOVNTPD	sse2	Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
MOVNTPS	sse1	Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint
MOVNTQ	sse1	Store of Quadword Using Non-Temporal Hint
MOVQ	mmx/sse2	Move Quadword
MOVQ2DQ	sse2	Move Quadword from MMX Technology to XMM Register
MOVSB		Move byte at address
MOVSD		Move doubleword at address
MOVSHDUP	sse3	Move Packed Single-FP High and Duplicate
MOVSLDUP	sse3	Move Packed Single-FP Low and Duplicate
MOVSQ		Move quadword at address
MOVSW		Move word at address
MOVSX		Move with Sign-Extension
MOVSXD		Move with Sign-Extension
MOVUPD	see2	Move Unaligned Packed Double-Precision Floating- Point Values
MOVUPS	see1	Move Unaligned Packed Single-Precision Floating- Point Values
MOVSS	sse1	Move Scalar Single-Precision Floating- Point Values
MOVZX		Move with Zero-Extend
MUL		Unsigned Multiply
MULX	bmi2	Unsigned Multiply Without Affecting Flags
NEG		Two's Complement Negation
NOP		No Operation
NOT		One's Complement Negation
OR		Logical Inclusive OR
ORPD	sse2	Bitwise Logical OR of Double-Precision Floating-Point Values
ORPS	sse1	Bitwise Logical OR of Single-Precision Floating-Point Values
PACKUSWB	mmx/sse2	Pack with Unsigned Saturation
PACKSSDW	mmx/sse2	Pack with Signed Saturation
PACKSSWB	mmx/sse2	Pack with Signed Saturation
PADDB	mmx/sse2	Add packed byte integers
PADDD	mmx/sse2	Add packed doubleword integers
PADDQ	mmx/sse2	Add packed quadword integers
PADDW	mmx/sse2	Add packed word integers
PALIGNR	sse3	Packed Align Right
PAND	mmx/sse2	Logical AND
PANDN	mmx/sse2	Logical AND NOT
PAUSE	sse2	Spin Loop Hint
PAVGB	sse1	Average Packed Unsigned Byte Integers
PAVGW	sse1	Average Packed Unsigned Word Integers
PCMPEQB	mmx/sse2	Compare Packed Data for Equal (bytes)
PCMPEQD	mmx/sse2	Compare Packed Data for Equal (dwords)
PCMPEQW	mmx/sse2	Compare Packed Data for Equal (words)
PCMPGTB	mmx/sse2	Compare Packed Data for Greater Than (bytes)
PCMPGTD	mmx/sse2	Compare Packed Data for Greater Than (dwords)
PCMPGTW	mmx/sse2	Compare Packed Data for Greater Than (words)
PEXTRB	sse4.1	Extract Byte
PEXTRD	sse4.1	Extract Dword
PEXTRQ	sse4.1	Extract Qword
PEXTRW	sse4.1	Extract Word
PINSRB	sse4.1	Insert Byte
PINSRD	sse4.1	Insert Dword
PINSRQ	sse4.1	Insert Qword
PINSRW	sse2	Insert Word
PMADDWD	mmx/sse2	Multiply and Add Packed Integers
PMAXSB	sse4.1	Maximum of Packed Signed Byte Integers
PMAXSD	sse4.1	Maximum of Packed Signed Doubleword Integers
PMAXSW	sse1	Maximum of Packed Signed Word Integers
PMAXUB	sse1	Maximum of Packed Unsigned Byte Integers
PMAXUD	sse4.1	Maximum of Packed Unsigned Doubleword Integers
PMAXUW	sse4.1	Maximum of Packed Unsigned Word Integers
PMINSB	sse4.1	Minimum of Packed Signed Byte Integers
PMINSD	sse4.1	Minimum of Packed Signed Doubleword Integers
PMINSW	sse1	Minimum of Packed Signed Word Integers
PMINUB	sse1	Minimum of Packed Unsigned Byte Integers
PMINUD	sse4.1	Minimum of Packed Unsigned Doubleword Integers
PMINUW	sse4.1	Minimum of Packed Unsigned Word Integers
PMOVMSKB	sse1	Move Byte Mask
PMOVSXBD	sse4.1	Sign Extend 4 Packed Signed 8-bit Integers
PMOVSXBQ	sse4.1	Sign Extend 2 Packed Signed 8-bit Integers
PMOVSXBW	sse4.1	Sign Extend 8 Packed Signed 8-bit Integers
PMOVSXDQ	sse4.1	Sign Extend 2 Packed Signed 32-bit Integers
PMOVSXWD	sse4.1	Sign Extend 4 Packed Signed 16-bit Integers
PMOVSXWQ	sse4.1	Sign Extend 2 Packed Signed 16-bit Integers
PMOVZXBD	sse4.1	Zero Extend 4 Packed Signed 8-bit Integers
PMOVZXBQ	sse4.1	Zero Extend 2 Packed Signed 8-bit Integers
PMOVZXBW	sse4.1	Zero Extend 8 Packed Signed 8-bit Integers
PMOVZXDQ	sse4.1	Zero Extend 2 Packed Signed 32-bit Integers
PMOVZXWD	sse4.1	Zero Extend 4 Packed Signed 16-bit Integers
PMOVZXWQ	sse4.1	Zero Extend 2 Packed Signed 16-bit Integers
PMULHW	sse4.1	Multiply Packed Signed Integers and Store High Result
PMULLD	sse4.1	Multiply Packed Integers and Store Low Result
PMULLW	sse4.1	Multiply Packed Signed Integers and Store Low Result
PMULUDQ	sse2	Multiply Unsigned Doubleword Integer
POP		Pop a Value from the Stack
POPCNT		Count Number of Bits Set to 1
POPAL/POPAD		Pop All General-Purpose Registers
POPF		Pop Stack into lower 16-bit of EFLAGS Register
POPFD		Pop Stack into EFLAGS Register
POPFQ		Pop Stack into RFLAGS Register
POR	mmx/sse2	Bitwise Logical OR
PREFETCH	3DNow	Move data from m8 closer to the processor without expecting to write back
PREFETCHNTA	mmx/sse1	Move data from m8 closer to the processor using NTA hint
PREFETCHT0	mmx/sse1	Move data from m8 closer to the processor using T0 hint
PREFETCHT1	mmx/sse1	Move data from m8 closer to the processor using T1 hint
PREFETCHT2	mmx/sse1	Move data from m8 closer to the processor using T2 hint
PREFETCHW	3DNow	Move data from m8 closer to the processor in anticipation of a write
PSHUFB	sse3	Shuffle bytes according to contents
PSHUFD	sse2	Shuffle Packed Doublewords
PSHUFHW	sse2	Shuffle Packed High Words
PSHUFLW	sse2	Shuffle Packed Low Words
PSHUFW	sse1	Shuffle Packed Words
PSLLD	mmx/ssed2	Shift Doubleword Left Logical
PSLLDQ	sse2	Shift Double Quadword Left Logical
PSLLQ	mmx/ssed2	Shift Quadword Left Logical
PSLLW	mmx/ssed2	Shift Word Left Logical
PSRAD	mmx/ssed2	Shift Packed Doubleword Right Arithmetic
PSRAW	mmx/ssed2	Shift Packed Word Right Arithmetic
PSRLD	sse2	Shift Packed Doubleword Right Logical
PSRLDQ	sse2	Shift Double Quadword Right Logical
PSRLQ	sse2	Shift Quadword Right Logical
PSRLW	sse2	Shift Word Right Logical
PSUBB	mmx/sse2	Subtract packed byte integers
PSUBD	mmx/sse2	Subtract packed doubleword integers
PSUBQ	mmx/sse2	Subtract packed quadword integers
PSUBW	mmx/sse2	Subtract packed word integers
PTEST	sse4.1	Logical Compare
PUNPCKHBW	mmx,sse2	Unpack High Data (Unpack and interleave high-order bytes)
PUNPCKHDQ	mmx,sse2	Unpack High Data (Unpack and interleave high-order doublewords)
PUNPCKHQDQ	sse2	Unpack High Data (Unpack and interleave high-order quadwords)
PUNPCKHWD	mmx,sse2	Unpack High Data (Unpack and interleave high-order words)
PUNPCKLBW	mmx,sse2	Unpack Low Data (Unpack and interleave low-order bytes)
PUNPCKLDQ	mmx,sse2	Unpack Low Data (Unpack and interleave low-order doublewords)
PUNPCKLQDQ	sse2	Unpack Low Data (Unpack and interleave low-order quadwords)
PUNPCKLWD	mmx,sse2	Unpack Low Data (Unpack and interleave low-order words)
PUSH		Push a Value onto the Stack
PUSHAL/PUSHAD		Push All General-Purpose Registers
PUSHFD		Push EFLAGS Register onto the Stack
PUSHFQ		Push RFLAGS Register onto the Stack
PXOR	mmx/sse2	Logical Exclusive OR
RCL		Rotate Left with Carry
RCR		Rotate Right with Carry
RDTSC		Read Time-Stamp Counter
RET		Return from Procedure
ROL		Rotate Left
ROR		Rotate Right
RORX	bmi2	Rotate Right Logical Without Affecting Flags
SAHF		Store AH into Flags
SAL		Shift Left
SAR		Shift Right Signed
SARX	bmi2	Shift arithmetic right without affecting flags
SBB		Integer Subtraction with Borrow
SCASB		Scan byte at address
SCASD		Scan doubleword at address
SCASQ		Scan quadword at address
SCASW		Scan word at address
SETA		Set byte if above
SETAE		Set byte if above or equal
SETB		Set byte if below
SETBE		Set byte if below or equal
SETE		Set byte if zero
SETG		Set byte if greater
SETGE		Set byte if greater or equal
SETL		Set byte if less
SETLE		Set byte if less or equal
SETNE		Set byte if not zero
SETNO		Set byte if not overflow
SETNP		Set byte if not parity
SETNS		Set byte if not sign
SETO		Set byte if overflow
SETP		Set byte if parity
SETS		Set byte if sign
SFENCE	sse1	Store Fence
SHL		Shift Left
SHLD		Double-precision Shift Left
SHLX	bmi2	Shift Logical Left Without Affecting Flags
SHR		Shift Right Unsigned
SHRD		Double Precision Shift Right
SHRX	bmi2	Shift Logical Right Without Affecting Flags
STC		Set Carry Flag
STD		Set Direction Flag
STI		Set Interrupt Flag
STMXCSR	sse1	Store MXCSR Register State
STOSB		Store byte at address
STOSD		Store doubleword at address
STOSQ		Store quadword at address
STOSW		Store word at address
SUB		Subtract
SYSCALL		Fast System Call
SYSENTER		Fast System Call
TEST		Logical Compare
TZCNT	bmi1	Count the Number of Trailing Zero Bits
UNPCKHPD	sse2	Unpack and Interleave High Packed Double- Precision Floating-Point Values
UNPCKHPS	sse1	Unpack and Interleave High Packed Single-Precision Floating-Point Values
UNPCKLPD	sse2	Unpack and Interleave Low Packed Double-Precision Floating-Point Values
UNPCKLPS	sse1	Unpack and Interleave Low Packed Single-Precision Floating-Point Values
VERR		Set ZF=1 if segment specified with r/m16 can be read
VERW		Set ZF=1 if segment specified with r/m16 can be written
VEXTRACTI128	avx2	VEX Extract Packed Integer Values
VMOVD	avx	VEX Move Doubleword
VMOVDQA	avx	VEX Move aligned packed integer values
VMOVDQU	avx	VEX Move unaligned packed integer values
VMOVNTDQ	avx	VEX Store Double Quadword Using Non-Temporal Hint
VMOVQ	avx	VEX Move Quadword
VMOVSD	avx	VEX Move or Merge Scalar Double-Precision Floating-Point Value
VMOVAPS	avx	VEX Move Aligned Packed Single-Precision Floating-Point Values
VMOVUPS	avx	VEX Move Unaligned Packed Single-Precision Floating-Point Values
VPACKUSWB	avx/avx2	VEX Pack with Unsigned Saturation
VPACKSSDW	avx/avx2	VEX Pack with Signed Saturation
VPACKSSWB	avx/avx2	VEX Pack with Signed Saturation
VPADDB	avx/avx2	VEX Add Packed Byte Integers
VPADDD	avx/avx2	VEX Add Packed Doubleword Integers
VPADDW	avx/avx2	VEX Add Packed Word Integers
VPAND	avx/avx2	VEX Logical AND
VPANDN	avx/avx2	VEX Logical AND NOT
VPERM2I128	avx2	VEX Permute Integer Values
VPERMQ	avx2	VEX Qwords Element Permutation
VPEXTRB	avx/avx2	VEX Extract Byte
VPEXTRD	avx/avx2	VEX Extract Dword
VPEXTRQ	avx/avx2	VEX Extract Qword
VPEXTRW	avx/avx2	VEX Extract Word
VPBROADCASTB	avx2	VEX Load Byte Integer and broadcast
VPCMPEQB	avx/avx2	VEX Compare packed Bytes for equality
VPCMPEQD	avx/avx2	VEX Compare packed Doublewords for equality
VPCMPEQQ	avx/avx2	VEX Compare packed Quadwords for equality
VPCMPEQW	avx/avx2	VEX Compare packed Words for equality
VPCMPGTB	avx/avx2	VEX Compare Packed Bytes for Greater Than
VPCMPGTD	avx/avx2	VEX Compare Packed Doublewords for Greater Than
VPCMPGTW	avx/avx2	VEX Compare Packed Words for Greater Than
VPMADDWD	avx/avx	VEX Multiply and Add Packed Integers
VPMOVMSKB	avx/avx2	VEX Move Byte Mask
VPMINUB	avx/avx2	VEX Minimum of Packed Unsigned Byte Integers
VPMULHW	avx/avx2	VEX Multiply Packed Signed Integers and Store High Result
VPMULLW	avx/avx2	VEX Multiply Packed Signed Integers and Store Low Result
VPOR	avx/avx2	VEX Logical OR
VPSHUFD	avx/avx2	VEX Shuffle Packed Doublewords
VPSIGNW	avx/avx2	VEX Packed SIGN
VPSLLDQ	avx/avx2	VEX Shift Packed Double Quadword Left Logical
VPSLLW	avx/avx2	VEX Shift Packed Word Left Logical
VPSRAD	avx/avx2	VEX Shift Packed Doubleword Right Arithmetic
VPSRAW	avx/avx2	VEX Shift Packed Word Right Arithmetic
VPSRLDQ	avx/avx2	VEX Shift Packed Double Quadword Right Logical
VPSRLW	avx/avx2	VEX Shift Packed Word Right Logical
VPSUBB	avx/avx2	VEX Subtract packed Byte integers
VPSUBD	avx/avx2	VEX Subtract packed Doubleword integers
VPSUBQ	avx/avx2	VEX Subtract packed Quadword integers
VPSUBW	avx/avx2	VEX Subtract packed Word integers
VPTEST	avx	VEX Logical Compare
VPUNPCKHBW	avx/avx2	VEX Unpack High Data (Unpack and interleave high-order bytes)
VPUNPCKHDQ	avx/avx2	VEX Unpack High Data (Unpack and interleave high-order doublewords)
VPUNPCKHQDQ	avx/avx2	VEX Unpack High Data (Unpack and interleave high-order quadwords)
VPUNPCKHWD	avx/avx2	VEX Unpack High Data (Unpack and interleave high-order words)
VPUNPCKLBW	avx/avx2	VEX Unpack Low Data (Unpack and interleave low-order bytes)
VPUNPCKLDQ	avx/avx2	VEX Unpack Low Data (Unpack and interleave low-order doublewords)
VPUNPCKLQDQ	avx/avx2	VEX Unpack Low Data (Unpack and interleave low-order quadwords)
VPUNPCKLWD	avx/avx2	VEX Unpack Low Data (Unpack and interleave low-order words)
VPXOR	avx/avx2	VEX Logical XOR
VXORPS	avx	VEX Bitwise Logical XOR for Single-Precision Floating-Point Values
WAIT		Wait
WBINVD		Write Back and Invalidate Cache
XADD		Exchange and Add
XCHG		Exchange Register/Memory with Register
XOR		Logical Exclusive OR
XORPD	sse2	Bitwise Logical XOR for Double-Precision Floating-Point Values
XORPS	sse1	Bitwise Logical XOR for Single-Precision Floating-Point Values