Go to the source code of this file.
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#define | REG_SPEC(UPPER_NAME, LOWER_NAME, X86_64_UPPER, X86_64_LOWER, X86_64_PARENT, X86_UPPER, X86_LOWER, X86_PARENT, X86_AVAIL) |
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#define | REG_SPEC_NO_CAPSTONE REG_SPEC |
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#define | REG_SPEC(UPPER_NAME, LOWER_NAME, _1, _2, _3, X86_UPPER, X86_LOWER, X86_PARENT, X86_AVAIL) |
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#define | REG_SPEC_NO_CAPSTONE REG_SPEC |
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#define | REG_SPEC(UPPER_NAME, _1, _2, _3, _4, _5, _6, _7, _8) |
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#define | REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6, _7, _8, _9) |
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◆ REG_SPEC [1/3]
#define REG_SPEC |
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| UPPER_NAME, |
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| _1, |
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| _2, |
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| _3, |
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| _4, |
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| _5, |
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| _6, |
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| _7, |
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| _8 ) |
Value: case triton::extlibs::capstone::X86_REG_##UPPER_NAME: \
tritonId = triton::arch::ID_REG_X86_##UPPER_NAME; \
break;
◆ REG_SPEC [2/3]
#define REG_SPEC |
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| UPPER_NAME, |
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| LOWER_NAME, |
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| _1, |
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| _2, |
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| _3, |
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| X86_UPPER, |
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| X86_LOWER, |
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| X86_PARENT, |
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| X86_AVAIL ) |
Value: if (X86_AVAIL) \
id2reg.emplace(ID_REG_X86_##UPPER_NAME, \
#LOWER_NAME, \
triton::arch::ID_REG_X86_##X86_PARENT, \
X86_UPPER, \
X86_LOWER, \
true) \
); \
name2id.emplace(#LOWER_NAME, ID_REG_X86_##UPPER_NAME);
This class is used when an instruction has a register operand.
◆ REG_SPEC [3/3]
#define REG_SPEC |
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| UPPER_NAME, |
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| LOWER_NAME, |
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| X86_64_UPPER, |
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| X86_64_LOWER, |
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| X86_64_PARENT, |
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| X86_UPPER, |
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| X86_LOWER, |
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| X86_PARENT, |
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| X86_AVAIL ) |
Value: id2reg.emplace(ID_REG_X86_##UPPER_NAME, \
#LOWER_NAME, \
triton::arch::ID_REG_X86_##X86_64_PARENT, \
X86_64_UPPER, \
X86_64_LOWER, \
true) \
); \
name2id.emplace(#LOWER_NAME, ID_REG_X86_##UPPER_NAME);