|
libTriton version 1.0 build 1599
|
The Architecture namespace. More...
Namespaces | |
| namespace | arm |
| The ARM namespace. | |
| namespace | riscv |
| The riscv namespace. | |
| namespace | x86 |
| The x86 namespace. | |
Classes | |
| class | Architecture |
| The abstract architecture class. More... | |
| class | BasicBlock |
| This class is used to represent a basic block. More... | |
| class | BitsVector |
| This class is used to deal with registers and memory as bits vector. More... | |
| interface | CpuInterface |
| This interface is used as abstract CPU interface. All CPU must use this interface. More... | |
| class | Immediate |
| This class is used to represent an immediate. More... | |
| class | Instruction |
| This class is used to represent an instruction. More... | |
| class | IrBuilder |
| The IR builder. More... | |
| class | MemoryAccess |
| This class is used to represent a memory access. More... | |
| interface | OperandWrapper |
| This class is used as operand wrapper. More... | |
| class | Register |
| This class is used when an instruction has a register operand. More... | |
| interface | SemanticsInterface |
| This interface is used as abstract semantics interface. All ISA semantics must use this interface. More... | |
| class | ShortcutRegister |
| This is used as a shortcut to access to registers. More... | |
Enumerations | |
| enum | architecture_e { ARCH_INVALID = 0 , ARCH_AARCH64 , ARCH_ARM32 , ARCH_RV32 , ARCH_RV64 , ARCH_X86 , ARCH_X86_64 } |
| enum | endianness_e { LE_ENDIANNESS , BE_ENDIANNESS } |
| enum | operand_e { OP_INVALID = 0 , OP_IMM , OP_MEM , OP_REG } |
| enum | exception_e { NO_FAULT = 0 , FAULT_DE , FAULT_BP , FAULT_UD , FAULT_GP } |
| enum | register_e { ID_REG_INVALID = 0 , ID_REG_LAST_ITEM } |
| Types of register. More... | |
Functions | |
| std::ostream & | operator<< (std::ostream &stream, BasicBlock &block) |
| Displays an BasicBlock. | |
| std::ostream & | operator<< (std::ostream &stream, BasicBlock *block) |
| Displays an BasicBlock. | |
| std::ostream & | operator<< (std::ostream &stream, const BitsVector &bv) |
| Displays a BitsVector. | |
| std::ostream & | operator<< (std::ostream &stream, const BitsVector *bv) |
| Displays a BitsVector. | |
| std::ostream & | operator<< (std::ostream &stream, const Immediate &imm) |
| Displays an Immediate. | |
| std::ostream & | operator<< (std::ostream &stream, const Immediate *imm) |
| Displays an Immediate. | |
| bool | operator== (const Immediate &imm1, const Immediate &imm2) |
| Compares two Immediate. | |
| bool | operator!= (const Immediate &imm1, const Immediate &imm2) |
| Compares two Immediate. | |
| bool | operator< (const Immediate &imm1, const Immediate &imm2) |
| Compares two Immediate (needed for std::map) | |
| std::ostream & | operator<< (std::ostream &stream, const Instruction &inst) |
| Displays an Instruction. | |
| std::ostream & | operator<< (std::ostream &stream, const Instruction *inst) |
| Displays an Instruction. | |
| std::ostream & | operator<< (std::ostream &stream, const MemoryAccess &mem) |
| Displays an MemoryAccess. | |
| std::ostream & | operator<< (std::ostream &stream, const MemoryAccess *mem) |
| Displays an MemoryAccess. | |
| bool | operator== (const MemoryAccess &mem1, const MemoryAccess &mem2) |
| Compares two MemoryAccess. | |
| bool | operator!= (const MemoryAccess &mem1, const MemoryAccess &mem2) |
| Compares two MemoryAccess. | |
| bool | operator< (const MemoryAccess &mem1, const MemoryAccess &mem2) |
| Compares two MemoryAccess (needed for std::map) | |
| std::ostream & | operator<< (std::ostream &stream, const triton::arch::OperandWrapper &op) |
| Displays a OperandWrapper according to the concrete type. | |
| std::ostream & | operator<< (std::ostream &stream, const triton::arch::OperandWrapper *op) |
| Displays a OperandWrapper according to the concrete type. | |
| std::ostream & | operator<< (std::ostream &stream, const Register ®) |
| Displays a Register. | |
| std::ostream & | operator<< (std::ostream &stream, const Register *reg) |
| Displays a Register. | |
| bool | operator< (const Register ®1, const Register ®2) |
| Compares two Register. | |
Variables | |
| const bool | FORCE_MEMORY_INITIALIZATION = true |
| Defines the force memory initialization constant. | |