Go to the source code of this file.
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#define | REG_SPEC(UPPER_NAME, LOWER_NAME, AARCH64_UPPER, AARCH64_LOWER, AARCH64_PARENT, MUTABLE) |
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#define | REG_SPEC_NO_CAPSTONE REG_SPEC |
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#define | SYS_REG_SPEC REG_SPEC |
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#define | REG_SPEC(UPPER_NAME, _1, _2, _3, _4, _5) |
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#define | SYS_REG_SPEC(_1, _2, _3, _4, _5, _6) |
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#define | REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6) |
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◆ REG_SPEC [1/2]
#define REG_SPEC |
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| UPPER_NAME, |
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| _1, |
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| _2, |
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| _3, |
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| _4, |
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| _5 ) |
Value: case triton::extlibs::capstone::ARM64_REG_##UPPER_NAME: \
tritonId = triton::arch::ID_REG_AARCH64_##UPPER_NAME; \
break;
◆ REG_SPEC [2/2]
#define REG_SPEC |
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| UPPER_NAME, |
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| LOWER_NAME, |
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| AARCH64_UPPER, |
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| AARCH64_LOWER, |
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| AARCH64_PARENT, |
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| MUTABLE ) |
Value: id2reg.emplace(ID_REG_AARCH64_##UPPER_NAME, \
#LOWER_NAME, \
triton::arch::ID_REG_AARCH64_##AARCH64_PARENT, \
AARCH64_UPPER, \
AARCH64_LOWER, \
MUTABLE) \
); \
name2id.emplace(#LOWER_NAME, ID_REG_AARCH64_##UPPER_NAME);
This class is used when an instruction has a register operand.