libTriton version 1.0 build 1588
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aarch64Specifications.cpp
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1
2/*
3** Copyright (C) - Triton
4**
5** This program is under the terms of the Apache License 2.0.
6*/
7
8#include <triton/aarch64Specifications.hpp>
9#include <triton/architecture.hpp>
10#include <triton/cpuSize.hpp>
11#include <triton/exceptions.hpp>
12#include <triton/externalLibs.hpp>
13
14
15
16namespace triton {
17 namespace arch {
18 namespace arm {
19 namespace aarch64 {
20
21 AArch64Specifications::AArch64Specifications(triton::arch::architecture_e arch) {
22 if (arch != triton::arch::ARCH_AARCH64)
23 throw triton::exceptions::Architecture("AArch64Specifications::AArch64Specifications(): Invalid architecture.");
24
25 // Fill id2reg and name2id with those available in AArch64 from spec
26 #define REG_SPEC(UPPER_NAME, LOWER_NAME, AARCH64_UPPER, AARCH64_LOWER, AARCH64_PARENT, MUTABLE) \
27 id2reg.emplace(ID_REG_AARCH64_##UPPER_NAME, \
28 triton::arch::Register(triton::arch::ID_REG_AARCH64_##UPPER_NAME, \
29 #LOWER_NAME, \
30 triton::arch::ID_REG_AARCH64_##AARCH64_PARENT, \
31 AARCH64_UPPER, \
32 AARCH64_LOWER, \
33 MUTABLE) \
34 ); \
35 name2id.emplace(#LOWER_NAME, ID_REG_AARCH64_##UPPER_NAME);
36 // Handle register not available in capstone as normal registers
37 #define REG_SPEC_NO_CAPSTONE REG_SPEC
38 #define SYS_REG_SPEC REG_SPEC
39 #include "triton/aarch64.spec"
40 }
41
42
43 triton::arch::register_e AArch64Specifications::capstoneRegisterToTritonRegister(triton::uint32 id) const {
44 triton::arch::register_e tritonId = triton::arch::ID_REG_INVALID;
45
46 switch (id) {
47 // Convert registers from capstone value to triton value
48 #define REG_SPEC(UPPER_NAME, _1, _2, _3, _4, _5) \
49 case triton::extlibs::capstone::ARM64_REG_##UPPER_NAME: \
50 tritonId = triton::arch::ID_REG_AARCH64_##UPPER_NAME; \
51 break;
52 #if CS_API_MAJOR >= 5
53 #define SYS_REG_SPEC(UPPER_NAME, _1, _2, _3, _4, _5) \
54 case triton::extlibs::capstone::ARM64_SYSREG_##UPPER_NAME: \
55 tritonId = triton::arch::ID_REG_AARCH64_##UPPER_NAME; \
56 break;
57 #else
58 #define SYS_REG_SPEC(_1, _2, _3, _4, _5, _6)
59 #endif
60 // Ignore registers not available in capstone
61 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
62 #include "triton/aarch64.spec"
63
64 default:
65 tritonId = triton::arch::ID_REG_INVALID;
66 break;
67 }
68
69 return tritonId;
70 }
71
72
73 triton::arch::arm::shift_e AArch64Specifications::capstoneShiftToTritonShift(triton::uint32 id) const {
74 triton::arch::arm::shift_e tritonId = triton::arch::arm::ID_SHIFT_INVALID;
75
76 switch (id) {
77 case triton::extlibs::capstone::ARM64_SFT_INVALID:
78 tritonId = triton::arch::arm::ID_SHIFT_INVALID;
79 break;
80
81 case triton::extlibs::capstone::ARM64_SFT_ASR:
82 tritonId = triton::arch::arm::ID_SHIFT_ASR;
83 break;
84
85 case triton::extlibs::capstone::ARM64_SFT_LSL:
86 tritonId = triton::arch::arm::ID_SHIFT_LSL;
87 break;
88
89 case triton::extlibs::capstone::ARM64_SFT_LSR:
90 tritonId = triton::arch::arm::ID_SHIFT_LSR;
91 break;
92
93 case triton::extlibs::capstone::ARM64_SFT_ROR:
94 tritonId = triton::arch::arm::ID_SHIFT_ROR;
95 break;
96
97 default:
98 tritonId = triton::arch::arm::ID_SHIFT_INVALID;
99 break;
100 }
101
102 return tritonId;
103 }
104
105
106 triton::arch::arm::extend_e AArch64Specifications::capstoneExtendToTritonExtend(triton::uint32 id) const {
107 triton::arch::arm::extend_e tritonId = triton::arch::arm::ID_EXTEND_INVALID;
108
109 switch (id) {
110 case triton::extlibs::capstone::ARM64_EXT_INVALID:
111 tritonId = triton::arch::arm::ID_EXTEND_INVALID;
112 break;
113
114 case triton::extlibs::capstone::ARM64_EXT_UXTB:
115 tritonId = triton::arch::arm::ID_EXTEND_UXTB;
116 break;
117
118 case triton::extlibs::capstone::ARM64_EXT_UXTH:
119 tritonId = triton::arch::arm::ID_EXTEND_UXTH;
120 break;
121
122 case triton::extlibs::capstone::ARM64_EXT_UXTW:
123 tritonId = triton::arch::arm::ID_EXTEND_UXTW;
124 break;
125
126 case triton::extlibs::capstone::ARM64_EXT_UXTX:
127 tritonId = triton::arch::arm::ID_EXTEND_UXTX;
128 break;
129
130 case triton::extlibs::capstone::ARM64_EXT_SXTB:
131 tritonId = triton::arch::arm::ID_EXTEND_SXTB;
132 break;
133
134 case triton::extlibs::capstone::ARM64_EXT_SXTH:
135 tritonId = triton::arch::arm::ID_EXTEND_SXTH;
136 break;
137
138 case triton::extlibs::capstone::ARM64_EXT_SXTW:
139 tritonId = triton::arch::arm::ID_EXTEND_SXTW;
140 break;
141
142 case triton::extlibs::capstone::ARM64_EXT_SXTX:
143 tritonId = triton::arch::arm::ID_EXTEND_SXTX;
144 break;
145
146 default:
147 tritonId = triton::arch::arm::ID_EXTEND_INVALID;
148 break;
149 }
150
151 return tritonId;
152 }
153
154
155 triton::arch::arm::vas_e AArch64Specifications::capstoneVASToTritonVAS(triton::uint32 id) const {
156 triton::arch::arm::vas_e tritonId = triton::arch::arm::ID_VAS_INVALID;
157
158 switch (id) {
159 case triton::extlibs::capstone::ARM64_VAS_INVALID:
160 tritonId = triton::arch::arm::ID_VAS_INVALID;
161 break;
162
163 case triton::extlibs::capstone::ARM64_VAS_16B:
164 tritonId = triton::arch::arm::ID_VAS_16B;
165 break;
166
167 case triton::extlibs::capstone::ARM64_VAS_8B:
168 tritonId = triton::arch::arm::ID_VAS_8B;
169 break;
170
171 case triton::extlibs::capstone::ARM64_VAS_8H:
172 tritonId = triton::arch::arm::ID_VAS_8H;
173 break;
174
175 case triton::extlibs::capstone::ARM64_VAS_4H:
176 tritonId = triton::arch::arm::ID_VAS_4H;
177 break;
178
179 case triton::extlibs::capstone::ARM64_VAS_4S:
180 tritonId = triton::arch::arm::ID_VAS_4S;
181 break;
182
183 case triton::extlibs::capstone::ARM64_VAS_2S:
184 tritonId = triton::arch::arm::ID_VAS_2S;
185 break;
186
187 case triton::extlibs::capstone::ARM64_VAS_2D:
188 tritonId = triton::arch::arm::ID_VAS_2D;
189 break;
190
191 case triton::extlibs::capstone::ARM64_VAS_1D:
192 tritonId = triton::arch::arm::ID_VAS_1D;
193 break;
194
195 default:
196 tritonId = triton::arch::arm::ID_VAS_INVALID;
197 break;
198 }
199
200 return tritonId;
201 }
202
203
204 triton::arch::arm::condition_e AArch64Specifications::capstoneConditionToTritonCondition(triton::uint32 id) const {
205 triton::arch::arm::condition_e tritonId = triton::arch::arm::ID_CONDITION_INVALID;
206
207 switch (id) {
208 case triton::extlibs::capstone::ARM64_CC_INVALID:
209 tritonId = triton::arch::arm::ID_CONDITION_INVALID;
210 break;
211
212 case triton::extlibs::capstone::ARM64_CC_AL:
213 tritonId = triton::arch::arm::ID_CONDITION_AL;
214 break;
215
216 case triton::extlibs::capstone::ARM64_CC_EQ:
217 tritonId = triton::arch::arm::ID_CONDITION_EQ;
218 break;
219
220 case triton::extlibs::capstone::ARM64_CC_GE:
221 tritonId = triton::arch::arm::ID_CONDITION_GE;
222 break;
223
224 case triton::extlibs::capstone::ARM64_CC_GT:
225 tritonId = triton::arch::arm::ID_CONDITION_GT;
226 break;
227
228 case triton::extlibs::capstone::ARM64_CC_HI:
229 tritonId = triton::arch::arm::ID_CONDITION_HI;
230 break;
231
232 case triton::extlibs::capstone::ARM64_CC_HS:
233 tritonId = triton::arch::arm::ID_CONDITION_HS;
234 break;
235
236 case triton::extlibs::capstone::ARM64_CC_LE:
237 tritonId = triton::arch::arm::ID_CONDITION_LE;
238 break;
239
240 case triton::extlibs::capstone::ARM64_CC_LO:
241 tritonId = triton::arch::arm::ID_CONDITION_LO;
242 break;
243
244 case triton::extlibs::capstone::ARM64_CC_LS:
245 tritonId = triton::arch::arm::ID_CONDITION_LS;
246 break;
247
248 case triton::extlibs::capstone::ARM64_CC_LT:
249 tritonId = triton::arch::arm::ID_CONDITION_LT;
250 break;
251
252 case triton::extlibs::capstone::ARM64_CC_MI:
253 tritonId = triton::arch::arm::ID_CONDITION_MI;
254 break;
255
256 case triton::extlibs::capstone::ARM64_CC_NE:
257 tritonId = triton::arch::arm::ID_CONDITION_NE;
258 break;
259
260 case triton::extlibs::capstone::ARM64_CC_PL:
261 tritonId = triton::arch::arm::ID_CONDITION_PL;
262 break;
263
264 case triton::extlibs::capstone::ARM64_CC_VC:
265 tritonId = triton::arch::arm::ID_CONDITION_VC;
266 break;
267
268 case triton::extlibs::capstone::ARM64_CC_VS:
269 tritonId = triton::arch::arm::ID_CONDITION_VS;
270 break;
271
272 default:
273 tritonId = triton::arch::arm::ID_CONDITION_INVALID;
274 break;
275 }
276
277 return tritonId;
278 }
279
280
281 triton::uint32 AArch64Specifications::capstoneInstructionToTritonInstruction(triton::uint32 id) const {
282 triton::uint32 tritonId = triton::arch::arm::aarch64::ID_INS_INVALID;
283
284 switch (id) {
285 case triton::extlibs::capstone::ARM64_INS_INVALID:
286 tritonId = triton::arch::arm::aarch64::ID_INS_INVALID;
287 break;
288
289 case triton::extlibs::capstone::ARM64_INS_ABS:
290 tritonId = triton::arch::arm::aarch64::ID_INS_ABS;
291 break;
292
293 case triton::extlibs::capstone::ARM64_INS_ADC:
294 tritonId = triton::arch::arm::aarch64::ID_INS_ADC;
295 break;
296
297 #if CS_API_MAJOR >= 5
298 case triton::extlibs::capstone::ARM64_INS_ADCS:
299 tritonId = triton::arch::arm::aarch64::ID_INS_ADC;
300 break;
301 #endif
302
303 case triton::extlibs::capstone::ARM64_INS_ADDHN:
304 tritonId = triton::arch::arm::aarch64::ID_INS_ADDHN;
305 break;
306
307 case triton::extlibs::capstone::ARM64_INS_ADDHN2:
308 tritonId = triton::arch::arm::aarch64::ID_INS_ADDHN2;
309 break;
310
311 case triton::extlibs::capstone::ARM64_INS_ADDP:
312 tritonId = triton::arch::arm::aarch64::ID_INS_ADDP;
313 break;
314
315 case triton::extlibs::capstone::ARM64_INS_ADD:
316 tritonId = triton::arch::arm::aarch64::ID_INS_ADD;
317 break;
318
319 #if CS_API_MAJOR >= 5
320 case triton::extlibs::capstone::ARM64_INS_ADDS:
321 tritonId = triton::arch::arm::aarch64::ID_INS_ADD;
322 break;
323 #endif
324
325 case triton::extlibs::capstone::ARM64_INS_ADDV:
326 tritonId = triton::arch::arm::aarch64::ID_INS_ADDV;
327 break;
328
329 case triton::extlibs::capstone::ARM64_INS_ADR:
330 tritonId = triton::arch::arm::aarch64::ID_INS_ADR;
331 break;
332
333 case triton::extlibs::capstone::ARM64_INS_ADRP:
334 tritonId = triton::arch::arm::aarch64::ID_INS_ADRP;
335 break;
336
337 case triton::extlibs::capstone::ARM64_INS_AESD:
338 tritonId = triton::arch::arm::aarch64::ID_INS_AESD;
339 break;
340
341 case triton::extlibs::capstone::ARM64_INS_AESE:
342 tritonId = triton::arch::arm::aarch64::ID_INS_AESE;
343 break;
344
345 case triton::extlibs::capstone::ARM64_INS_AESIMC:
346 tritonId = triton::arch::arm::aarch64::ID_INS_AESIMC;
347 break;
348
349 case triton::extlibs::capstone::ARM64_INS_AESMC:
350 tritonId = triton::arch::arm::aarch64::ID_INS_AESMC;
351 break;
352
353 case triton::extlibs::capstone::ARM64_INS_AND:
354 tritonId = triton::arch::arm::aarch64::ID_INS_AND;
355 break;
356
357 #if CS_API_MAJOR >= 5
358 case triton::extlibs::capstone::ARM64_INS_ANDS:
359 tritonId = triton::arch::arm::aarch64::ID_INS_AND;
360 break;
361 #endif
362
363 case triton::extlibs::capstone::ARM64_INS_ASR:
364 tritonId = triton::arch::arm::aarch64::ID_INS_ASR;
365 break;
366
367 case triton::extlibs::capstone::ARM64_INS_B:
368 tritonId = triton::arch::arm::aarch64::ID_INS_B;
369 break;
370
371 case triton::extlibs::capstone::ARM64_INS_BFM:
372 tritonId = triton::arch::arm::aarch64::ID_INS_BFM;
373 break;
374
375 case triton::extlibs::capstone::ARM64_INS_BIC:
376 tritonId = triton::arch::arm::aarch64::ID_INS_BIC;
377 break;
378
379 case triton::extlibs::capstone::ARM64_INS_BIF:
380 tritonId = triton::arch::arm::aarch64::ID_INS_BIF;
381 break;
382
383 case triton::extlibs::capstone::ARM64_INS_BIT:
384 tritonId = triton::arch::arm::aarch64::ID_INS_BIT;
385 break;
386
387 case triton::extlibs::capstone::ARM64_INS_BL:
388 tritonId = triton::arch::arm::aarch64::ID_INS_BL;
389 break;
390
391 case triton::extlibs::capstone::ARM64_INS_BLR:
392 tritonId = triton::arch::arm::aarch64::ID_INS_BLR;
393 break;
394
395 case triton::extlibs::capstone::ARM64_INS_BR:
396 tritonId = triton::arch::arm::aarch64::ID_INS_BR;
397 break;
398
399 case triton::extlibs::capstone::ARM64_INS_BRK:
400 tritonId = triton::arch::arm::aarch64::ID_INS_BRK;
401 break;
402
403 case triton::extlibs::capstone::ARM64_INS_BSL:
404 tritonId = triton::arch::arm::aarch64::ID_INS_BSL;
405 break;
406
407 case triton::extlibs::capstone::ARM64_INS_CBNZ:
408 tritonId = triton::arch::arm::aarch64::ID_INS_CBNZ;
409 break;
410
411 case triton::extlibs::capstone::ARM64_INS_CBZ:
412 tritonId = triton::arch::arm::aarch64::ID_INS_CBZ;
413 break;
414
415 case triton::extlibs::capstone::ARM64_INS_CCMN:
416 tritonId = triton::arch::arm::aarch64::ID_INS_CCMN;
417 break;
418
419 case triton::extlibs::capstone::ARM64_INS_CCMP:
420 tritonId = triton::arch::arm::aarch64::ID_INS_CCMP;
421 break;
422
423 case triton::extlibs::capstone::ARM64_INS_CLREX:
424 tritonId = triton::arch::arm::aarch64::ID_INS_CLREX;
425 break;
426
427 case triton::extlibs::capstone::ARM64_INS_CLS:
428 tritonId = triton::arch::arm::aarch64::ID_INS_CLS;
429 break;
430
431 case triton::extlibs::capstone::ARM64_INS_CLZ:
432 tritonId = triton::arch::arm::aarch64::ID_INS_CLZ;
433 break;
434
435 case triton::extlibs::capstone::ARM64_INS_CMEQ:
436 tritonId = triton::arch::arm::aarch64::ID_INS_CMEQ;
437 break;
438
439 case triton::extlibs::capstone::ARM64_INS_CMGE:
440 tritonId = triton::arch::arm::aarch64::ID_INS_CMGE;
441 break;
442
443 case triton::extlibs::capstone::ARM64_INS_CMGT:
444 tritonId = triton::arch::arm::aarch64::ID_INS_CMGT;
445 break;
446
447 case triton::extlibs::capstone::ARM64_INS_CMHI:
448 tritonId = triton::arch::arm::aarch64::ID_INS_CMHI;
449 break;
450
451 case triton::extlibs::capstone::ARM64_INS_CMHS:
452 tritonId = triton::arch::arm::aarch64::ID_INS_CMHS;
453 break;
454
455 case triton::extlibs::capstone::ARM64_INS_CMLE:
456 tritonId = triton::arch::arm::aarch64::ID_INS_CMLE;
457 break;
458
459 case triton::extlibs::capstone::ARM64_INS_CMLT:
460 tritonId = triton::arch::arm::aarch64::ID_INS_CMLT;
461 break;
462
463 case triton::extlibs::capstone::ARM64_INS_CMTST:
464 tritonId = triton::arch::arm::aarch64::ID_INS_CMTST;
465 break;
466
467 case triton::extlibs::capstone::ARM64_INS_CNT:
468 tritonId = triton::arch::arm::aarch64::ID_INS_CNT;
469 break;
470
471 case triton::extlibs::capstone::ARM64_INS_MOV:
472 tritonId = triton::arch::arm::aarch64::ID_INS_MOV;
473 break;
474
475 case triton::extlibs::capstone::ARM64_INS_CRC32B:
476 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32B;
477 break;
478
479 case triton::extlibs::capstone::ARM64_INS_CRC32CB:
480 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32CB;
481 break;
482
483 case triton::extlibs::capstone::ARM64_INS_CRC32CH:
484 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32CH;
485 break;
486
487 case triton::extlibs::capstone::ARM64_INS_CRC32CW:
488 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32CW;
489 break;
490
491 case triton::extlibs::capstone::ARM64_INS_CRC32CX:
492 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32CX;
493 break;
494
495 case triton::extlibs::capstone::ARM64_INS_CRC32H:
496 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32H;
497 break;
498
499 case triton::extlibs::capstone::ARM64_INS_CRC32W:
500 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32W;
501 break;
502
503 case triton::extlibs::capstone::ARM64_INS_CRC32X:
504 tritonId = triton::arch::arm::aarch64::ID_INS_CRC32X;
505 break;
506
507 case triton::extlibs::capstone::ARM64_INS_CSEL:
508 tritonId = triton::arch::arm::aarch64::ID_INS_CSEL;
509 break;
510
511 case triton::extlibs::capstone::ARM64_INS_CSINC:
512 tritonId = triton::arch::arm::aarch64::ID_INS_CSINC;
513 break;
514
515 case triton::extlibs::capstone::ARM64_INS_CSINV:
516 tritonId = triton::arch::arm::aarch64::ID_INS_CSINV;
517 break;
518
519 case triton::extlibs::capstone::ARM64_INS_CSNEG:
520 tritonId = triton::arch::arm::aarch64::ID_INS_CSNEG;
521 break;
522
523 case triton::extlibs::capstone::ARM64_INS_DCPS1:
524 tritonId = triton::arch::arm::aarch64::ID_INS_DCPS1;
525 break;
526
527 case triton::extlibs::capstone::ARM64_INS_DCPS2:
528 tritonId = triton::arch::arm::aarch64::ID_INS_DCPS2;
529 break;
530
531 case triton::extlibs::capstone::ARM64_INS_DCPS3:
532 tritonId = triton::arch::arm::aarch64::ID_INS_DCPS3;
533 break;
534
535 case triton::extlibs::capstone::ARM64_INS_DMB:
536 tritonId = triton::arch::arm::aarch64::ID_INS_DMB;
537 break;
538
539 case triton::extlibs::capstone::ARM64_INS_DRPS:
540 tritonId = triton::arch::arm::aarch64::ID_INS_DRPS;
541 break;
542
543 case triton::extlibs::capstone::ARM64_INS_DSB:
544 tritonId = triton::arch::arm::aarch64::ID_INS_DSB;
545 break;
546
547 case triton::extlibs::capstone::ARM64_INS_DUP:
548 tritonId = triton::arch::arm::aarch64::ID_INS_DUP;
549 break;
550
551 case triton::extlibs::capstone::ARM64_INS_EON:
552 tritonId = triton::arch::arm::aarch64::ID_INS_EON;
553 break;
554
555 case triton::extlibs::capstone::ARM64_INS_EOR:
556 tritonId = triton::arch::arm::aarch64::ID_INS_EOR;
557 break;
558
559 case triton::extlibs::capstone::ARM64_INS_ERET:
560 tritonId = triton::arch::arm::aarch64::ID_INS_ERET;
561 break;
562
563 case triton::extlibs::capstone::ARM64_INS_EXTR:
564 tritonId = triton::arch::arm::aarch64::ID_INS_EXTR;
565 break;
566
567 case triton::extlibs::capstone::ARM64_INS_EXT:
568 tritonId = triton::arch::arm::aarch64::ID_INS_EXT;
569 break;
570
571 case triton::extlibs::capstone::ARM64_INS_FABD:
572 tritonId = triton::arch::arm::aarch64::ID_INS_FABD;
573 break;
574
575 case triton::extlibs::capstone::ARM64_INS_FABS:
576 tritonId = triton::arch::arm::aarch64::ID_INS_FABS;
577 break;
578
579 case triton::extlibs::capstone::ARM64_INS_FACGE:
580 tritonId = triton::arch::arm::aarch64::ID_INS_FACGE;
581 break;
582
583 case triton::extlibs::capstone::ARM64_INS_FACGT:
584 tritonId = triton::arch::arm::aarch64::ID_INS_FACGT;
585 break;
586
587 case triton::extlibs::capstone::ARM64_INS_FADD:
588 tritonId = triton::arch::arm::aarch64::ID_INS_FADD;
589 break;
590
591 case triton::extlibs::capstone::ARM64_INS_FADDP:
592 tritonId = triton::arch::arm::aarch64::ID_INS_FADDP;
593 break;
594
595 case triton::extlibs::capstone::ARM64_INS_FCCMP:
596 tritonId = triton::arch::arm::aarch64::ID_INS_FCCMP;
597 break;
598
599 case triton::extlibs::capstone::ARM64_INS_FCCMPE:
600 tritonId = triton::arch::arm::aarch64::ID_INS_FCCMPE;
601 break;
602
603 case triton::extlibs::capstone::ARM64_INS_FCMEQ:
604 tritonId = triton::arch::arm::aarch64::ID_INS_FCMEQ;
605 break;
606
607 case triton::extlibs::capstone::ARM64_INS_FCMGE:
608 tritonId = triton::arch::arm::aarch64::ID_INS_FCMGE;
609 break;
610
611 case triton::extlibs::capstone::ARM64_INS_FCMGT:
612 tritonId = triton::arch::arm::aarch64::ID_INS_FCMGT;
613 break;
614
615 case triton::extlibs::capstone::ARM64_INS_FCMLE:
616 tritonId = triton::arch::arm::aarch64::ID_INS_FCMLE;
617 break;
618
619 case triton::extlibs::capstone::ARM64_INS_FCMLT:
620 tritonId = triton::arch::arm::aarch64::ID_INS_FCMLT;
621 break;
622
623 case triton::extlibs::capstone::ARM64_INS_FCMP:
624 tritonId = triton::arch::arm::aarch64::ID_INS_FCMP;
625 break;
626
627 case triton::extlibs::capstone::ARM64_INS_FCMPE:
628 tritonId = triton::arch::arm::aarch64::ID_INS_FCMPE;
629 break;
630
631 case triton::extlibs::capstone::ARM64_INS_FCSEL:
632 tritonId = triton::arch::arm::aarch64::ID_INS_FCSEL;
633 break;
634
635 case triton::extlibs::capstone::ARM64_INS_FCVTAS:
636 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTAS;
637 break;
638
639 case triton::extlibs::capstone::ARM64_INS_FCVTAU:
640 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTAU;
641 break;
642
643 case triton::extlibs::capstone::ARM64_INS_FCVT:
644 tritonId = triton::arch::arm::aarch64::ID_INS_FCVT;
645 break;
646
647 case triton::extlibs::capstone::ARM64_INS_FCVTL:
648 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTL;
649 break;
650
651 case triton::extlibs::capstone::ARM64_INS_FCVTL2:
652 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTL2;
653 break;
654
655 case triton::extlibs::capstone::ARM64_INS_FCVTMS:
656 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTMS;
657 break;
658
659 case triton::extlibs::capstone::ARM64_INS_FCVTMU:
660 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTMU;
661 break;
662
663 case triton::extlibs::capstone::ARM64_INS_FCVTNS:
664 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTNS;
665 break;
666
667 case triton::extlibs::capstone::ARM64_INS_FCVTNU:
668 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTNU;
669 break;
670
671 case triton::extlibs::capstone::ARM64_INS_FCVTN:
672 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTN;
673 break;
674
675 case triton::extlibs::capstone::ARM64_INS_FCVTN2:
676 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTN2;
677 break;
678
679 case triton::extlibs::capstone::ARM64_INS_FCVTPS:
680 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTPS;
681 break;
682
683 case triton::extlibs::capstone::ARM64_INS_FCVTPU:
684 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTPU;
685 break;
686
687 case triton::extlibs::capstone::ARM64_INS_FCVTXN:
688 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTXN;
689 break;
690
691 case triton::extlibs::capstone::ARM64_INS_FCVTXN2:
692 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTXN2;
693 break;
694
695 case triton::extlibs::capstone::ARM64_INS_FCVTZS:
696 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTZS;
697 break;
698
699 case triton::extlibs::capstone::ARM64_INS_FCVTZU:
700 tritonId = triton::arch::arm::aarch64::ID_INS_FCVTZU;
701 break;
702
703 case triton::extlibs::capstone::ARM64_INS_FDIV:
704 tritonId = triton::arch::arm::aarch64::ID_INS_FDIV;
705 break;
706
707 case triton::extlibs::capstone::ARM64_INS_FMADD:
708 tritonId = triton::arch::arm::aarch64::ID_INS_FMADD;
709 break;
710
711 case triton::extlibs::capstone::ARM64_INS_FMAX:
712 tritonId = triton::arch::arm::aarch64::ID_INS_FMAX;
713 break;
714
715 case triton::extlibs::capstone::ARM64_INS_FMAXNM:
716 tritonId = triton::arch::arm::aarch64::ID_INS_FMAXNM;
717 break;
718
719 case triton::extlibs::capstone::ARM64_INS_FMAXNMP:
720 tritonId = triton::arch::arm::aarch64::ID_INS_FMAXNMP;
721 break;
722
723 case triton::extlibs::capstone::ARM64_INS_FMAXNMV:
724 tritonId = triton::arch::arm::aarch64::ID_INS_FMAXNMV;
725 break;
726
727 case triton::extlibs::capstone::ARM64_INS_FMAXP:
728 tritonId = triton::arch::arm::aarch64::ID_INS_FMAXP;
729 break;
730
731 case triton::extlibs::capstone::ARM64_INS_FMAXV:
732 tritonId = triton::arch::arm::aarch64::ID_INS_FMAXV;
733 break;
734
735 case triton::extlibs::capstone::ARM64_INS_FMIN:
736 tritonId = triton::arch::arm::aarch64::ID_INS_FMIN;
737 break;
738
739 case triton::extlibs::capstone::ARM64_INS_FMINNM:
740 tritonId = triton::arch::arm::aarch64::ID_INS_FMINNM;
741 break;
742
743 case triton::extlibs::capstone::ARM64_INS_FMINNMP:
744 tritonId = triton::arch::arm::aarch64::ID_INS_FMINNMP;
745 break;
746
747 case triton::extlibs::capstone::ARM64_INS_FMINNMV:
748 tritonId = triton::arch::arm::aarch64::ID_INS_FMINNMV;
749 break;
750
751 case triton::extlibs::capstone::ARM64_INS_FMINP:
752 tritonId = triton::arch::arm::aarch64::ID_INS_FMINP;
753 break;
754
755 case triton::extlibs::capstone::ARM64_INS_FMINV:
756 tritonId = triton::arch::arm::aarch64::ID_INS_FMINV;
757 break;
758
759 case triton::extlibs::capstone::ARM64_INS_FMLA:
760 tritonId = triton::arch::arm::aarch64::ID_INS_FMLA;
761 break;
762
763 case triton::extlibs::capstone::ARM64_INS_FMLS:
764 tritonId = triton::arch::arm::aarch64::ID_INS_FMLS;
765 break;
766
767 case triton::extlibs::capstone::ARM64_INS_FMOV:
768 tritonId = triton::arch::arm::aarch64::ID_INS_FMOV;
769 break;
770
771 case triton::extlibs::capstone::ARM64_INS_FMSUB:
772 tritonId = triton::arch::arm::aarch64::ID_INS_FMSUB;
773 break;
774
775 case triton::extlibs::capstone::ARM64_INS_FMUL:
776 tritonId = triton::arch::arm::aarch64::ID_INS_FMUL;
777 break;
778
779 case triton::extlibs::capstone::ARM64_INS_FMULX:
780 tritonId = triton::arch::arm::aarch64::ID_INS_FMULX;
781 break;
782
783 case triton::extlibs::capstone::ARM64_INS_FNEG:
784 tritonId = triton::arch::arm::aarch64::ID_INS_FNEG;
785 break;
786
787 case triton::extlibs::capstone::ARM64_INS_FNMADD:
788 tritonId = triton::arch::arm::aarch64::ID_INS_FNMADD;
789 break;
790
791 case triton::extlibs::capstone::ARM64_INS_FNMSUB:
792 tritonId = triton::arch::arm::aarch64::ID_INS_FNMSUB;
793 break;
794
795 case triton::extlibs::capstone::ARM64_INS_FNMUL:
796 tritonId = triton::arch::arm::aarch64::ID_INS_FNMUL;
797 break;
798
799 case triton::extlibs::capstone::ARM64_INS_FRECPE:
800 tritonId = triton::arch::arm::aarch64::ID_INS_FRECPE;
801 break;
802
803 case triton::extlibs::capstone::ARM64_INS_FRECPS:
804 tritonId = triton::arch::arm::aarch64::ID_INS_FRECPS;
805 break;
806
807 case triton::extlibs::capstone::ARM64_INS_FRECPX:
808 tritonId = triton::arch::arm::aarch64::ID_INS_FRECPX;
809 break;
810
811 case triton::extlibs::capstone::ARM64_INS_FRINTA:
812 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTA;
813 break;
814
815 case triton::extlibs::capstone::ARM64_INS_FRINTI:
816 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTI;
817 break;
818
819 case triton::extlibs::capstone::ARM64_INS_FRINTM:
820 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTM;
821 break;
822
823 case triton::extlibs::capstone::ARM64_INS_FRINTN:
824 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTN;
825 break;
826
827 case triton::extlibs::capstone::ARM64_INS_FRINTP:
828 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTP;
829 break;
830
831 case triton::extlibs::capstone::ARM64_INS_FRINTX:
832 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTX;
833 break;
834
835 case triton::extlibs::capstone::ARM64_INS_FRINTZ:
836 tritonId = triton::arch::arm::aarch64::ID_INS_FRINTZ;
837 break;
838
839 case triton::extlibs::capstone::ARM64_INS_FRSQRTE:
840 tritonId = triton::arch::arm::aarch64::ID_INS_FRSQRTE;
841 break;
842
843 case triton::extlibs::capstone::ARM64_INS_FRSQRTS:
844 tritonId = triton::arch::arm::aarch64::ID_INS_FRSQRTS;
845 break;
846
847 case triton::extlibs::capstone::ARM64_INS_FSQRT:
848 tritonId = triton::arch::arm::aarch64::ID_INS_FSQRT;
849 break;
850
851 case triton::extlibs::capstone::ARM64_INS_FSUB:
852 tritonId = triton::arch::arm::aarch64::ID_INS_FSUB;
853 break;
854
855 case triton::extlibs::capstone::ARM64_INS_HINT:
856 tritonId = triton::arch::arm::aarch64::ID_INS_HINT;
857 break;
858
859 case triton::extlibs::capstone::ARM64_INS_HLT:
860 tritonId = triton::arch::arm::aarch64::ID_INS_HLT;
861 break;
862
863 case triton::extlibs::capstone::ARM64_INS_HVC:
864 tritonId = triton::arch::arm::aarch64::ID_INS_HVC;
865 break;
866
867 case triton::extlibs::capstone::ARM64_INS_INS:
868 tritonId = triton::arch::arm::aarch64::ID_INS_INS;
869 break;
870
871 case triton::extlibs::capstone::ARM64_INS_ISB:
872 tritonId = triton::arch::arm::aarch64::ID_INS_ISB;
873 break;
874
875 case triton::extlibs::capstone::ARM64_INS_LD1:
876 tritonId = triton::arch::arm::aarch64::ID_INS_LD1;
877 break;
878
879 case triton::extlibs::capstone::ARM64_INS_LD1R:
880 tritonId = triton::arch::arm::aarch64::ID_INS_LD1R;
881 break;
882
883 case triton::extlibs::capstone::ARM64_INS_LD2R:
884 tritonId = triton::arch::arm::aarch64::ID_INS_LD2R;
885 break;
886
887 case triton::extlibs::capstone::ARM64_INS_LD2:
888 tritonId = triton::arch::arm::aarch64::ID_INS_LD2;
889 break;
890
891 case triton::extlibs::capstone::ARM64_INS_LD3R:
892 tritonId = triton::arch::arm::aarch64::ID_INS_LD3R;
893 break;
894
895 case triton::extlibs::capstone::ARM64_INS_LD3:
896 tritonId = triton::arch::arm::aarch64::ID_INS_LD3;
897 break;
898
899 case triton::extlibs::capstone::ARM64_INS_LD4:
900 tritonId = triton::arch::arm::aarch64::ID_INS_LD4;
901 break;
902
903 case triton::extlibs::capstone::ARM64_INS_LD4R:
904 tritonId = triton::arch::arm::aarch64::ID_INS_LD4R;
905 break;
906
907 case triton::extlibs::capstone::ARM64_INS_LDARB:
908 tritonId = triton::arch::arm::aarch64::ID_INS_LDARB;
909 break;
910
911 case triton::extlibs::capstone::ARM64_INS_LDARH:
912 tritonId = triton::arch::arm::aarch64::ID_INS_LDARH;
913 break;
914
915 case triton::extlibs::capstone::ARM64_INS_LDAR:
916 tritonId = triton::arch::arm::aarch64::ID_INS_LDAR;
917 break;
918
919 case triton::extlibs::capstone::ARM64_INS_LDAXP:
920 tritonId = triton::arch::arm::aarch64::ID_INS_LDAXP;
921 break;
922
923 case triton::extlibs::capstone::ARM64_INS_LDAXRB:
924 tritonId = triton::arch::arm::aarch64::ID_INS_LDAXRB;
925 break;
926
927 case triton::extlibs::capstone::ARM64_INS_LDAXRH:
928 tritonId = triton::arch::arm::aarch64::ID_INS_LDAXRH;
929 break;
930
931 case triton::extlibs::capstone::ARM64_INS_LDAXR:
932 tritonId = triton::arch::arm::aarch64::ID_INS_LDAXR;
933 break;
934
935 case triton::extlibs::capstone::ARM64_INS_LDNP:
936 tritonId = triton::arch::arm::aarch64::ID_INS_LDNP;
937 break;
938
939 case triton::extlibs::capstone::ARM64_INS_LDP:
940 tritonId = triton::arch::arm::aarch64::ID_INS_LDP;
941 break;
942
943 case triton::extlibs::capstone::ARM64_INS_LDPSW:
944 tritonId = triton::arch::arm::aarch64::ID_INS_LDPSW;
945 break;
946
947 case triton::extlibs::capstone::ARM64_INS_LDRB:
948 tritonId = triton::arch::arm::aarch64::ID_INS_LDRB;
949 break;
950
951 case triton::extlibs::capstone::ARM64_INS_LDR:
952 tritonId = triton::arch::arm::aarch64::ID_INS_LDR;
953 break;
954
955 case triton::extlibs::capstone::ARM64_INS_LDRH:
956 tritonId = triton::arch::arm::aarch64::ID_INS_LDRH;
957 break;
958
959 case triton::extlibs::capstone::ARM64_INS_LDRSB:
960 tritonId = triton::arch::arm::aarch64::ID_INS_LDRSB;
961 break;
962
963 case triton::extlibs::capstone::ARM64_INS_LDRSH:
964 tritonId = triton::arch::arm::aarch64::ID_INS_LDRSH;
965 break;
966
967 case triton::extlibs::capstone::ARM64_INS_LDRSW:
968 tritonId = triton::arch::arm::aarch64::ID_INS_LDRSW;
969 break;
970
971 case triton::extlibs::capstone::ARM64_INS_LDTRB:
972 tritonId = triton::arch::arm::aarch64::ID_INS_LDTRB;
973 break;
974
975 case triton::extlibs::capstone::ARM64_INS_LDTRH:
976 tritonId = triton::arch::arm::aarch64::ID_INS_LDTRH;
977 break;
978
979 case triton::extlibs::capstone::ARM64_INS_LDTRSB:
980 tritonId = triton::arch::arm::aarch64::ID_INS_LDTRSB;
981 break;
982
983 case triton::extlibs::capstone::ARM64_INS_LDTRSH:
984 tritonId = triton::arch::arm::aarch64::ID_INS_LDTRSH;
985 break;
986
987 case triton::extlibs::capstone::ARM64_INS_LDTRSW:
988 tritonId = triton::arch::arm::aarch64::ID_INS_LDTRSW;
989 break;
990
991 case triton::extlibs::capstone::ARM64_INS_LDTR:
992 tritonId = triton::arch::arm::aarch64::ID_INS_LDTR;
993 break;
994
995 case triton::extlibs::capstone::ARM64_INS_LDURB:
996 tritonId = triton::arch::arm::aarch64::ID_INS_LDURB;
997 break;
998
999 case triton::extlibs::capstone::ARM64_INS_LDUR:
1000 tritonId = triton::arch::arm::aarch64::ID_INS_LDUR;
1001 break;
1002
1003 case triton::extlibs::capstone::ARM64_INS_LDURH:
1004 tritonId = triton::arch::arm::aarch64::ID_INS_LDURH;
1005 break;
1006
1007 case triton::extlibs::capstone::ARM64_INS_LDURSB:
1008 tritonId = triton::arch::arm::aarch64::ID_INS_LDURSB;
1009 break;
1010
1011 case triton::extlibs::capstone::ARM64_INS_LDURSH:
1012 tritonId = triton::arch::arm::aarch64::ID_INS_LDURSH;
1013 break;
1014
1015 case triton::extlibs::capstone::ARM64_INS_LDURSW:
1016 tritonId = triton::arch::arm::aarch64::ID_INS_LDURSW;
1017 break;
1018
1019 case triton::extlibs::capstone::ARM64_INS_LDXP:
1020 tritonId = triton::arch::arm::aarch64::ID_INS_LDXP;
1021 break;
1022
1023 case triton::extlibs::capstone::ARM64_INS_LDXRB:
1024 tritonId = triton::arch::arm::aarch64::ID_INS_LDXRB;
1025 break;
1026
1027 case triton::extlibs::capstone::ARM64_INS_LDXRH:
1028 tritonId = triton::arch::arm::aarch64::ID_INS_LDXRH;
1029 break;
1030
1031 case triton::extlibs::capstone::ARM64_INS_LDXR:
1032 tritonId = triton::arch::arm::aarch64::ID_INS_LDXR;
1033 break;
1034
1035 case triton::extlibs::capstone::ARM64_INS_LSL:
1036 tritonId = triton::arch::arm::aarch64::ID_INS_LSL;
1037 break;
1038
1039 case triton::extlibs::capstone::ARM64_INS_LSR:
1040 tritonId = triton::arch::arm::aarch64::ID_INS_LSR;
1041 break;
1042
1043 case triton::extlibs::capstone::ARM64_INS_MADD:
1044 tritonId = triton::arch::arm::aarch64::ID_INS_MADD;
1045 break;
1046
1047 case triton::extlibs::capstone::ARM64_INS_MLA:
1048 tritonId = triton::arch::arm::aarch64::ID_INS_MLA;
1049 break;
1050
1051 case triton::extlibs::capstone::ARM64_INS_MLS:
1052 tritonId = triton::arch::arm::aarch64::ID_INS_MLS;
1053 break;
1054
1055 case triton::extlibs::capstone::ARM64_INS_MOVI:
1056 tritonId = triton::arch::arm::aarch64::ID_INS_MOVI;
1057 break;
1058
1059 case triton::extlibs::capstone::ARM64_INS_MOVK:
1060 tritonId = triton::arch::arm::aarch64::ID_INS_MOVK;
1061 break;
1062
1063 case triton::extlibs::capstone::ARM64_INS_MOVN:
1064 tritonId = triton::arch::arm::aarch64::ID_INS_MOVN;
1065 break;
1066
1067 case triton::extlibs::capstone::ARM64_INS_MOVZ:
1068 tritonId = triton::arch::arm::aarch64::ID_INS_MOVZ;
1069 break;
1070
1071 case triton::extlibs::capstone::ARM64_INS_MRS:
1072 tritonId = triton::arch::arm::aarch64::ID_INS_MRS;
1073 break;
1074
1075 case triton::extlibs::capstone::ARM64_INS_MSR:
1076 tritonId = triton::arch::arm::aarch64::ID_INS_MSR;
1077 break;
1078
1079 case triton::extlibs::capstone::ARM64_INS_MSUB:
1080 tritonId = triton::arch::arm::aarch64::ID_INS_MSUB;
1081 break;
1082
1083 case triton::extlibs::capstone::ARM64_INS_MUL:
1084 tritonId = triton::arch::arm::aarch64::ID_INS_MUL;
1085 break;
1086
1087 case triton::extlibs::capstone::ARM64_INS_MVNI:
1088 tritonId = triton::arch::arm::aarch64::ID_INS_MVNI;
1089 break;
1090
1091 case triton::extlibs::capstone::ARM64_INS_NEG:
1092 tritonId = triton::arch::arm::aarch64::ID_INS_NEG;
1093 break;
1094
1095 case triton::extlibs::capstone::ARM64_INS_NOT:
1096 tritonId = triton::arch::arm::aarch64::ID_INS_NOT;
1097 break;
1098
1099 case triton::extlibs::capstone::ARM64_INS_ORN:
1100 tritonId = triton::arch::arm::aarch64::ID_INS_ORN;
1101 break;
1102
1103 case triton::extlibs::capstone::ARM64_INS_ORR:
1104 tritonId = triton::arch::arm::aarch64::ID_INS_ORR;
1105 break;
1106
1107 case triton::extlibs::capstone::ARM64_INS_PMULL2:
1108 tritonId = triton::arch::arm::aarch64::ID_INS_PMULL2;
1109 break;
1110
1111 case triton::extlibs::capstone::ARM64_INS_PMULL:
1112 tritonId = triton::arch::arm::aarch64::ID_INS_PMULL;
1113 break;
1114
1115 case triton::extlibs::capstone::ARM64_INS_PMUL:
1116 tritonId = triton::arch::arm::aarch64::ID_INS_PMUL;
1117 break;
1118
1119 case triton::extlibs::capstone::ARM64_INS_PRFM:
1120 tritonId = triton::arch::arm::aarch64::ID_INS_PRFM;
1121 break;
1122
1123 case triton::extlibs::capstone::ARM64_INS_PRFUM:
1124 tritonId = triton::arch::arm::aarch64::ID_INS_PRFUM;
1125 break;
1126
1127 case triton::extlibs::capstone::ARM64_INS_RADDHN:
1128 tritonId = triton::arch::arm::aarch64::ID_INS_RADDHN;
1129 break;
1130
1131 case triton::extlibs::capstone::ARM64_INS_RADDHN2:
1132 tritonId = triton::arch::arm::aarch64::ID_INS_RADDHN2;
1133 break;
1134
1135 case triton::extlibs::capstone::ARM64_INS_RBIT:
1136 tritonId = triton::arch::arm::aarch64::ID_INS_RBIT;
1137 break;
1138
1139 case triton::extlibs::capstone::ARM64_INS_RET:
1140 tritonId = triton::arch::arm::aarch64::ID_INS_RET;
1141 break;
1142
1143 case triton::extlibs::capstone::ARM64_INS_REV16:
1144 tritonId = triton::arch::arm::aarch64::ID_INS_REV16;
1145 break;
1146
1147 case triton::extlibs::capstone::ARM64_INS_REV32:
1148 tritonId = triton::arch::arm::aarch64::ID_INS_REV32;
1149 break;
1150
1151 case triton::extlibs::capstone::ARM64_INS_REV64:
1152 tritonId = triton::arch::arm::aarch64::ID_INS_REV64;
1153 break;
1154
1155 case triton::extlibs::capstone::ARM64_INS_REV:
1156 tritonId = triton::arch::arm::aarch64::ID_INS_REV;
1157 break;
1158
1159 case triton::extlibs::capstone::ARM64_INS_ROR:
1160 tritonId = triton::arch::arm::aarch64::ID_INS_ROR;
1161 break;
1162
1163 case triton::extlibs::capstone::ARM64_INS_RSHRN2:
1164 tritonId = triton::arch::arm::aarch64::ID_INS_RSHRN2;
1165 break;
1166
1167 case triton::extlibs::capstone::ARM64_INS_RSHRN:
1168 tritonId = triton::arch::arm::aarch64::ID_INS_RSHRN;
1169 break;
1170
1171 case triton::extlibs::capstone::ARM64_INS_RSUBHN:
1172 tritonId = triton::arch::arm::aarch64::ID_INS_RSUBHN;
1173 break;
1174
1175 case triton::extlibs::capstone::ARM64_INS_RSUBHN2:
1176 tritonId = triton::arch::arm::aarch64::ID_INS_RSUBHN2;
1177 break;
1178
1179 case triton::extlibs::capstone::ARM64_INS_SABAL2:
1180 tritonId = triton::arch::arm::aarch64::ID_INS_SABAL2;
1181 break;
1182
1183 case triton::extlibs::capstone::ARM64_INS_SABAL:
1184 tritonId = triton::arch::arm::aarch64::ID_INS_SABAL;
1185 break;
1186
1187 case triton::extlibs::capstone::ARM64_INS_SABA:
1188 tritonId = triton::arch::arm::aarch64::ID_INS_SABA;
1189 break;
1190
1191 case triton::extlibs::capstone::ARM64_INS_SABDL2:
1192 tritonId = triton::arch::arm::aarch64::ID_INS_SABDL2;
1193 break;
1194
1195 case triton::extlibs::capstone::ARM64_INS_SABDL:
1196 tritonId = triton::arch::arm::aarch64::ID_INS_SABDL;
1197 break;
1198
1199 case triton::extlibs::capstone::ARM64_INS_SABD:
1200 tritonId = triton::arch::arm::aarch64::ID_INS_SABD;
1201 break;
1202
1203 case triton::extlibs::capstone::ARM64_INS_SADALP:
1204 tritonId = triton::arch::arm::aarch64::ID_INS_SADALP;
1205 break;
1206
1207 case triton::extlibs::capstone::ARM64_INS_SADDLP:
1208 tritonId = triton::arch::arm::aarch64::ID_INS_SADDLP;
1209 break;
1210
1211 case triton::extlibs::capstone::ARM64_INS_SADDLV:
1212 tritonId = triton::arch::arm::aarch64::ID_INS_SADDLV;
1213 break;
1214
1215 case triton::extlibs::capstone::ARM64_INS_SADDL2:
1216 tritonId = triton::arch::arm::aarch64::ID_INS_SADDL2;
1217 break;
1218
1219 case triton::extlibs::capstone::ARM64_INS_SADDL:
1220 tritonId = triton::arch::arm::aarch64::ID_INS_SADDL;
1221 break;
1222
1223 case triton::extlibs::capstone::ARM64_INS_SADDW2:
1224 tritonId = triton::arch::arm::aarch64::ID_INS_SADDW2;
1225 break;
1226
1227 case triton::extlibs::capstone::ARM64_INS_SADDW:
1228 tritonId = triton::arch::arm::aarch64::ID_INS_SADDW;
1229 break;
1230
1231 case triton::extlibs::capstone::ARM64_INS_SBC:
1232 tritonId = triton::arch::arm::aarch64::ID_INS_SBC;
1233 break;
1234
1235 #if CS_API_MAJOR >= 5
1236 case triton::extlibs::capstone::ARM64_INS_SBCS:
1237 tritonId = triton::arch::arm::aarch64::ID_INS_SBC;
1238 break;
1239 #endif
1240
1241 case triton::extlibs::capstone::ARM64_INS_SBFM:
1242 tritonId = triton::arch::arm::aarch64::ID_INS_SBFM;
1243 break;
1244
1245 case triton::extlibs::capstone::ARM64_INS_SCVTF:
1246 tritonId = triton::arch::arm::aarch64::ID_INS_SCVTF;
1247 break;
1248
1249 case triton::extlibs::capstone::ARM64_INS_SDIV:
1250 tritonId = triton::arch::arm::aarch64::ID_INS_SDIV;
1251 break;
1252
1253 case triton::extlibs::capstone::ARM64_INS_SHA1C:
1254 tritonId = triton::arch::arm::aarch64::ID_INS_SHA1C;
1255 break;
1256
1257 case triton::extlibs::capstone::ARM64_INS_SHA1H:
1258 tritonId = triton::arch::arm::aarch64::ID_INS_SHA1H;
1259 break;
1260
1261 case triton::extlibs::capstone::ARM64_INS_SHA1M:
1262 tritonId = triton::arch::arm::aarch64::ID_INS_SHA1M;
1263 break;
1264
1265 case triton::extlibs::capstone::ARM64_INS_SHA1P:
1266 tritonId = triton::arch::arm::aarch64::ID_INS_SHA1P;
1267 break;
1268
1269 case triton::extlibs::capstone::ARM64_INS_SHA1SU0:
1270 tritonId = triton::arch::arm::aarch64::ID_INS_SHA1SU0;
1271 break;
1272
1273 case triton::extlibs::capstone::ARM64_INS_SHA1SU1:
1274 tritonId = triton::arch::arm::aarch64::ID_INS_SHA1SU1;
1275 break;
1276
1277 case triton::extlibs::capstone::ARM64_INS_SHA256H2:
1278 tritonId = triton::arch::arm::aarch64::ID_INS_SHA256H2;
1279 break;
1280
1281 case triton::extlibs::capstone::ARM64_INS_SHA256H:
1282 tritonId = triton::arch::arm::aarch64::ID_INS_SHA256H;
1283 break;
1284
1285 case triton::extlibs::capstone::ARM64_INS_SHA256SU0:
1286 tritonId = triton::arch::arm::aarch64::ID_INS_SHA256SU0;
1287 break;
1288
1289 case triton::extlibs::capstone::ARM64_INS_SHA256SU1:
1290 tritonId = triton::arch::arm::aarch64::ID_INS_SHA256SU1;
1291 break;
1292
1293 case triton::extlibs::capstone::ARM64_INS_SHADD:
1294 tritonId = triton::arch::arm::aarch64::ID_INS_SHADD;
1295 break;
1296
1297 case triton::extlibs::capstone::ARM64_INS_SHLL2:
1298 tritonId = triton::arch::arm::aarch64::ID_INS_SHLL2;
1299 break;
1300
1301 case triton::extlibs::capstone::ARM64_INS_SHLL:
1302 tritonId = triton::arch::arm::aarch64::ID_INS_SHLL;
1303 break;
1304
1305 case triton::extlibs::capstone::ARM64_INS_SHL:
1306 tritonId = triton::arch::arm::aarch64::ID_INS_SHL;
1307 break;
1308
1309 case triton::extlibs::capstone::ARM64_INS_SHRN2:
1310 tritonId = triton::arch::arm::aarch64::ID_INS_SHRN2;
1311 break;
1312
1313 case triton::extlibs::capstone::ARM64_INS_SHRN:
1314 tritonId = triton::arch::arm::aarch64::ID_INS_SHRN;
1315 break;
1316
1317 case triton::extlibs::capstone::ARM64_INS_SHSUB:
1318 tritonId = triton::arch::arm::aarch64::ID_INS_SHSUB;
1319 break;
1320
1321 case triton::extlibs::capstone::ARM64_INS_SLI:
1322 tritonId = triton::arch::arm::aarch64::ID_INS_SLI;
1323 break;
1324
1325 case triton::extlibs::capstone::ARM64_INS_SMADDL:
1326 tritonId = triton::arch::arm::aarch64::ID_INS_SMADDL;
1327 break;
1328
1329 case triton::extlibs::capstone::ARM64_INS_SMAXP:
1330 tritonId = triton::arch::arm::aarch64::ID_INS_SMAXP;
1331 break;
1332
1333 case triton::extlibs::capstone::ARM64_INS_SMAXV:
1334 tritonId = triton::arch::arm::aarch64::ID_INS_SMAXV;
1335 break;
1336
1337 case triton::extlibs::capstone::ARM64_INS_SMAX:
1338 tritonId = triton::arch::arm::aarch64::ID_INS_SMAX;
1339 break;
1340
1341 case triton::extlibs::capstone::ARM64_INS_SMC:
1342 tritonId = triton::arch::arm::aarch64::ID_INS_SMC;
1343 break;
1344
1345 case triton::extlibs::capstone::ARM64_INS_SMINP:
1346 tritonId = triton::arch::arm::aarch64::ID_INS_SMINP;
1347 break;
1348
1349 case triton::extlibs::capstone::ARM64_INS_SMINV:
1350 tritonId = triton::arch::arm::aarch64::ID_INS_SMINV;
1351 break;
1352
1353 case triton::extlibs::capstone::ARM64_INS_SMIN:
1354 tritonId = triton::arch::arm::aarch64::ID_INS_SMIN;
1355 break;
1356
1357 case triton::extlibs::capstone::ARM64_INS_SMLAL2:
1358 tritonId = triton::arch::arm::aarch64::ID_INS_SMLAL2;
1359 break;
1360
1361 case triton::extlibs::capstone::ARM64_INS_SMLAL:
1362 tritonId = triton::arch::arm::aarch64::ID_INS_SMLAL;
1363 break;
1364
1365 case triton::extlibs::capstone::ARM64_INS_SMLSL2:
1366 tritonId = triton::arch::arm::aarch64::ID_INS_SMLSL2;
1367 break;
1368
1369 case triton::extlibs::capstone::ARM64_INS_SMLSL:
1370 tritonId = triton::arch::arm::aarch64::ID_INS_SMLSL;
1371 break;
1372
1373 case triton::extlibs::capstone::ARM64_INS_SMOV:
1374 tritonId = triton::arch::arm::aarch64::ID_INS_SMOV;
1375 break;
1376
1377 case triton::extlibs::capstone::ARM64_INS_SMSUBL:
1378 tritonId = triton::arch::arm::aarch64::ID_INS_SMSUBL;
1379 break;
1380
1381 case triton::extlibs::capstone::ARM64_INS_SMULH:
1382 tritonId = triton::arch::arm::aarch64::ID_INS_SMULH;
1383 break;
1384
1385 case triton::extlibs::capstone::ARM64_INS_SMULL2:
1386 tritonId = triton::arch::arm::aarch64::ID_INS_SMULL2;
1387 break;
1388
1389 case triton::extlibs::capstone::ARM64_INS_SMULL:
1390 tritonId = triton::arch::arm::aarch64::ID_INS_SMULL;
1391 break;
1392
1393 case triton::extlibs::capstone::ARM64_INS_SQABS:
1394 tritonId = triton::arch::arm::aarch64::ID_INS_SQABS;
1395 break;
1396
1397 case triton::extlibs::capstone::ARM64_INS_SQADD:
1398 tritonId = triton::arch::arm::aarch64::ID_INS_SQADD;
1399 break;
1400
1401 case triton::extlibs::capstone::ARM64_INS_SQDMLAL:
1402 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMLAL;
1403 break;
1404
1405 case triton::extlibs::capstone::ARM64_INS_SQDMLAL2:
1406 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMLAL2;
1407 break;
1408
1409 case triton::extlibs::capstone::ARM64_INS_SQDMLSL:
1410 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMLSL;
1411 break;
1412
1413 case triton::extlibs::capstone::ARM64_INS_SQDMLSL2:
1414 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMLSL2;
1415 break;
1416
1417 case triton::extlibs::capstone::ARM64_INS_SQDMULH:
1418 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMULH;
1419 break;
1420
1421 case triton::extlibs::capstone::ARM64_INS_SQDMULL:
1422 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMULL;
1423 break;
1424
1425 case triton::extlibs::capstone::ARM64_INS_SQDMULL2:
1426 tritonId = triton::arch::arm::aarch64::ID_INS_SQDMULL2;
1427 break;
1428
1429 case triton::extlibs::capstone::ARM64_INS_SQNEG:
1430 tritonId = triton::arch::arm::aarch64::ID_INS_SQNEG;
1431 break;
1432
1433 case triton::extlibs::capstone::ARM64_INS_SQRDMULH:
1434 tritonId = triton::arch::arm::aarch64::ID_INS_SQRDMULH;
1435 break;
1436
1437 case triton::extlibs::capstone::ARM64_INS_SQRSHL:
1438 tritonId = triton::arch::arm::aarch64::ID_INS_SQRSHL;
1439 break;
1440
1441 case triton::extlibs::capstone::ARM64_INS_SQRSHRN:
1442 tritonId = triton::arch::arm::aarch64::ID_INS_SQRSHRN;
1443 break;
1444
1445 case triton::extlibs::capstone::ARM64_INS_SQRSHRN2:
1446 tritonId = triton::arch::arm::aarch64::ID_INS_SQRSHRN2;
1447 break;
1448
1449 case triton::extlibs::capstone::ARM64_INS_SQRSHRUN:
1450 tritonId = triton::arch::arm::aarch64::ID_INS_SQRSHRUN;
1451 break;
1452
1453 case triton::extlibs::capstone::ARM64_INS_SQRSHRUN2:
1454 tritonId = triton::arch::arm::aarch64::ID_INS_SQRSHRUN2;
1455 break;
1456
1457 case triton::extlibs::capstone::ARM64_INS_SQSHLU:
1458 tritonId = triton::arch::arm::aarch64::ID_INS_SQSHLU;
1459 break;
1460
1461 case triton::extlibs::capstone::ARM64_INS_SQSHL:
1462 tritonId = triton::arch::arm::aarch64::ID_INS_SQSHL;
1463 break;
1464
1465 case triton::extlibs::capstone::ARM64_INS_SQSHRN:
1466 tritonId = triton::arch::arm::aarch64::ID_INS_SQSHRN;
1467 break;
1468
1469 case triton::extlibs::capstone::ARM64_INS_SQSHRN2:
1470 tritonId = triton::arch::arm::aarch64::ID_INS_SQSHRN2;
1471 break;
1472
1473 case triton::extlibs::capstone::ARM64_INS_SQSHRUN:
1474 tritonId = triton::arch::arm::aarch64::ID_INS_SQSHRUN;
1475 break;
1476
1477 case triton::extlibs::capstone::ARM64_INS_SQSHRUN2:
1478 tritonId = triton::arch::arm::aarch64::ID_INS_SQSHRUN2;
1479 break;
1480
1481 case triton::extlibs::capstone::ARM64_INS_SQSUB:
1482 tritonId = triton::arch::arm::aarch64::ID_INS_SQSUB;
1483 break;
1484
1485 case triton::extlibs::capstone::ARM64_INS_SQXTN2:
1486 tritonId = triton::arch::arm::aarch64::ID_INS_SQXTN2;
1487 break;
1488
1489 case triton::extlibs::capstone::ARM64_INS_SQXTN:
1490 tritonId = triton::arch::arm::aarch64::ID_INS_SQXTN;
1491 break;
1492
1493 case triton::extlibs::capstone::ARM64_INS_SQXTUN2:
1494 tritonId = triton::arch::arm::aarch64::ID_INS_SQXTUN2;
1495 break;
1496
1497 case triton::extlibs::capstone::ARM64_INS_SQXTUN:
1498 tritonId = triton::arch::arm::aarch64::ID_INS_SQXTUN;
1499 break;
1500
1501 case triton::extlibs::capstone::ARM64_INS_SRHADD:
1502 tritonId = triton::arch::arm::aarch64::ID_INS_SRHADD;
1503 break;
1504
1505 case triton::extlibs::capstone::ARM64_INS_SRI:
1506 tritonId = triton::arch::arm::aarch64::ID_INS_SRI;
1507 break;
1508
1509 case triton::extlibs::capstone::ARM64_INS_SRSHL:
1510 tritonId = triton::arch::arm::aarch64::ID_INS_SRSHL;
1511 break;
1512
1513 case triton::extlibs::capstone::ARM64_INS_SRSHR:
1514 tritonId = triton::arch::arm::aarch64::ID_INS_SRSHR;
1515 break;
1516
1517 case triton::extlibs::capstone::ARM64_INS_SRSRA:
1518 tritonId = triton::arch::arm::aarch64::ID_INS_SRSRA;
1519 break;
1520
1521 case triton::extlibs::capstone::ARM64_INS_SSHLL2:
1522 tritonId = triton::arch::arm::aarch64::ID_INS_SSHLL2;
1523 break;
1524
1525 case triton::extlibs::capstone::ARM64_INS_SSHLL:
1526 tritonId = triton::arch::arm::aarch64::ID_INS_SSHLL;
1527 break;
1528
1529 case triton::extlibs::capstone::ARM64_INS_SSHL:
1530 tritonId = triton::arch::arm::aarch64::ID_INS_SSHL;
1531 break;
1532
1533 case triton::extlibs::capstone::ARM64_INS_SSHR:
1534 tritonId = triton::arch::arm::aarch64::ID_INS_SSHR;
1535 break;
1536
1537 case triton::extlibs::capstone::ARM64_INS_SSRA:
1538 tritonId = triton::arch::arm::aarch64::ID_INS_SSRA;
1539 break;
1540
1541 case triton::extlibs::capstone::ARM64_INS_SSUBL2:
1542 tritonId = triton::arch::arm::aarch64::ID_INS_SSUBL2;
1543 break;
1544
1545 case triton::extlibs::capstone::ARM64_INS_SSUBL:
1546 tritonId = triton::arch::arm::aarch64::ID_INS_SSUBL;
1547 break;
1548
1549 case triton::extlibs::capstone::ARM64_INS_SSUBW2:
1550 tritonId = triton::arch::arm::aarch64::ID_INS_SSUBW2;
1551 break;
1552
1553 case triton::extlibs::capstone::ARM64_INS_SSUBW:
1554 tritonId = triton::arch::arm::aarch64::ID_INS_SSUBW;
1555 break;
1556
1557 case triton::extlibs::capstone::ARM64_INS_ST1:
1558 tritonId = triton::arch::arm::aarch64::ID_INS_ST1;
1559 break;
1560
1561 case triton::extlibs::capstone::ARM64_INS_ST2:
1562 tritonId = triton::arch::arm::aarch64::ID_INS_ST2;
1563 break;
1564
1565 case triton::extlibs::capstone::ARM64_INS_ST3:
1566 tritonId = triton::arch::arm::aarch64::ID_INS_ST3;
1567 break;
1568
1569 case triton::extlibs::capstone::ARM64_INS_ST4:
1570 tritonId = triton::arch::arm::aarch64::ID_INS_ST4;
1571 break;
1572
1573 case triton::extlibs::capstone::ARM64_INS_STLRB:
1574 tritonId = triton::arch::arm::aarch64::ID_INS_STLRB;
1575 break;
1576
1577 case triton::extlibs::capstone::ARM64_INS_STLRH:
1578 tritonId = triton::arch::arm::aarch64::ID_INS_STLRH;
1579 break;
1580
1581 case triton::extlibs::capstone::ARM64_INS_STLR:
1582 tritonId = triton::arch::arm::aarch64::ID_INS_STLR;
1583 break;
1584
1585 case triton::extlibs::capstone::ARM64_INS_STLXP:
1586 tritonId = triton::arch::arm::aarch64::ID_INS_STLXP;
1587 break;
1588
1589 case triton::extlibs::capstone::ARM64_INS_STLXRB:
1590 tritonId = triton::arch::arm::aarch64::ID_INS_STLXRB;
1591 break;
1592
1593 case triton::extlibs::capstone::ARM64_INS_STLXRH:
1594 tritonId = triton::arch::arm::aarch64::ID_INS_STLXRH;
1595 break;
1596
1597 case triton::extlibs::capstone::ARM64_INS_STLXR:
1598 tritonId = triton::arch::arm::aarch64::ID_INS_STLXR;
1599 break;
1600
1601 case triton::extlibs::capstone::ARM64_INS_STNP:
1602 tritonId = triton::arch::arm::aarch64::ID_INS_STNP;
1603 break;
1604
1605 case triton::extlibs::capstone::ARM64_INS_STP:
1606 tritonId = triton::arch::arm::aarch64::ID_INS_STP;
1607 break;
1608
1609 case triton::extlibs::capstone::ARM64_INS_STRB:
1610 tritonId = triton::arch::arm::aarch64::ID_INS_STRB;
1611 break;
1612
1613 case triton::extlibs::capstone::ARM64_INS_STR:
1614 tritonId = triton::arch::arm::aarch64::ID_INS_STR;
1615 break;
1616
1617 case triton::extlibs::capstone::ARM64_INS_STRH:
1618 tritonId = triton::arch::arm::aarch64::ID_INS_STRH;
1619 break;
1620
1621 case triton::extlibs::capstone::ARM64_INS_STTRB:
1622 tritonId = triton::arch::arm::aarch64::ID_INS_STTRB;
1623 break;
1624
1625 case triton::extlibs::capstone::ARM64_INS_STTRH:
1626 tritonId = triton::arch::arm::aarch64::ID_INS_STTRH;
1627 break;
1628
1629 case triton::extlibs::capstone::ARM64_INS_STTR:
1630 tritonId = triton::arch::arm::aarch64::ID_INS_STTR;
1631 break;
1632
1633 case triton::extlibs::capstone::ARM64_INS_STURB:
1634 tritonId = triton::arch::arm::aarch64::ID_INS_STURB;
1635 break;
1636
1637 case triton::extlibs::capstone::ARM64_INS_STUR:
1638 tritonId = triton::arch::arm::aarch64::ID_INS_STUR;
1639 break;
1640
1641 case triton::extlibs::capstone::ARM64_INS_STURH:
1642 tritonId = triton::arch::arm::aarch64::ID_INS_STURH;
1643 break;
1644
1645 case triton::extlibs::capstone::ARM64_INS_STXP:
1646 tritonId = triton::arch::arm::aarch64::ID_INS_STXP;
1647 break;
1648
1649 case triton::extlibs::capstone::ARM64_INS_STXRB:
1650 tritonId = triton::arch::arm::aarch64::ID_INS_STXRB;
1651 break;
1652
1653 case triton::extlibs::capstone::ARM64_INS_STXRH:
1654 tritonId = triton::arch::arm::aarch64::ID_INS_STXRH;
1655 break;
1656
1657 case triton::extlibs::capstone::ARM64_INS_STXR:
1658 tritonId = triton::arch::arm::aarch64::ID_INS_STXR;
1659 break;
1660
1661 case triton::extlibs::capstone::ARM64_INS_SUBHN:
1662 tritonId = triton::arch::arm::aarch64::ID_INS_SUBHN;
1663 break;
1664
1665 case triton::extlibs::capstone::ARM64_INS_SUBHN2:
1666 tritonId = triton::arch::arm::aarch64::ID_INS_SUBHN2;
1667 break;
1668
1669 #if CS_API_MAJOR >= 5
1670 case triton::extlibs::capstone::ARM64_INS_SUBS:
1671 tritonId = triton::arch::arm::aarch64::ID_INS_SUB;
1672 break;
1673 #endif
1674
1675 case triton::extlibs::capstone::ARM64_INS_SUB:
1676 tritonId = triton::arch::arm::aarch64::ID_INS_SUB;
1677 break;
1678
1679 case triton::extlibs::capstone::ARM64_INS_SUQADD:
1680 tritonId = triton::arch::arm::aarch64::ID_INS_SUQADD;
1681 break;
1682
1683 case triton::extlibs::capstone::ARM64_INS_SVC:
1684 tritonId = triton::arch::arm::aarch64::ID_INS_SVC;
1685 break;
1686
1687 case triton::extlibs::capstone::ARM64_INS_SYSL:
1688 tritonId = triton::arch::arm::aarch64::ID_INS_SYSL;
1689 break;
1690
1691 case triton::extlibs::capstone::ARM64_INS_SYS:
1692 tritonId = triton::arch::arm::aarch64::ID_INS_SYS;
1693 break;
1694
1695 case triton::extlibs::capstone::ARM64_INS_TBL:
1696 tritonId = triton::arch::arm::aarch64::ID_INS_TBL;
1697 break;
1698
1699 case triton::extlibs::capstone::ARM64_INS_TBNZ:
1700 tritonId = triton::arch::arm::aarch64::ID_INS_TBNZ;
1701 break;
1702
1703 case triton::extlibs::capstone::ARM64_INS_TBX:
1704 tritonId = triton::arch::arm::aarch64::ID_INS_TBX;
1705 break;
1706
1707 case triton::extlibs::capstone::ARM64_INS_TBZ:
1708 tritonId = triton::arch::arm::aarch64::ID_INS_TBZ;
1709 break;
1710
1711 case triton::extlibs::capstone::ARM64_INS_TRN1:
1712 tritonId = triton::arch::arm::aarch64::ID_INS_TRN1;
1713 break;
1714
1715 case triton::extlibs::capstone::ARM64_INS_TRN2:
1716 tritonId = triton::arch::arm::aarch64::ID_INS_TRN2;
1717 break;
1718
1719 case triton::extlibs::capstone::ARM64_INS_UABAL2:
1720 tritonId = triton::arch::arm::aarch64::ID_INS_UABAL2;
1721 break;
1722
1723 case triton::extlibs::capstone::ARM64_INS_UABAL:
1724 tritonId = triton::arch::arm::aarch64::ID_INS_UABAL;
1725 break;
1726
1727 case triton::extlibs::capstone::ARM64_INS_UABA:
1728 tritonId = triton::arch::arm::aarch64::ID_INS_UABA;
1729 break;
1730
1731 case triton::extlibs::capstone::ARM64_INS_UABDL2:
1732 tritonId = triton::arch::arm::aarch64::ID_INS_UABDL2;
1733 break;
1734
1735 case triton::extlibs::capstone::ARM64_INS_UABDL:
1736 tritonId = triton::arch::arm::aarch64::ID_INS_UABDL;
1737 break;
1738
1739 case triton::extlibs::capstone::ARM64_INS_UABD:
1740 tritonId = triton::arch::arm::aarch64::ID_INS_UABD;
1741 break;
1742
1743 case triton::extlibs::capstone::ARM64_INS_UADALP:
1744 tritonId = triton::arch::arm::aarch64::ID_INS_UADALP;
1745 break;
1746
1747 case triton::extlibs::capstone::ARM64_INS_UADDLP:
1748 tritonId = triton::arch::arm::aarch64::ID_INS_UADDLP;
1749 break;
1750
1751 case triton::extlibs::capstone::ARM64_INS_UADDLV:
1752 tritonId = triton::arch::arm::aarch64::ID_INS_UADDLV;
1753 break;
1754
1755 case triton::extlibs::capstone::ARM64_INS_UADDL2:
1756 tritonId = triton::arch::arm::aarch64::ID_INS_UADDL2;
1757 break;
1758
1759 case triton::extlibs::capstone::ARM64_INS_UADDL:
1760 tritonId = triton::arch::arm::aarch64::ID_INS_UADDL;
1761 break;
1762
1763 case triton::extlibs::capstone::ARM64_INS_UADDW2:
1764 tritonId = triton::arch::arm::aarch64::ID_INS_UADDW2;
1765 break;
1766
1767 case triton::extlibs::capstone::ARM64_INS_UADDW:
1768 tritonId = triton::arch::arm::aarch64::ID_INS_UADDW;
1769 break;
1770
1771 case triton::extlibs::capstone::ARM64_INS_UBFM:
1772 tritonId = triton::arch::arm::aarch64::ID_INS_UBFM;
1773 break;
1774
1775 case triton::extlibs::capstone::ARM64_INS_UCVTF:
1776 tritonId = triton::arch::arm::aarch64::ID_INS_UCVTF;
1777 break;
1778
1779 case triton::extlibs::capstone::ARM64_INS_UDIV:
1780 tritonId = triton::arch::arm::aarch64::ID_INS_UDIV;
1781 break;
1782
1783 case triton::extlibs::capstone::ARM64_INS_UHADD:
1784 tritonId = triton::arch::arm::aarch64::ID_INS_UHADD;
1785 break;
1786
1787 case triton::extlibs::capstone::ARM64_INS_UHSUB:
1788 tritonId = triton::arch::arm::aarch64::ID_INS_UHSUB;
1789 break;
1790
1791 case triton::extlibs::capstone::ARM64_INS_UMADDL:
1792 tritonId = triton::arch::arm::aarch64::ID_INS_UMADDL;
1793 break;
1794
1795 case triton::extlibs::capstone::ARM64_INS_UMAXP:
1796 tritonId = triton::arch::arm::aarch64::ID_INS_UMAXP;
1797 break;
1798
1799 case triton::extlibs::capstone::ARM64_INS_UMAXV:
1800 tritonId = triton::arch::arm::aarch64::ID_INS_UMAXV;
1801 break;
1802
1803 case triton::extlibs::capstone::ARM64_INS_UMAX:
1804 tritonId = triton::arch::arm::aarch64::ID_INS_UMAX;
1805 break;
1806
1807 case triton::extlibs::capstone::ARM64_INS_UMINP:
1808 tritonId = triton::arch::arm::aarch64::ID_INS_UMINP;
1809 break;
1810
1811 case triton::extlibs::capstone::ARM64_INS_UMINV:
1812 tritonId = triton::arch::arm::aarch64::ID_INS_UMINV;
1813 break;
1814
1815 case triton::extlibs::capstone::ARM64_INS_UMIN:
1816 tritonId = triton::arch::arm::aarch64::ID_INS_UMIN;
1817 break;
1818
1819 case triton::extlibs::capstone::ARM64_INS_UMLAL2:
1820 tritonId = triton::arch::arm::aarch64::ID_INS_UMLAL2;
1821 break;
1822
1823 case triton::extlibs::capstone::ARM64_INS_UMLAL:
1824 tritonId = triton::arch::arm::aarch64::ID_INS_UMLAL;
1825 break;
1826
1827 case triton::extlibs::capstone::ARM64_INS_UMLSL2:
1828 tritonId = triton::arch::arm::aarch64::ID_INS_UMLSL2;
1829 break;
1830
1831 case triton::extlibs::capstone::ARM64_INS_UMLSL:
1832 tritonId = triton::arch::arm::aarch64::ID_INS_UMLSL;
1833 break;
1834
1835 case triton::extlibs::capstone::ARM64_INS_UMOV:
1836 tritonId = triton::arch::arm::aarch64::ID_INS_UMOV;
1837 break;
1838
1839 case triton::extlibs::capstone::ARM64_INS_UMSUBL:
1840 tritonId = triton::arch::arm::aarch64::ID_INS_UMSUBL;
1841 break;
1842
1843 case triton::extlibs::capstone::ARM64_INS_UMULH:
1844 tritonId = triton::arch::arm::aarch64::ID_INS_UMULH;
1845 break;
1846
1847 case triton::extlibs::capstone::ARM64_INS_UMULL2:
1848 tritonId = triton::arch::arm::aarch64::ID_INS_UMULL2;
1849 break;
1850
1851 case triton::extlibs::capstone::ARM64_INS_UMULL:
1852 tritonId = triton::arch::arm::aarch64::ID_INS_UMULL;
1853 break;
1854
1855 case triton::extlibs::capstone::ARM64_INS_UQADD:
1856 tritonId = triton::arch::arm::aarch64::ID_INS_UQADD;
1857 break;
1858
1859 case triton::extlibs::capstone::ARM64_INS_UQRSHL:
1860 tritonId = triton::arch::arm::aarch64::ID_INS_UQRSHL;
1861 break;
1862
1863 case triton::extlibs::capstone::ARM64_INS_UQRSHRN:
1864 tritonId = triton::arch::arm::aarch64::ID_INS_UQRSHRN;
1865 break;
1866
1867 case triton::extlibs::capstone::ARM64_INS_UQRSHRN2:
1868 tritonId = triton::arch::arm::aarch64::ID_INS_UQRSHRN2;
1869 break;
1870
1871 case triton::extlibs::capstone::ARM64_INS_UQSHL:
1872 tritonId = triton::arch::arm::aarch64::ID_INS_UQSHL;
1873 break;
1874
1875 case triton::extlibs::capstone::ARM64_INS_UQSHRN:
1876 tritonId = triton::arch::arm::aarch64::ID_INS_UQSHRN;
1877 break;
1878
1879 case triton::extlibs::capstone::ARM64_INS_UQSHRN2:
1880 tritonId = triton::arch::arm::aarch64::ID_INS_UQSHRN2;
1881 break;
1882
1883 case triton::extlibs::capstone::ARM64_INS_UQSUB:
1884 tritonId = triton::arch::arm::aarch64::ID_INS_UQSUB;
1885 break;
1886
1887 case triton::extlibs::capstone::ARM64_INS_UQXTN2:
1888 tritonId = triton::arch::arm::aarch64::ID_INS_UQXTN2;
1889 break;
1890
1891 case triton::extlibs::capstone::ARM64_INS_UQXTN:
1892 tritonId = triton::arch::arm::aarch64::ID_INS_UQXTN;
1893 break;
1894
1895 case triton::extlibs::capstone::ARM64_INS_URECPE:
1896 tritonId = triton::arch::arm::aarch64::ID_INS_URECPE;
1897 break;
1898
1899 case triton::extlibs::capstone::ARM64_INS_URHADD:
1900 tritonId = triton::arch::arm::aarch64::ID_INS_URHADD;
1901 break;
1902
1903 case triton::extlibs::capstone::ARM64_INS_URSHL:
1904 tritonId = triton::arch::arm::aarch64::ID_INS_URSHL;
1905 break;
1906
1907 case triton::extlibs::capstone::ARM64_INS_URSHR:
1908 tritonId = triton::arch::arm::aarch64::ID_INS_URSHR;
1909 break;
1910
1911 case triton::extlibs::capstone::ARM64_INS_URSQRTE:
1912 tritonId = triton::arch::arm::aarch64::ID_INS_URSQRTE;
1913 break;
1914
1915 case triton::extlibs::capstone::ARM64_INS_URSRA:
1916 tritonId = triton::arch::arm::aarch64::ID_INS_URSRA;
1917 break;
1918
1919 case triton::extlibs::capstone::ARM64_INS_USHLL2:
1920 tritonId = triton::arch::arm::aarch64::ID_INS_USHLL2;
1921 break;
1922
1923 case triton::extlibs::capstone::ARM64_INS_USHLL:
1924 tritonId = triton::arch::arm::aarch64::ID_INS_USHLL;
1925 break;
1926
1927 case triton::extlibs::capstone::ARM64_INS_USHL:
1928 tritonId = triton::arch::arm::aarch64::ID_INS_USHL;
1929 break;
1930
1931 case triton::extlibs::capstone::ARM64_INS_USHR:
1932 tritonId = triton::arch::arm::aarch64::ID_INS_USHR;
1933 break;
1934
1935 case triton::extlibs::capstone::ARM64_INS_USQADD:
1936 tritonId = triton::arch::arm::aarch64::ID_INS_USQADD;
1937 break;
1938
1939 case triton::extlibs::capstone::ARM64_INS_USRA:
1940 tritonId = triton::arch::arm::aarch64::ID_INS_USRA;
1941 break;
1942
1943 case triton::extlibs::capstone::ARM64_INS_USUBL2:
1944 tritonId = triton::arch::arm::aarch64::ID_INS_USUBL2;
1945 break;
1946
1947 case triton::extlibs::capstone::ARM64_INS_USUBL:
1948 tritonId = triton::arch::arm::aarch64::ID_INS_USUBL;
1949 break;
1950
1951 case triton::extlibs::capstone::ARM64_INS_USUBW2:
1952 tritonId = triton::arch::arm::aarch64::ID_INS_USUBW2;
1953 break;
1954
1955 case triton::extlibs::capstone::ARM64_INS_USUBW:
1956 tritonId = triton::arch::arm::aarch64::ID_INS_USUBW;
1957 break;
1958
1959 case triton::extlibs::capstone::ARM64_INS_UZP1:
1960 tritonId = triton::arch::arm::aarch64::ID_INS_UZP1;
1961 break;
1962
1963 case triton::extlibs::capstone::ARM64_INS_UZP2:
1964 tritonId = triton::arch::arm::aarch64::ID_INS_UZP2;
1965 break;
1966
1967 case triton::extlibs::capstone::ARM64_INS_XTN2:
1968 tritonId = triton::arch::arm::aarch64::ID_INS_XTN2;
1969 break;
1970
1971 case triton::extlibs::capstone::ARM64_INS_XTN:
1972 tritonId = triton::arch::arm::aarch64::ID_INS_XTN;
1973 break;
1974
1975 case triton::extlibs::capstone::ARM64_INS_ZIP1:
1976 tritonId = triton::arch::arm::aarch64::ID_INS_ZIP1;
1977 break;
1978
1979 case triton::extlibs::capstone::ARM64_INS_ZIP2:
1980 tritonId = triton::arch::arm::aarch64::ID_INS_ZIP2;
1981 break;
1982
1983 /* From here there are alias but considered as instruction */
1984
1985 case triton::extlibs::capstone::ARM64_INS_MNEG:
1986 tritonId = triton::arch::arm::aarch64::ID_INS_MNEG;
1987 break;
1988
1989 case triton::extlibs::capstone::ARM64_INS_UMNEGL:
1990 tritonId = triton::arch::arm::aarch64::ID_INS_UMNEGL;
1991 break;
1992
1993 case triton::extlibs::capstone::ARM64_INS_SMNEGL:
1994 tritonId = triton::arch::arm::aarch64::ID_INS_SMNEGL;
1995 break;
1996
1997 case triton::extlibs::capstone::ARM64_INS_NOP:
1998 tritonId = triton::arch::arm::aarch64::ID_INS_NOP;
1999 break;
2000
2001 case triton::extlibs::capstone::ARM64_INS_YIELD:
2002 tritonId = triton::arch::arm::aarch64::ID_INS_YIELD;
2003 break;
2004
2005 case triton::extlibs::capstone::ARM64_INS_WFE:
2006 tritonId = triton::arch::arm::aarch64::ID_INS_WFE;
2007 break;
2008
2009 case triton::extlibs::capstone::ARM64_INS_WFI:
2010 tritonId = triton::arch::arm::aarch64::ID_INS_WFI;
2011 break;
2012
2013 case triton::extlibs::capstone::ARM64_INS_SEV:
2014 tritonId = triton::arch::arm::aarch64::ID_INS_SEV;
2015 break;
2016
2017 case triton::extlibs::capstone::ARM64_INS_SEVL:
2018 tritonId = triton::arch::arm::aarch64::ID_INS_SEVL;
2019 break;
2020
2021 case triton::extlibs::capstone::ARM64_INS_NGC:
2022 tritonId = triton::arch::arm::aarch64::ID_INS_NGC;
2023 break;
2024
2025 case triton::extlibs::capstone::ARM64_INS_SBFIZ:
2026 tritonId = triton::arch::arm::aarch64::ID_INS_SBFIZ;
2027 break;
2028
2029 case triton::extlibs::capstone::ARM64_INS_UBFIZ:
2030 tritonId = triton::arch::arm::aarch64::ID_INS_UBFIZ;
2031 break;
2032
2033 case triton::extlibs::capstone::ARM64_INS_SBFX:
2034 tritonId = triton::arch::arm::aarch64::ID_INS_SBFX;
2035 break;
2036
2037 case triton::extlibs::capstone::ARM64_INS_UBFX:
2038 tritonId = triton::arch::arm::aarch64::ID_INS_UBFX;
2039 break;
2040
2041 case triton::extlibs::capstone::ARM64_INS_BFI:
2042 tritonId = triton::arch::arm::aarch64::ID_INS_BFI;
2043 break;
2044
2045 case triton::extlibs::capstone::ARM64_INS_BFXIL:
2046 tritonId = triton::arch::arm::aarch64::ID_INS_BFXIL;
2047 break;
2048
2049 case triton::extlibs::capstone::ARM64_INS_CMN:
2050 tritonId = triton::arch::arm::aarch64::ID_INS_CMN;
2051 break;
2052
2053 case triton::extlibs::capstone::ARM64_INS_MVN:
2054 tritonId = triton::arch::arm::aarch64::ID_INS_MVN;
2055 break;
2056
2057 case triton::extlibs::capstone::ARM64_INS_TST:
2058 tritonId = triton::arch::arm::aarch64::ID_INS_TST;
2059 break;
2060
2061 case triton::extlibs::capstone::ARM64_INS_CSET:
2062 tritonId = triton::arch::arm::aarch64::ID_INS_CSET;
2063 break;
2064
2065 case triton::extlibs::capstone::ARM64_INS_CINC:
2066 tritonId = triton::arch::arm::aarch64::ID_INS_CINC;
2067 break;
2068
2069 case triton::extlibs::capstone::ARM64_INS_CSETM:
2070 tritonId = triton::arch::arm::aarch64::ID_INS_CSETM;
2071 break;
2072
2073 case triton::extlibs::capstone::ARM64_INS_CINV:
2074 tritonId = triton::arch::arm::aarch64::ID_INS_CINV;
2075 break;
2076
2077 case triton::extlibs::capstone::ARM64_INS_CNEG:
2078 tritonId = triton::arch::arm::aarch64::ID_INS_CNEG;
2079 break;
2080
2081 case triton::extlibs::capstone::ARM64_INS_SXTB:
2082 tritonId = triton::arch::arm::aarch64::ID_INS_SXTB;
2083 break;
2084
2085 case triton::extlibs::capstone::ARM64_INS_SXTH:
2086 tritonId = triton::arch::arm::aarch64::ID_INS_SXTH;
2087 break;
2088
2089 case triton::extlibs::capstone::ARM64_INS_SXTW:
2090 tritonId = triton::arch::arm::aarch64::ID_INS_SXTW;
2091 break;
2092
2093 case triton::extlibs::capstone::ARM64_INS_CMP:
2094 tritonId = triton::arch::arm::aarch64::ID_INS_CMP;
2095 break;
2096
2097 case triton::extlibs::capstone::ARM64_INS_UXTB:
2098 tritonId = triton::arch::arm::aarch64::ID_INS_UXTB;
2099 break;
2100
2101 case triton::extlibs::capstone::ARM64_INS_UXTH:
2102 tritonId = triton::arch::arm::aarch64::ID_INS_UXTH;
2103 break;
2104
2105 case triton::extlibs::capstone::ARM64_INS_UXTW:
2106 tritonId = triton::arch::arm::aarch64::ID_INS_UXTW;
2107 break;
2108
2109 case triton::extlibs::capstone::ARM64_INS_IC:
2110 tritonId = triton::arch::arm::aarch64::ID_INS_IC;
2111 break;
2112
2113 case triton::extlibs::capstone::ARM64_INS_DC:
2114 tritonId = triton::arch::arm::aarch64::ID_INS_DC;
2115 break;
2116
2117 case triton::extlibs::capstone::ARM64_INS_AT:
2118 tritonId = triton::arch::arm::aarch64::ID_INS_AT;
2119 break;
2120
2121 case triton::extlibs::capstone::ARM64_INS_TLBI:
2122 tritonId = triton::arch::arm::aarch64::ID_INS_TLBI;
2123 break;
2124
2125 default:
2126 tritonId = triton::arch::arm::aarch64::ID_INS_INVALID;
2127 break;
2128 }
2129
2130 return tritonId;
2131 }
2132
2133
2134 triton::uint32 AArch64Specifications::getMemoryOperandSpecialSize(triton::uint32 id) const {
2135 switch (id) {
2136 case ID_INS_LDARB:
2137 case ID_INS_LDAXRB:
2138 case ID_INS_LDRB:
2139 case ID_INS_LDRSB:
2140 case ID_INS_LDTRB:
2141 case ID_INS_LDTRSB:
2142 case ID_INS_LDURB:
2143 case ID_INS_LDURSB:
2144 case ID_INS_LDXRB:
2145 case ID_INS_STLRB:
2146 case ID_INS_STLXRB:
2147 case ID_INS_STRB:
2148 case ID_INS_STTRB:
2149 case ID_INS_STURB:
2150 case ID_INS_STXRB:
2151 return 1;
2152 case ID_INS_LDARH:
2153 case ID_INS_LDAXRH:
2154 case ID_INS_LDRH:
2155 case ID_INS_LDRSH:
2156 case ID_INS_LDTRH:
2157 case ID_INS_LDTRSH:
2158 case ID_INS_LDURH:
2159 case ID_INS_LDURSH:
2160 case ID_INS_LDXRH:
2161 case ID_INS_STLRH:
2162 case ID_INS_STLXRH:
2163 case ID_INS_STRH:
2164 case ID_INS_STTRH:
2165 case ID_INS_STURH:
2166 case ID_INS_STXRH:
2167 return 2;
2168 case ID_INS_LDRSW:
2169 case ID_INS_LDTRSW:
2170 case ID_INS_LDURSW:
2171 return 4;
2172 default:
2173 return 0;
2174 }
2175 }
2176
2177 }; /* aarch64 namespace */
2178 }; /* arm namespace */
2179 }; /* arch namespace */
2180}; /* triton namespace */
triton::arch::arm::aarch64::AArch64Specifications::getMemoryOperandSpecialSize
TRITON_EXPORT triton::uint32 getMemoryOperandSpecialSize(triton::uint32 id) const
Returns memory access size if it is specified by instruction.
Definition: aarch64Specifications.cpp:2134
triton::arch::arm::aarch64::AArch64Specifications::capstoneVASToTritonVAS
TRITON_EXPORT triton::arch::arm::vas_e capstoneVASToTritonVAS(triton::uint32 id) const
Converts a capstone's vas id to a triton's vas id.
Definition: aarch64Specifications.cpp:155
triton::arch::arm::aarch64::AArch64Specifications::capstoneConditionToTritonCondition
TRITON_EXPORT triton::arch::arm::condition_e capstoneConditionToTritonCondition(triton::uint32 id) const
Converts a capstone's condition id to a triton's condition id.
Definition: aarch64Specifications.cpp:204
triton::arch::arm::aarch64::AArch64Specifications::capstoneShiftToTritonShift
TRITON_EXPORT triton::arch::arm::shift_e capstoneShiftToTritonShift(triton::uint32 id) const
Converts a capstone's shift id to a triton's shift id.
Definition: aarch64Specifications.cpp:73
triton::arch::arm::aarch64::AArch64Specifications::AArch64Specifications
TRITON_EXPORT AArch64Specifications(triton::arch::architecture_e)
Constructor.
Definition: aarch64Specifications.cpp:21
triton::arch::arm::aarch64::AArch64Specifications::capstoneRegisterToTritonRegister
TRITON_EXPORT triton::arch::register_e capstoneRegisterToTritonRegister(triton::uint32 id) const
Converts a capstone's register id to a triton's register id.
Definition: aarch64Specifications.cpp:43
triton::arch::arm::aarch64::AArch64Specifications::capstoneExtendToTritonExtend
TRITON_EXPORT triton::arch::arm::extend_e capstoneExtendToTritonExtend(triton::uint32 id) const
Converts a capstone's extend id to a triton's extend id.
Definition: aarch64Specifications.cpp:106
triton::arch::arm::aarch64::AArch64Specifications::capstoneInstructionToTritonInstruction
TRITON_EXPORT triton::uint32 capstoneInstructionToTritonInstruction(triton::uint32 id) const
Converts a capstone's instruction id to a triton's instruction id.
Definition: aarch64Specifications.cpp:281
triton::exceptions::Architecture
The exception class used by architectures.
Definition: exceptions.hpp:221
triton::arch::arm::aarch64::ID_INS_UMAXP
@ ID_INS_UMAXP
umaxp
Definition: aarch64Specifications.hpp:461
triton::arch::arm::aarch64::ID_INS_FMINV
@ ID_INS_FMINV
fminv
Definition: aarch64Specifications.hpp:204
triton::arch::arm::aarch64::ID_INS_PMULL2
@ ID_INS_PMULL2
pmull2
Definition: aarch64Specifications.hpp:292
triton::arch::arm::aarch64::ID_INS_SRSHL
@ ID_INS_SRSHL
srshl
Definition: aarch64Specifications.hpp:391
triton::arch::arm::aarch64::ID_INS_CBNZ
@ ID_INS_CBNZ
cbnz
Definition: aarch64Specifications.hpp:117
triton::arch::arm::aarch64::ID_INS_ADC
@ ID_INS_ADC
adc
Definition: aarch64Specifications.hpp:93
triton::arch::arm::aarch64::ID_INS_FCVTPS
@ ID_INS_FCVTPS
fcvtps
Definition: aarch64Specifications.hpp:185
triton::arch::arm::aarch64::ID_INS_CRC32CX
@ ID_INS_CRC32CX
crc32cx
Definition: aarch64Specifications.hpp:138
triton::arch::arm::aarch64::ID_INS_CMTST
@ ID_INS_CMTST
cmtst
Definition: aarch64Specifications.hpp:131
triton::arch::arm::aarch64::ID_INS_UHADD
@ ID_INS_UHADD
uhadd
Definition: aarch64Specifications.hpp:458
triton::arch::arm::aarch64::ID_INS_USHR
@ ID_INS_USHR
ushr
Definition: aarch64Specifications.hpp:495
triton::arch::arm::aarch64::ID_INS_LDAXP
@ ID_INS_LDAXP
ldaxp
Definition: aarch64Specifications.hpp:245
triton::arch::arm::aarch64::ID_INS_DMB
@ ID_INS_DMB
dmb
Definition: aarch64Specifications.hpp:149
triton::arch::arm::aarch64::ID_INS_ADRP
@ ID_INS_ADRP
adrp
Definition: aarch64Specifications.hpp:100
triton::arch::arm::aarch64::ID_INS_UMLSL2
@ ID_INS_UMLSL2
umlsl2
Definition: aarch64Specifications.hpp:469
triton::arch::arm::aarch64::ID_INS_FCVTL
@ ID_INS_FCVTL
fcvtl
Definition: aarch64Specifications.hpp:177
triton::arch::arm::aarch64::ID_INS_CLREX
@ ID_INS_CLREX
clrex
Definition: aarch64Specifications.hpp:121
triton::arch::arm::aarch64::ID_INS_UADDW2
@ ID_INS_UADDW2
uaddw2
Definition: aarch64Specifications.hpp:453
triton::arch::arm::aarch64::ID_INS_REV64
@ ID_INS_REV64
rev64
Definition: aarch64Specifications.hpp:303
triton::arch::arm::aarch64::ID_INS_FCVTN
@ ID_INS_FCVTN
fcvtn
Definition: aarch64Specifications.hpp:183
triton::arch::arm::aarch64::ID_INS_FCMP
@ ID_INS_FCMP
fcmp
Definition: aarch64Specifications.hpp:171
triton::arch::arm::aarch64::ID_INS_SBFIZ
@ ID_INS_SBFIZ
sbfiz
Definition: aarch64Specifications.hpp:520
triton::arch::arm::aarch64::ID_INS_SHRN
@ ID_INS_SHRN
shrn
Definition: aarch64Specifications.hpp:342
triton::arch::arm::aarch64::ID_INS_USQADD
@ ID_INS_USQADD
usqadd
Definition: aarch64Specifications.hpp:496
triton::arch::arm::aarch64::ID_INS_SABD
@ ID_INS_SABD
sabd
Definition: aarch64Specifications.hpp:315
triton::arch::arm::aarch64::ID_INS_UQXTN2
@ ID_INS_UQXTN2
uqxtn2
Definition: aarch64Specifications.hpp:484
triton::arch::arm::aarch64::ID_INS_SYSL
@ ID_INS_SYSL
sysl
Definition: aarch64Specifications.hpp:434
triton::arch::arm::aarch64::ID_INS_FMAXNMP
@ ID_INS_FMAXNMP
fmaxnmp
Definition: aarch64Specifications.hpp:195
triton::arch::arm::aarch64::ID_INS_LDR
@ ID_INS_LDR
ldr
Definition: aarch64Specifications.hpp:253
triton::arch::arm::aarch64::ID_INS_MUL
@ ID_INS_MUL
mul
Definition: aarch64Specifications.hpp:286
triton::arch::arm::aarch64::ID_INS_RADDHN2
@ ID_INS_RADDHN2
raddhn2
Definition: aarch64Specifications.hpp:298
triton::arch::arm::aarch64::ID_INS_FCCMPE
@ ID_INS_FCCMPE
fccmpe
Definition: aarch64Specifications.hpp:165
triton::arch::arm::aarch64::ID_INS_UADDL
@ ID_INS_UADDL
uaddl
Definition: aarch64Specifications.hpp:452
triton::arch::arm::aarch64::ID_INS_LDURSB
@ ID_INS_LDURSB
ldursb
Definition: aarch64Specifications.hpp:267
triton::arch::arm::aarch64::ID_INS_SQSUB
@ ID_INS_SQSUB
sqsub
Definition: aarch64Specifications.hpp:384
triton::arch::arm::aarch64::ID_INS_SRSHR
@ ID_INS_SRSHR
srshr
Definition: aarch64Specifications.hpp:392
triton::arch::arm::aarch64::ID_INS_UQRSHRN
@ ID_INS_UQRSHRN
uqrshrn
Definition: aarch64Specifications.hpp:478
triton::arch::arm::aarch64::ID_INS_LDAXRB
@ ID_INS_LDAXRB
ldaxrb
Definition: aarch64Specifications.hpp:246
triton::arch::arm::aarch64::ID_INS_FADD
@ ID_INS_FADD
fadd
Definition: aarch64Specifications.hpp:162
triton::arch::arm::aarch64::ID_INS_SUB
@ ID_INS_SUB
sub
Definition: aarch64Specifications.hpp:431
triton::arch::arm::aarch64::ID_INS_URECPE
@ ID_INS_URECPE
urecpe
Definition: aarch64Specifications.hpp:486
triton::arch::arm::aarch64::ID_INS_SMSUBL
@ ID_INS_SMSUBL
smsubl
Definition: aarch64Specifications.hpp:358
triton::arch::arm::aarch64::ID_INS_SHLL2
@ ID_INS_SHLL2
shll2
Definition: aarch64Specifications.hpp:338
triton::arch::arm::aarch64::ID_INS_SSHL
@ ID_INS_SSHL
sshl
Definition: aarch64Specifications.hpp:396
triton::arch::arm::aarch64::ID_INS_LSR
@ ID_INS_LSR
lsr
Definition: aarch64Specifications.hpp:275
triton::arch::arm::aarch64::ID_INS_UMULL
@ ID_INS_UMULL
umull
Definition: aarch64Specifications.hpp:475
triton::arch::arm::aarch64::ID_INS_SRI
@ ID_INS_SRI
sri
Definition: aarch64Specifications.hpp:390
triton::arch::arm::aarch64::ID_INS_CMGE
@ ID_INS_CMGE
cmge
Definition: aarch64Specifications.hpp:125
triton::arch::arm::aarch64::ID_INS_LDRB
@ ID_INS_LDRB
ldrb
Definition: aarch64Specifications.hpp:252
triton::arch::arm::aarch64::ID_INS_SRSRA
@ ID_INS_SRSRA
srsra
Definition: aarch64Specifications.hpp:393
triton::arch::arm::aarch64::ID_INS_FCVTNU
@ ID_INS_FCVTNU
fcvtnu
Definition: aarch64Specifications.hpp:182
triton::arch::arm::aarch64::ID_INS_RSHRN2
@ ID_INS_RSHRN2
rshrn2
Definition: aarch64Specifications.hpp:306
triton::arch::arm::aarch64::ID_INS_URSQRTE
@ ID_INS_URSQRTE
ursqrte
Definition: aarch64Specifications.hpp:490
triton::arch::arm::aarch64::ID_INS_AESMC
@ ID_INS_AESMC
aesmc
Definition: aarch64Specifications.hpp:104
triton::arch::arm::aarch64::ID_INS_UHSUB
@ ID_INS_UHSUB
uhsub
Definition: aarch64Specifications.hpp:459
triton::arch::arm::aarch64::ID_INS_URSHR
@ ID_INS_URSHR
urshr
Definition: aarch64Specifications.hpp:489
triton::arch::arm::aarch64::ID_INS_BFI
@ ID_INS_BFI
bfi
Definition: aarch64Specifications.hpp:524
triton::arch::arm::aarch64::ID_INS_FMINP
@ ID_INS_FMINP
fminp
Definition: aarch64Specifications.hpp:203
triton::arch::arm::aarch64::ID_INS_SABA
@ ID_INS_SABA
saba
Definition: aarch64Specifications.hpp:312
triton::arch::arm::aarch64::ID_INS_SMIN
@ ID_INS_SMIN
smin
Definition: aarch64Specifications.hpp:352
triton::arch::arm::aarch64::ID_INS_UQSHRN
@ ID_INS_UQSHRN
uqshrn
Definition: aarch64Specifications.hpp:481
triton::arch::arm::aarch64::ID_INS_MNEG
@ ID_INS_MNEG
mneg
Definition: aarch64Specifications.hpp:510
triton::arch::arm::aarch64::ID_INS_LD4
@ ID_INS_LD4
ld4
Definition: aarch64Specifications.hpp:240
triton::arch::arm::aarch64::ID_INS_SADALP
@ ID_INS_SADALP
sadalp
Definition: aarch64Specifications.hpp:316
triton::arch::arm::aarch64::ID_INS_SQNEG
@ ID_INS_SQNEG
sqneg
Definition: aarch64Specifications.hpp:371
triton::arch::arm::aarch64::ID_INS_SSUBL
@ ID_INS_SSUBL
ssubl
Definition: aarch64Specifications.hpp:400
triton::arch::arm::aarch64::ID_INS_UQXTN
@ ID_INS_UQXTN
uqxtn
Definition: aarch64Specifications.hpp:485
triton::arch::arm::aarch64::ID_INS_LDURSW
@ ID_INS_LDURSW
ldursw
Definition: aarch64Specifications.hpp:269
triton::arch::arm::aarch64::ID_INS_MOVK
@ ID_INS_MOVK
movk
Definition: aarch64Specifications.hpp:280
triton::arch::arm::aarch64::ID_INS_SMAXP
@ ID_INS_SMAXP
smaxp
Definition: aarch64Specifications.hpp:346
triton::arch::arm::aarch64::ID_INS_NOP
@ ID_INS_NOP
nop
Definition: aarch64Specifications.hpp:513
triton::arch::arm::aarch64::ID_INS_UMAX
@ ID_INS_UMAX
umax
Definition: aarch64Specifications.hpp:463
triton::arch::arm::aarch64::ID_INS_SUBHN
@ ID_INS_SUBHN
subhn
Definition: aarch64Specifications.hpp:429
triton::arch::arm::aarch64::ID_INS_UMLAL2
@ ID_INS_UMLAL2
umlal2
Definition: aarch64Specifications.hpp:467
triton::arch::arm::aarch64::ID_INS_UMINP
@ ID_INS_UMINP
uminp
Definition: aarch64Specifications.hpp:464
triton::arch::arm::aarch64::ID_INS_USRA
@ ID_INS_USRA
usra
Definition: aarch64Specifications.hpp:497
triton::arch::arm::aarch64::ID_INS_LD3R
@ ID_INS_LD3R
ld3r
Definition: aarch64Specifications.hpp:238
triton::arch::arm::aarch64::ID_INS_FMAXV
@ ID_INS_FMAXV
fmaxv
Definition: aarch64Specifications.hpp:198
triton::arch::arm::aarch64::ID_INS_SQRSHRN2
@ ID_INS_SQRSHRN2
sqrshrn2
Definition: aarch64Specifications.hpp:375
triton::arch::arm::aarch64::ID_INS_FMINNMV
@ ID_INS_FMINNMV
fminnmv
Definition: aarch64Specifications.hpp:202
triton::arch::arm::aarch64::ID_INS_FSUB
@ ID_INS_FSUB
fsub
Definition: aarch64Specifications.hpp:228
triton::arch::arm::aarch64::ID_INS_ADDHN2
@ ID_INS_ADDHN2
addhn2
Definition: aarch64Specifications.hpp:95
triton::arch::arm::aarch64::ID_INS_CRC32H
@ ID_INS_CRC32H
crc32h
Definition: aarch64Specifications.hpp:139
triton::arch::arm::aarch64::ID_INS_SHA256H2
@ ID_INS_SHA256H2
sha256h2
Definition: aarch64Specifications.hpp:333
triton::arch::arm::aarch64::ID_INS_LDTR
@ ID_INS_LDTR
ldtr
Definition: aarch64Specifications.hpp:263
triton::arch::arm::aarch64::ID_INS_SQXTN2
@ ID_INS_SQXTN2
sqxtn2
Definition: aarch64Specifications.hpp:385
triton::arch::arm::aarch64::ID_INS_SQSHRUN2
@ ID_INS_SQSHRUN2
sqshrun2
Definition: aarch64Specifications.hpp:383
triton::arch::arm::aarch64::ID_INS_STLXP
@ ID_INS_STLXP
stlxp
Definition: aarch64Specifications.hpp:410
triton::arch::arm::aarch64::ID_INS_XTN2
@ ID_INS_XTN2
xtn2
Definition: aarch64Specifications.hpp:504
triton::arch::arm::aarch64::ID_INS_WFE
@ ID_INS_WFE
wfe
Definition: aarch64Specifications.hpp:515
triton::arch::arm::aarch64::ID_INS_SUBHN2
@ ID_INS_SUBHN2
subhn2
Definition: aarch64Specifications.hpp:430
triton::arch::arm::aarch64::ID_INS_UMOV
@ ID_INS_UMOV
umov
Definition: aarch64Specifications.hpp:471
triton::arch::arm::aarch64::ID_INS_FMLA
@ ID_INS_FMLA
fmla
Definition: aarch64Specifications.hpp:205
triton::arch::arm::aarch64::ID_INS_LSL
@ ID_INS_LSL
lsl
Definition: aarch64Specifications.hpp:274
triton::arch::arm::aarch64::ID_INS_HVC
@ ID_INS_HVC
hvc
Definition: aarch64Specifications.hpp:231
triton::arch::arm::aarch64::ID_INS_ERET
@ ID_INS_ERET
eret
Definition: aarch64Specifications.hpp:155
triton::arch::arm::aarch64::ID_INS_STLR
@ ID_INS_STLR
stlr
Definition: aarch64Specifications.hpp:409
triton::arch::arm::aarch64::ID_INS_CCMN
@ ID_INS_CCMN
ccmn
Definition: aarch64Specifications.hpp:119
triton::arch::arm::aarch64::ID_INS_MVNI
@ ID_INS_MVNI
mvni
Definition: aarch64Specifications.hpp:287
triton::arch::arm::aarch64::ID_INS_SABDL
@ ID_INS_SABDL
sabdl
Definition: aarch64Specifications.hpp:314
triton::arch::arm::aarch64::ID_INS_UMULL2
@ ID_INS_UMULL2
umull2
Definition: aarch64Specifications.hpp:474
triton::arch::arm::aarch64::ID_INS_CSETM
@ ID_INS_CSETM
csetm
Definition: aarch64Specifications.hpp:531
triton::arch::arm::aarch64::ID_INS_SSHLL2
@ ID_INS_SSHLL2
sshll2
Definition: aarch64Specifications.hpp:394
triton::arch::arm::aarch64::ID_INS_REV32
@ ID_INS_REV32
rev32
Definition: aarch64Specifications.hpp:302
triton::arch::arm::aarch64::ID_INS_SMULL2
@ ID_INS_SMULL2
smull2
Definition: aarch64Specifications.hpp:360
triton::arch::arm::aarch64::ID_INS_ASR
@ ID_INS_ASR
asr
Definition: aarch64Specifications.hpp:106
triton::arch::arm::aarch64::ID_INS_UMIN
@ ID_INS_UMIN
umin
Definition: aarch64Specifications.hpp:466
triton::arch::arm::aarch64::ID_INS_DCPS1
@ ID_INS_DCPS1
dcps1
Definition: aarch64Specifications.hpp:146
triton::arch::arm::aarch64::ID_INS_ST3
@ ID_INS_ST3
st3
Definition: aarch64Specifications.hpp:405
triton::arch::arm::aarch64::ID_INS_LDRSW
@ ID_INS_LDRSW
ldrsw
Definition: aarch64Specifications.hpp:257
triton::arch::arm::aarch64::ID_INS_CCMP
@ ID_INS_CCMP
ccmp
Definition: aarch64Specifications.hpp:120
triton::arch::arm::aarch64::ID_INS_UQRSHL
@ ID_INS_UQRSHL
uqrshl
Definition: aarch64Specifications.hpp:477
triton::arch::arm::aarch64::ID_INS_USUBL
@ ID_INS_USUBL
usubl
Definition: aarch64Specifications.hpp:499
triton::arch::arm::aarch64::ID_INS_UADDL2
@ ID_INS_UADDL2
uaddl2
Definition: aarch64Specifications.hpp:451
triton::arch::arm::aarch64::ID_INS_LDTRSB
@ ID_INS_LDTRSB
ldtrsb
Definition: aarch64Specifications.hpp:260
triton::arch::arm::aarch64::ID_INS_SDIV
@ ID_INS_SDIV
sdiv
Definition: aarch64Specifications.hpp:326
triton::arch::arm::aarch64::ID_INS_SMINV
@ ID_INS_SMINV
sminv
Definition: aarch64Specifications.hpp:351
triton::arch::arm::aarch64::ID_INS_LDXR
@ ID_INS_LDXR
ldxr
Definition: aarch64Specifications.hpp:273
triton::arch::arm::aarch64::ID_INS_SHRN2
@ ID_INS_SHRN2
shrn2
Definition: aarch64Specifications.hpp:341
triton::arch::arm::aarch64::ID_INS_STLRH
@ ID_INS_STLRH
stlrh
Definition: aarch64Specifications.hpp:408
triton::arch::arm::aarch64::ID_INS_FNMADD
@ ID_INS_FNMADD
fnmadd
Definition: aarch64Specifications.hpp:212
triton::arch::arm::aarch64::ID_INS_MOVI
@ ID_INS_MOVI
movi
Definition: aarch64Specifications.hpp:279
triton::arch::arm::aarch64::ID_INS_BIF
@ ID_INS_BIF
bif
Definition: aarch64Specifications.hpp:110
triton::arch::arm::aarch64::ID_INS_ST2
@ ID_INS_ST2
st2
Definition: aarch64Specifications.hpp:404
triton::arch::arm::aarch64::ID_INS_CLZ
@ ID_INS_CLZ
clz
Definition: aarch64Specifications.hpp:123
triton::arch::arm::aarch64::ID_INS_SHA1M
@ ID_INS_SHA1M
sha1m
Definition: aarch64Specifications.hpp:329
triton::arch::arm::aarch64::ID_INS_FCVTN2
@ ID_INS_FCVTN2
fcvtn2
Definition: aarch64Specifications.hpp:184
triton::arch::arm::aarch64::ID_INS_UXTW
@ ID_INS_UXTW
uxtw
Definition: aarch64Specifications.hpp:540
triton::arch::arm::aarch64::ID_INS_LDTRH
@ ID_INS_LDTRH
ldtrh
Definition: aarch64Specifications.hpp:259
triton::arch::arm::aarch64::ID_INS_SADDW2
@ ID_INS_SADDW2
saddw2
Definition: aarch64Specifications.hpp:321
triton::arch::arm::aarch64::ID_INS_CRC32CH
@ ID_INS_CRC32CH
crc32ch
Definition: aarch64Specifications.hpp:136
triton::arch::arm::aarch64::ID_INS_MADD
@ ID_INS_MADD
madd
Definition: aarch64Specifications.hpp:276
triton::arch::arm::aarch64::ID_INS_EXT
@ ID_INS_EXT
ext
Definition: aarch64Specifications.hpp:157
triton::arch::arm::aarch64::ID_INS_UMNEGL
@ ID_INS_UMNEGL
umnegl
Definition: aarch64Specifications.hpp:511
triton::arch::arm::aarch64::ID_INS_USHLL
@ ID_INS_USHLL
ushll
Definition: aarch64Specifications.hpp:493
triton::arch::arm::aarch64::ID_INS_SXTB
@ ID_INS_SXTB
sxtb
Definition: aarch64Specifications.hpp:534
triton::arch::arm::aarch64::ID_INS_FCMPE
@ ID_INS_FCMPE
fcmpe
Definition: aarch64Specifications.hpp:172
triton::arch::arm::aarch64::ID_INS_SQXTUN
@ ID_INS_SQXTUN
sqxtun
Definition: aarch64Specifications.hpp:388
triton::arch::arm::aarch64::ID_INS_TBZ
@ ID_INS_TBZ
tbz
Definition: aarch64Specifications.hpp:439
triton::arch::arm::aarch64::ID_INS_SADDW
@ ID_INS_SADDW
saddw
Definition: aarch64Specifications.hpp:322
triton::arch::arm::aarch64::ID_INS_LDPSW
@ ID_INS_LDPSW
ldpsw
Definition: aarch64Specifications.hpp:251
triton::arch::arm::aarch64::ID_INS_SQADD
@ ID_INS_SQADD
sqadd
Definition: aarch64Specifications.hpp:363
triton::arch::arm::aarch64::ID_INS_MSUB
@ ID_INS_MSUB
msub
Definition: aarch64Specifications.hpp:285
triton::arch::arm::aarch64::ID_INS_TBNZ
@ ID_INS_TBNZ
tbnz
Definition: aarch64Specifications.hpp:437
triton::arch::arm::aarch64::ID_INS_LDAXR
@ ID_INS_LDAXR
ldaxr
Definition: aarch64Specifications.hpp:248
triton::arch::arm::aarch64::ID_INS_NEG
@ ID_INS_NEG
neg
Definition: aarch64Specifications.hpp:288
triton::arch::arm::aarch64::ID_INS_SQRSHRUN2
@ ID_INS_SQRSHRUN2
sqrshrun2
Definition: aarch64Specifications.hpp:377
triton::arch::arm::aarch64::ID_INS_FCVTNS
@ ID_INS_FCVTNS
fcvtns
Definition: aarch64Specifications.hpp:181
triton::arch::arm::aarch64::ID_INS_ABS
@ ID_INS_ABS
abs
Definition: aarch64Specifications.hpp:92
triton::arch::arm::aarch64::ID_INS_SABDL2
@ ID_INS_SABDL2
sabdl2
Definition: aarch64Specifications.hpp:313
triton::arch::arm::aarch64::ID_INS_SHA256H
@ ID_INS_SHA256H
sha256h
Definition: aarch64Specifications.hpp:334
triton::arch::arm::aarch64::ID_INS_STURH
@ ID_INS_STURH
sturh
Definition: aarch64Specifications.hpp:424
triton::arch::arm::aarch64::ID_INS_FMINNMP
@ ID_INS_FMINNMP
fminnmp
Definition: aarch64Specifications.hpp:201
triton::arch::arm::aarch64::ID_INS_ROR
@ ID_INS_ROR
ror
Definition: aarch64Specifications.hpp:305
triton::arch::arm::aarch64::ID_INS_ST1
@ ID_INS_ST1
st1
Definition: aarch64Specifications.hpp:403
triton::arch::arm::aarch64::ID_INS_LDRSH
@ ID_INS_LDRSH
ldrsh
Definition: aarch64Specifications.hpp:256
triton::arch::arm::aarch64::ID_INS_CBZ
@ ID_INS_CBZ
cbz
Definition: aarch64Specifications.hpp:118
triton::arch::arm::aarch64::ID_INS_ST4
@ ID_INS_ST4
st4
Definition: aarch64Specifications.hpp:406
triton::arch::arm::aarch64::ID_INS_BL
@ ID_INS_BL
bl
Definition: aarch64Specifications.hpp:112
triton::arch::arm::aarch64::ID_INS_CRC32B
@ ID_INS_CRC32B
crc32b
Definition: aarch64Specifications.hpp:134
triton::arch::arm::aarch64::ID_INS_SHA1SU0
@ ID_INS_SHA1SU0
sha1su0
Definition: aarch64Specifications.hpp:331
triton::arch::arm::aarch64::ID_INS_LDAXRH
@ ID_INS_LDAXRH
ldaxrh
Definition: aarch64Specifications.hpp:247
triton::arch::arm::aarch64::ID_INS_FMADD
@ ID_INS_FMADD
fmadd
Definition: aarch64Specifications.hpp:192
triton::arch::arm::aarch64::ID_INS_CSET
@ ID_INS_CSET
cset
Definition: aarch64Specifications.hpp:529
triton::arch::arm::aarch64::ID_INS_SHA256SU1
@ ID_INS_SHA256SU1
sha256su1
Definition: aarch64Specifications.hpp:336
triton::arch::arm::aarch64::ID_INS_SHL
@ ID_INS_SHL
shl
Definition: aarch64Specifications.hpp:340
triton::arch::arm::aarch64::ID_INS_LDXP
@ ID_INS_LDXP
ldxp
Definition: aarch64Specifications.hpp:270
triton::arch::arm::aarch64::ID_INS_ADDV
@ ID_INS_ADDV
addv
Definition: aarch64Specifications.hpp:98
triton::arch::arm::aarch64::ID_INS_SHA256SU0
@ ID_INS_SHA256SU0
sha256su0
Definition: aarch64Specifications.hpp:335
triton::arch::arm::aarch64::ID_INS_SQRSHL
@ ID_INS_SQRSHL
sqrshl
Definition: aarch64Specifications.hpp:373
triton::arch::arm::aarch64::ID_INS_ADDHN
@ ID_INS_ADDHN
addhn
Definition: aarch64Specifications.hpp:94
triton::arch::arm::aarch64::ID_INS_FCVT
@ ID_INS_FCVT
fcvt
Definition: aarch64Specifications.hpp:176
triton::arch::arm::aarch64::ID_INS_FNMSUB
@ ID_INS_FNMSUB
fnmsub
Definition: aarch64Specifications.hpp:213
triton::arch::arm::aarch64::ID_INS_SHADD
@ ID_INS_SHADD
shadd
Definition: aarch64Specifications.hpp:337
triton::arch::arm::aarch64::ID_INS_UADDLP
@ ID_INS_UADDLP
uaddlp
Definition: aarch64Specifications.hpp:449
triton::arch::arm::aarch64::ID_INS_SQDMLAL2
@ ID_INS_SQDMLAL2
sqdmlal2
Definition: aarch64Specifications.hpp:365
triton::arch::arm::aarch64::ID_INS_FACGE
@ ID_INS_FACGE
facge
Definition: aarch64Specifications.hpp:160
triton::arch::arm::aarch64::ID_INS_FRSQRTE
@ ID_INS_FRSQRTE
frsqrte
Definition: aarch64Specifications.hpp:225
triton::arch::arm::aarch64::ID_INS_DCPS3
@ ID_INS_DCPS3
dcps3
Definition: aarch64Specifications.hpp:148
triton::arch::arm::aarch64::ID_INS_RSUBHN
@ ID_INS_RSUBHN
rsubhn
Definition: aarch64Specifications.hpp:308
triton::arch::arm::aarch64::ID_INS_RADDHN
@ ID_INS_RADDHN
raddhn
Definition: aarch64Specifications.hpp:297
triton::arch::arm::aarch64::ID_INS_STTRH
@ ID_INS_STTRH
sttrh
Definition: aarch64Specifications.hpp:420
triton::arch::arm::aarch64::ID_INS_SSUBL2
@ ID_INS_SSUBL2
ssubl2
Definition: aarch64Specifications.hpp:399
triton::arch::arm::aarch64::ID_INS_SQSHL
@ ID_INS_SQSHL
sqshl
Definition: aarch64Specifications.hpp:379
triton::arch::arm::aarch64::ID_INS_SMINP
@ ID_INS_SMINP
sminp
Definition: aarch64Specifications.hpp:350
triton::arch::arm::aarch64::ID_INS_FRINTM
@ ID_INS_FRINTM
frintm
Definition: aarch64Specifications.hpp:220
triton::arch::arm::aarch64::ID_INS_CMHI
@ ID_INS_CMHI
cmhi
Definition: aarch64Specifications.hpp:127
triton::arch::arm::aarch64::ID_INS_LDP
@ ID_INS_LDP
ldp
Definition: aarch64Specifications.hpp:250
triton::arch::arm::aarch64::ID_INS_SQRSHRN
@ ID_INS_SQRSHRN
sqrshrn
Definition: aarch64Specifications.hpp:374
triton::arch::arm::aarch64::ID_INS_UZP2
@ ID_INS_UZP2
uzp2
Definition: aarch64Specifications.hpp:503
triton::arch::arm::aarch64::ID_INS_ZIP2
@ ID_INS_ZIP2
zip2
Definition: aarch64Specifications.hpp:507
triton::arch::arm::aarch64::ID_INS_UXTB
@ ID_INS_UXTB
uxtb
Definition: aarch64Specifications.hpp:538
triton::arch::arm::aarch64::ID_INS_FRINTN
@ ID_INS_FRINTN
frintn
Definition: aarch64Specifications.hpp:221
triton::arch::arm::aarch64::ID_INS_SMLSL
@ ID_INS_SMLSL
smlsl
Definition: aarch64Specifications.hpp:356
triton::arch::arm::aarch64::ID_INS_UMAXV
@ ID_INS_UMAXV
umaxv
Definition: aarch64Specifications.hpp:462
triton::arch::arm::aarch64::ID_INS_ORR
@ ID_INS_ORR
orr
Definition: aarch64Specifications.hpp:291
triton::arch::arm::aarch64::ID_INS_SADDL2
@ ID_INS_SADDL2
saddl2
Definition: aarch64Specifications.hpp:319
triton::arch::arm::aarch64::ID_INS_SMOV
@ ID_INS_SMOV
smov
Definition: aarch64Specifications.hpp:357
triton::arch::arm::aarch64::ID_INS_INS
@ ID_INS_INS
ins
Definition: aarch64Specifications.hpp:232
triton::arch::arm::aarch64::ID_INS_SUQADD
@ ID_INS_SUQADD
suqadd
Definition: aarch64Specifications.hpp:432
triton::arch::arm::aarch64::ID_INS_AESIMC
@ ID_INS_AESIMC
aesimc
Definition: aarch64Specifications.hpp:103
triton::arch::arm::aarch64::ID_INS_HLT
@ ID_INS_HLT
hlt
Definition: aarch64Specifications.hpp:230
triton::arch::arm::aarch64::ID_INS_TBL
@ ID_INS_TBL
tbl
Definition: aarch64Specifications.hpp:436
triton::arch::arm::aarch64::ID_INS_FCVTZS
@ ID_INS_FCVTZS
fcvtzs
Definition: aarch64Specifications.hpp:189
triton::arch::arm::aarch64::ID_INS_UDIV
@ ID_INS_UDIV
udiv
Definition: aarch64Specifications.hpp:457
triton::arch::arm::aarch64::ID_INS_FCVTMU
@ ID_INS_FCVTMU
fcvtmu
Definition: aarch64Specifications.hpp:180
triton::arch::arm::aarch64::ID_INS_UMINV
@ ID_INS_UMINV
uminv
Definition: aarch64Specifications.hpp:465
triton::arch::arm::aarch64::ID_INS_DRPS
@ ID_INS_DRPS
drps
Definition: aarch64Specifications.hpp:150
triton::arch::arm::aarch64::ID_INS_UMADDL
@ ID_INS_UMADDL
umaddl
Definition: aarch64Specifications.hpp:460
triton::arch::arm::aarch64::ID_INS_UQSUB
@ ID_INS_UQSUB
uqsub
Definition: aarch64Specifications.hpp:483
triton::arch::arm::aarch64::ID_INS_FADDP
@ ID_INS_FADDP
faddp
Definition: aarch64Specifications.hpp:163
triton::arch::arm::aarch64::ID_INS_MVN
@ ID_INS_MVN
mvn
Definition: aarch64Specifications.hpp:527
triton::arch::arm::aarch64::ID_INS_FCVTAS
@ ID_INS_FCVTAS
fcvtas
Definition: aarch64Specifications.hpp:174
triton::arch::arm::aarch64::ID_INS_SMULH
@ ID_INS_SMULH
smulh
Definition: aarch64Specifications.hpp:359
triton::arch::arm::aarch64::ID_INS_SADDLP
@ ID_INS_SADDLP
saddlp
Definition: aarch64Specifications.hpp:317
triton::arch::arm::aarch64::ID_INS_UQSHRN2
@ ID_INS_UQSHRN2
uqshrn2
Definition: aarch64Specifications.hpp:482
triton::arch::arm::aarch64::ID_INS_FNEG
@ ID_INS_FNEG
fneg
Definition: aarch64Specifications.hpp:211
triton::arch::arm::aarch64::ID_INS_MOVZ
@ ID_INS_MOVZ
movz
Definition: aarch64Specifications.hpp:282
triton::arch::arm::aarch64::ID_INS_DC
@ ID_INS_DC
dc
Definition: aarch64Specifications.hpp:542
triton::arch::arm::aarch64::ID_INS_LDXRB
@ ID_INS_LDXRB
ldxrb
Definition: aarch64Specifications.hpp:271
triton::arch::arm::aarch64::ID_INS_SRHADD
@ ID_INS_SRHADD
srhadd
Definition: aarch64Specifications.hpp:389
triton::arch::arm::aarch64::ID_INS_FRECPE
@ ID_INS_FRECPE
frecpe
Definition: aarch64Specifications.hpp:215
triton::arch::arm::aarch64::ID_INS_SLI
@ ID_INS_SLI
sli
Definition: aarch64Specifications.hpp:344
triton::arch::arm::aarch64::ID_INS_SQRDMULH
@ ID_INS_SQRDMULH
sqrdmulh
Definition: aarch64Specifications.hpp:372
triton::arch::arm::aarch64::ID_INS_UMSUBL
@ ID_INS_UMSUBL
umsubl
Definition: aarch64Specifications.hpp:472
triton::arch::arm::aarch64::ID_INS_SSHLL
@ ID_INS_SSHLL
sshll
Definition: aarch64Specifications.hpp:395
triton::arch::arm::aarch64::ID_INS_FNMUL
@ ID_INS_FNMUL
fnmul
Definition: aarch64Specifications.hpp:214
triton::arch::arm::aarch64::ID_INS_SHA1H
@ ID_INS_SHA1H
sha1h
Definition: aarch64Specifications.hpp:328
triton::arch::arm::aarch64::ID_INS_CMHS
@ ID_INS_CMHS
cmhs
Definition: aarch64Specifications.hpp:128
triton::arch::arm::aarch64::ID_INS_STLXR
@ ID_INS_STLXR
stlxr
Definition: aarch64Specifications.hpp:413
triton::arch::arm::aarch64::ID_INS_MRS
@ ID_INS_MRS
mrs
Definition: aarch64Specifications.hpp:283
triton::arch::arm::aarch64::ID_INS_FRINTP
@ ID_INS_FRINTP
frintp
Definition: aarch64Specifications.hpp:222
triton::arch::arm::aarch64::ID_INS_CSEL
@ ID_INS_CSEL
csel
Definition: aarch64Specifications.hpp:142
triton::arch::arm::aarch64::ID_INS_SYS
@ ID_INS_SYS
sys
Definition: aarch64Specifications.hpp:435
triton::arch::arm::aarch64::ID_INS_YIELD
@ ID_INS_YIELD
yield
Definition: aarch64Specifications.hpp:514
triton::arch::arm::aarch64::ID_INS_BFM
@ ID_INS_BFM
bfm
Definition: aarch64Specifications.hpp:108
triton::arch::arm::aarch64::ID_INS_FCVTL2
@ ID_INS_FCVTL2
fcvtl2
Definition: aarch64Specifications.hpp:178
triton::arch::arm::aarch64::ID_INS_MOVN
@ ID_INS_MOVN
movn
Definition: aarch64Specifications.hpp:281
triton::arch::arm::aarch64::ID_INS_SCVTF
@ ID_INS_SCVTF
scvtf
Definition: aarch64Specifications.hpp:325
triton::arch::arm::aarch64::ID_INS_SMLSL2
@ ID_INS_SMLSL2
smlsl2
Definition: aarch64Specifications.hpp:355
triton::arch::arm::aarch64::ID_INS_UABD
@ ID_INS_UABD
uabd
Definition: aarch64Specifications.hpp:447
triton::arch::arm::aarch64::ID_INS_REV
@ ID_INS_REV
rev
Definition: aarch64Specifications.hpp:304
triton::arch::arm::aarch64::ID_INS_FMIN
@ ID_INS_FMIN
fmin
Definition: aarch64Specifications.hpp:199
triton::arch::arm::aarch64::ID_INS_XTN
@ ID_INS_XTN
xtn
Definition: aarch64Specifications.hpp:505
triton::arch::arm::aarch64::ID_INS_REV16
@ ID_INS_REV16
rev16
Definition: aarch64Specifications.hpp:301
triton::arch::arm::aarch64::ID_INS_CMEQ
@ ID_INS_CMEQ
cmeq
Definition: aarch64Specifications.hpp:124
triton::arch::arm::aarch64::ID_INS_NGC
@ ID_INS_NGC
ngc
Definition: aarch64Specifications.hpp:519
triton::arch::arm::aarch64::ID_INS_UADDLV
@ ID_INS_UADDLV
uaddlv
Definition: aarch64Specifications.hpp:450
triton::arch::arm::aarch64::ID_INS_LD2
@ ID_INS_LD2
ld2
Definition: aarch64Specifications.hpp:237
triton::arch::arm::aarch64::ID_INS_CRC32X
@ ID_INS_CRC32X
crc32x
Definition: aarch64Specifications.hpp:141
triton::arch::arm::aarch64::ID_INS_SMLAL
@ ID_INS_SMLAL
smlal
Definition: aarch64Specifications.hpp:354
triton::arch::arm::aarch64::ID_INS_STP
@ ID_INS_STP
stp
Definition: aarch64Specifications.hpp:415
triton::arch::arm::aarch64::ID_INS_SQDMLSL2
@ ID_INS_SQDMLSL2
sqdmlsl2
Definition: aarch64Specifications.hpp:367
triton::arch::arm::aarch64::ID_INS_AND
@ ID_INS_AND
and
Definition: aarch64Specifications.hpp:105
triton::arch::arm::aarch64::ID_INS_MSR
@ ID_INS_MSR
msr
Definition: aarch64Specifications.hpp:284
triton::arch::arm::aarch64::ID_INS_ADD
@ ID_INS_ADD
add
Definition: aarch64Specifications.hpp:97
triton::arch::arm::aarch64::ID_INS_FMLS
@ ID_INS_FMLS
fmls
Definition: aarch64Specifications.hpp:206
triton::arch::arm::aarch64::ID_INS_FCVTPU
@ ID_INS_FCVTPU
fcvtpu
Definition: aarch64Specifications.hpp:186
triton::arch::arm::aarch64::ID_INS_FCCMP
@ ID_INS_FCCMP
fccmp
Definition: aarch64Specifications.hpp:164
triton::arch::arm::aarch64::ID_INS_LDXRH
@ ID_INS_LDXRH
ldxrh
Definition: aarch64Specifications.hpp:272
triton::arch::arm::aarch64::ID_INS_SSUBW
@ ID_INS_SSUBW
ssubw
Definition: aarch64Specifications.hpp:402
triton::arch::arm::aarch64::ID_INS_FCVTXN
@ ID_INS_FCVTXN
fcvtxn
Definition: aarch64Specifications.hpp:187
triton::arch::arm::aarch64::ID_INS_AT
@ ID_INS_AT
at
Definition: aarch64Specifications.hpp:543
triton::arch::arm::aarch64::ID_INS_UCVTF
@ ID_INS_UCVTF
ucvtf
Definition: aarch64Specifications.hpp:456
triton::arch::arm::aarch64::ID_INS_CSINC
@ ID_INS_CSINC
csinc
Definition: aarch64Specifications.hpp:143
triton::arch::arm::aarch64::ID_INS_NOT
@ ID_INS_NOT
not
Definition: aarch64Specifications.hpp:289
triton::arch::arm::aarch64::ID_INS_SQDMULL
@ ID_INS_SQDMULL
sqdmull
Definition: aarch64Specifications.hpp:369
triton::arch::arm::aarch64::ID_INS_SQSHRN
@ ID_INS_SQSHRN
sqshrn
Definition: aarch64Specifications.hpp:380
triton::arch::arm::aarch64::ID_INS_SMAX
@ ID_INS_SMAX
smax
Definition: aarch64Specifications.hpp:348
triton::arch::arm::aarch64::ID_INS_DUP
@ ID_INS_DUP
dup
Definition: aarch64Specifications.hpp:152
triton::arch::arm::aarch64::ID_INS_SQSHLU
@ ID_INS_SQSHLU
sqshlu
Definition: aarch64Specifications.hpp:378
triton::arch::arm::aarch64::ID_INS_CINC
@ ID_INS_CINC
cinc
Definition: aarch64Specifications.hpp:530
triton::arch::arm::aarch64::ID_INS_STLXRB
@ ID_INS_STLXRB
stlxrb
Definition: aarch64Specifications.hpp:411
triton::arch::arm::aarch64::ID_INS_CMN
@ ID_INS_CMN
cmn
Definition: aarch64Specifications.hpp:526
triton::arch::arm::aarch64::ID_INS_ADDP
@ ID_INS_ADDP
addp
Definition: aarch64Specifications.hpp:96
triton::arch::arm::aarch64::ID_INS_SSUBW2
@ ID_INS_SSUBW2
ssubw2
Definition: aarch64Specifications.hpp:401
triton::arch::arm::aarch64::ID_INS_UABDL2
@ ID_INS_UABDL2
uabdl2
Definition: aarch64Specifications.hpp:445
triton::arch::arm::aarch64::ID_INS_ORN
@ ID_INS_ORN
orn
Definition: aarch64Specifications.hpp:290
triton::arch::arm::aarch64::ID_INS_UADDW
@ ID_INS_UADDW
uaddw
Definition: aarch64Specifications.hpp:454
triton::arch::arm::aarch64::ID_INS_STURB
@ ID_INS_STURB
sturb
Definition: aarch64Specifications.hpp:422
triton::arch::arm::aarch64::ID_INS_TBX
@ ID_INS_TBX
tbx
Definition: aarch64Specifications.hpp:438
triton::arch::arm::aarch64::ID_INS_STRH
@ ID_INS_STRH
strh
Definition: aarch64Specifications.hpp:418
triton::arch::arm::aarch64::ID_INS_STXP
@ ID_INS_STXP
stxp
Definition: aarch64Specifications.hpp:425
triton::arch::arm::aarch64::ID_INS_BLR
@ ID_INS_BLR
blr
Definition: aarch64Specifications.hpp:113
triton::arch::arm::aarch64::ID_INS_CLS
@ ID_INS_CLS
cls
Definition: aarch64Specifications.hpp:122
triton::arch::arm::aarch64::ID_INS_STR
@ ID_INS_STR
str
Definition: aarch64Specifications.hpp:417
triton::arch::arm::aarch64::ID_INS_STLRB
@ ID_INS_STLRB
stlrb
Definition: aarch64Specifications.hpp:407
triton::arch::arm::aarch64::ID_INS_SADDLV
@ ID_INS_SADDLV
saddlv
Definition: aarch64Specifications.hpp:318
triton::arch::arm::aarch64::ID_INS_SSHR
@ ID_INS_SSHR
sshr
Definition: aarch64Specifications.hpp:397
triton::arch::arm::aarch64::ID_INS_LDARB
@ ID_INS_LDARB
ldarb
Definition: aarch64Specifications.hpp:242
triton::arch::arm::aarch64::ID_INS_SHA1SU1
@ ID_INS_SHA1SU1
sha1su1
Definition: aarch64Specifications.hpp:332
triton::arch::arm::aarch64::ID_INS_ADR
@ ID_INS_ADR
adr
Definition: aarch64Specifications.hpp:99
triton::arch::arm::aarch64::ID_INS_LDURSH
@ ID_INS_LDURSH
ldursh
Definition: aarch64Specifications.hpp:268
triton::arch::arm::aarch64::ID_INS_B
@ ID_INS_B
b
Definition: aarch64Specifications.hpp:107
triton::arch::arm::aarch64::ID_INS_FRSQRTS
@ ID_INS_FRSQRTS
frsqrts
Definition: aarch64Specifications.hpp:226
triton::arch::arm::aarch64::ID_INS_BSL
@ ID_INS_BSL
bsl
Definition: aarch64Specifications.hpp:116
triton::arch::arm::aarch64::ID_INS_SABAL2
@ ID_INS_SABAL2
sabal2
Definition: aarch64Specifications.hpp:310
triton::arch::arm::aarch64::ID_INS_SEVL
@ ID_INS_SEVL
sevl
Definition: aarch64Specifications.hpp:518
triton::arch::arm::aarch64::ID_INS_URHADD
@ ID_INS_URHADD
urhadd
Definition: aarch64Specifications.hpp:487
triton::arch::arm::aarch64::ID_INS_FCMLT
@ ID_INS_FCMLT
fcmlt
Definition: aarch64Specifications.hpp:170
triton::arch::arm::aarch64::ID_INS_SMNEGL
@ ID_INS_SMNEGL
smnegl
Definition: aarch64Specifications.hpp:512
triton::arch::arm::aarch64::ID_INS_SMAXV
@ ID_INS_SMAXV
smaxv
Definition: aarch64Specifications.hpp:347
triton::arch::arm::aarch64::ID_INS_MLA
@ ID_INS_MLA
mla
Definition: aarch64Specifications.hpp:277
triton::arch::arm::aarch64::ID_INS_SSRA
@ ID_INS_SSRA
ssra
Definition: aarch64Specifications.hpp:398
triton::arch::arm::aarch64::ID_INS_SQABS
@ ID_INS_SQABS
sqabs
Definition: aarch64Specifications.hpp:362
triton::arch::arm::aarch64::ID_INS_UABDL
@ ID_INS_UABDL
uabdl
Definition: aarch64Specifications.hpp:446
triton::arch::arm::aarch64::ID_INS_SBC
@ ID_INS_SBC
sbc
Definition: aarch64Specifications.hpp:323
triton::arch::arm::aarch64::ID_INS_LDURH
@ ID_INS_LDURH
ldurh
Definition: aarch64Specifications.hpp:266
triton::arch::arm::aarch64::ID_INS_FACGT
@ ID_INS_FACGT
facgt
Definition: aarch64Specifications.hpp:161
triton::arch::arm::aarch64::ID_INS_LDUR
@ ID_INS_LDUR
ldur
Definition: aarch64Specifications.hpp:265
triton::arch::arm::aarch64::ID_INS_UXTH
@ ID_INS_UXTH
uxth
Definition: aarch64Specifications.hpp:539
triton::arch::arm::aarch64::ID_INS_RSUBHN2
@ ID_INS_RSUBHN2
rsubhn2
Definition: aarch64Specifications.hpp:309
triton::arch::arm::aarch64::ID_INS_SEV
@ ID_INS_SEV
sev
Definition: aarch64Specifications.hpp:517
triton::arch::arm::aarch64::ID_INS_STTR
@ ID_INS_STTR
sttr
Definition: aarch64Specifications.hpp:421
triton::arch::arm::aarch64::ID_INS_AESE
@ ID_INS_AESE
aese
Definition: aarch64Specifications.hpp:102
triton::arch::arm::aarch64::ID_INS_CRC32CB
@ ID_INS_CRC32CB
crc32cb
Definition: aarch64Specifications.hpp:135
triton::arch::arm::aarch64::ID_INS_STLXRH
@ ID_INS_STLXRH
stlxrh
Definition: aarch64Specifications.hpp:412
triton::arch::arm::aarch64::ID_INS_LD2R
@ ID_INS_LD2R
ld2r
Definition: aarch64Specifications.hpp:236
triton::arch::arm::aarch64::ID_INS_BR
@ ID_INS_BR
br
Definition: aarch64Specifications.hpp:114
triton::arch::arm::aarch64::ID_INS_FMSUB
@ ID_INS_FMSUB
fmsub
Definition: aarch64Specifications.hpp:208
triton::arch::arm::aarch64::ID_INS_FRINTZ
@ ID_INS_FRINTZ
frintz
Definition: aarch64Specifications.hpp:224
triton::arch::arm::aarch64::ID_INS_UMLAL
@ ID_INS_UMLAL
umlal
Definition: aarch64Specifications.hpp:468
triton::arch::arm::aarch64::ID_INS_USUBW2
@ ID_INS_USUBW2
usubw2
Definition: aarch64Specifications.hpp:500
triton::arch::arm::aarch64::ID_INS_FDIV
@ ID_INS_FDIV
fdiv
Definition: aarch64Specifications.hpp:191
triton::arch::arm::aarch64::ID_INS_USHL
@ ID_INS_USHL
ushl
Definition: aarch64Specifications.hpp:494
triton::arch::arm::aarch64::ID_INS_FCMEQ
@ ID_INS_FCMEQ
fcmeq
Definition: aarch64Specifications.hpp:166
triton::arch::arm::aarch64::ID_INS_FMAXP
@ ID_INS_FMAXP
fmaxp
Definition: aarch64Specifications.hpp:197
triton::arch::arm::aarch64::ID_INS_RBIT
@ ID_INS_RBIT
rbit
Definition: aarch64Specifications.hpp:299
triton::arch::arm::aarch64::ID_INS_FMAX
@ ID_INS_FMAX
fmax
Definition: aarch64Specifications.hpp:193
triton::arch::arm::aarch64::ID_INS_CNT
@ ID_INS_CNT
cnt
Definition: aarch64Specifications.hpp:132
triton::arch::arm::aarch64::ID_INS_SVC
@ ID_INS_SVC
svc
Definition: aarch64Specifications.hpp:433
triton::arch::arm::aarch64::ID_INS_FMOV
@ ID_INS_FMOV
fmov
Definition: aarch64Specifications.hpp:207
triton::arch::arm::aarch64::ID_INS_FSQRT
@ ID_INS_FSQRT
fsqrt
Definition: aarch64Specifications.hpp:227
triton::arch::arm::aarch64::ID_INS_HINT
@ ID_INS_HINT
hint
Definition: aarch64Specifications.hpp:229
triton::arch::arm::aarch64::ID_INS_FCSEL
@ ID_INS_FCSEL
fcsel
Definition: aarch64Specifications.hpp:173
triton::arch::arm::aarch64::ID_INS_CNEG
@ ID_INS_CNEG
cneg
Definition: aarch64Specifications.hpp:533
triton::arch::arm::aarch64::ID_INS_FCMGT
@ ID_INS_FCMGT
fcmgt
Definition: aarch64Specifications.hpp:168
triton::arch::arm::aarch64::ID_INS_SQSHRN2
@ ID_INS_SQSHRN2
sqshrn2
Definition: aarch64Specifications.hpp:381
triton::arch::arm::aarch64::ID_INS_URSHL
@ ID_INS_URSHL
urshl
Definition: aarch64Specifications.hpp:488
triton::arch::arm::aarch64::ID_INS_LD4R
@ ID_INS_LD4R
ld4r
Definition: aarch64Specifications.hpp:241
triton::arch::arm::aarch64::ID_INS_SQDMLSL
@ ID_INS_SQDMLSL
sqdmlsl
Definition: aarch64Specifications.hpp:366
triton::arch::arm::aarch64::ID_INS_ISB
@ ID_INS_ISB
isb
Definition: aarch64Specifications.hpp:233
triton::arch::arm::aarch64::ID_INS_FCVTXN2
@ ID_INS_FCVTXN2
fcvtxn2
Definition: aarch64Specifications.hpp:188
triton::arch::arm::aarch64::ID_INS_FMINNM
@ ID_INS_FMINNM
fminnm
Definition: aarch64Specifications.hpp:200
triton::arch::arm::aarch64::ID_INS_EOR
@ ID_INS_EOR
eor
Definition: aarch64Specifications.hpp:154
triton::arch::arm::aarch64::ID_INS_FMAXNM
@ ID_INS_FMAXNM
fmaxnm
Definition: aarch64Specifications.hpp:194
triton::arch::arm::aarch64::ID_INS_CSNEG
@ ID_INS_CSNEG
csneg
Definition: aarch64Specifications.hpp:145
triton::arch::arm::aarch64::ID_INS_CMLE
@ ID_INS_CMLE
cmle
Definition: aarch64Specifications.hpp:129
triton::arch::arm::aarch64::ID_INS_STXR
@ ID_INS_STXR
stxr
Definition: aarch64Specifications.hpp:428
triton::arch::arm::aarch64::ID_INS_USHLL2
@ ID_INS_USHLL2
ushll2
Definition: aarch64Specifications.hpp:492
triton::arch::arm::aarch64::ID_INS_SMULL
@ ID_INS_SMULL
smull
Definition: aarch64Specifications.hpp:361
triton::arch::arm::aarch64::ID_INS_LD1R
@ ID_INS_LD1R
ld1r
Definition: aarch64Specifications.hpp:235
triton::arch::arm::aarch64::ID_INS_FCVTAU
@ ID_INS_FCVTAU
fcvtau
Definition: aarch64Specifications.hpp:175
triton::arch::arm::aarch64::ID_INS_EON
@ ID_INS_EON
eon
Definition: aarch64Specifications.hpp:153
triton::arch::arm::aarch64::ID_INS_SQDMULL2
@ ID_INS_SQDMULL2
sqdmull2
Definition: aarch64Specifications.hpp:370
triton::arch::arm::aarch64::ID_INS_SXTW
@ ID_INS_SXTW
sxtw
Definition: aarch64Specifications.hpp:536
triton::arch::arm::aarch64::ID_INS_FCMLE
@ ID_INS_FCMLE
fcmle
Definition: aarch64Specifications.hpp:169
triton::arch::arm::aarch64::ID_INS_UADALP
@ ID_INS_UADALP
uadalp
Definition: aarch64Specifications.hpp:448
triton::arch::arm::aarch64::ID_INS_SHSUB
@ ID_INS_SHSUB
shsub
Definition: aarch64Specifications.hpp:343
triton::arch::arm::aarch64::ID_INS_CRC32W
@ ID_INS_CRC32W
crc32w
Definition: aarch64Specifications.hpp:140
triton::arch::arm::aarch64::ID_INS_AESD
@ ID_INS_AESD
aesd
Definition: aarch64Specifications.hpp:101
triton::arch::arm::aarch64::ID_INS_SQRSHRUN
@ ID_INS_SQRSHRUN
sqrshrun
Definition: aarch64Specifications.hpp:376
triton::arch::arm::aarch64::ID_INS_SQSHRUN
@ ID_INS_SQSHRUN
sqshrun
Definition: aarch64Specifications.hpp:382
triton::arch::arm::aarch64::ID_INS_TST
@ ID_INS_TST
tst
Definition: aarch64Specifications.hpp:528
triton::arch::arm::aarch64::ID_INS_UBFM
@ ID_INS_UBFM
ubfm
Definition: aarch64Specifications.hpp:455
triton::arch::arm::aarch64::ID_INS_CINV
@ ID_INS_CINV
cinv
Definition: aarch64Specifications.hpp:532
triton::arch::arm::aarch64::ID_INS_USUBL2
@ ID_INS_USUBL2
usubl2
Definition: aarch64Specifications.hpp:498
triton::arch::arm::aarch64::ID_INS_FRECPX
@ ID_INS_FRECPX
frecpx
Definition: aarch64Specifications.hpp:217
triton::arch::arm::aarch64::ID_INS_UBFX
@ ID_INS_UBFX
ubfx
Definition: aarch64Specifications.hpp:523
triton::arch::arm::aarch64::ID_INS_FRINTA
@ ID_INS_FRINTA
frinta
Definition: aarch64Specifications.hpp:218
triton::arch::arm::aarch64::ID_INS_RSHRN
@ ID_INS_RSHRN
rshrn
Definition: aarch64Specifications.hpp:307
triton::arch::arm::aarch64::ID_INS_UZP1
@ ID_INS_UZP1
uzp1
Definition: aarch64Specifications.hpp:502
triton::arch::arm::aarch64::ID_INS_DCPS2
@ ID_INS_DCPS2
dcps2
Definition: aarch64Specifications.hpp:147
triton::arch::arm::aarch64::ID_INS_STTRB
@ ID_INS_STTRB
sttrb
Definition: aarch64Specifications.hpp:419
triton::arch::arm::aarch64::ID_INS_BIC
@ ID_INS_BIC
bic
Definition: aarch64Specifications.hpp:109
triton::arch::arm::aarch64::ID_INS_SADDL
@ ID_INS_SADDL
saddl
Definition: aarch64Specifications.hpp:320
triton::arch::arm::aarch64::ID_INS_LDRH
@ ID_INS_LDRH
ldrh
Definition: aarch64Specifications.hpp:254
triton::arch::arm::aarch64::ID_INS_STNP
@ ID_INS_STNP
stnp
Definition: aarch64Specifications.hpp:414
triton::arch::arm::aarch64::ID_INS_CRC32CW
@ ID_INS_CRC32CW
crc32cw
Definition: aarch64Specifications.hpp:137
triton::arch::arm::aarch64::ID_INS_CMP
@ ID_INS_CMP
cmp
Definition: aarch64Specifications.hpp:537
triton::arch::arm::aarch64::ID_INS_LDNP
@ ID_INS_LDNP
ldnp
Definition: aarch64Specifications.hpp:249
triton::arch::arm::aarch64::ID_INS_BFXIL
@ ID_INS_BFXIL
bfxil
Definition: aarch64Specifications.hpp:525
triton::arch::arm::aarch64::ID_INS_LDTRSW
@ ID_INS_LDTRSW
ldtrsw
Definition: aarch64Specifications.hpp:262
triton::arch::arm::aarch64::ID_INS_MOV
@ ID_INS_MOV
mov
Definition: aarch64Specifications.hpp:133
triton::arch::arm::aarch64::ID_INS_ZIP1
@ ID_INS_ZIP1
zip1
Definition: aarch64Specifications.hpp:506
triton::arch::arm::aarch64::ID_INS_PMUL
@ ID_INS_PMUL
pmul
Definition: aarch64Specifications.hpp:294
triton::arch::arm::aarch64::ID_INS_SQDMLAL
@ ID_INS_SQDMLAL
sqdmlal
Definition: aarch64Specifications.hpp:364
triton::arch::arm::aarch64::ID_INS_SABAL
@ ID_INS_SABAL
sabal
Definition: aarch64Specifications.hpp:311
triton::arch::arm::aarch64::ID_INS_STUR
@ ID_INS_STUR
stur
Definition: aarch64Specifications.hpp:423
triton::arch::arm::aarch64::ID_INS_SXTH
@ ID_INS_SXTH
sxth
Definition: aarch64Specifications.hpp:535
triton::arch::arm::aarch64::ID_INS_FRECPS
@ ID_INS_FRECPS
frecps
Definition: aarch64Specifications.hpp:216
triton::arch::arm::aarch64::ID_INS_FRINTI
@ ID_INS_FRINTI
frinti
Definition: aarch64Specifications.hpp:219
triton::arch::arm::aarch64::ID_INS_UQSHL
@ ID_INS_UQSHL
uqshl
Definition: aarch64Specifications.hpp:480
triton::arch::arm::aarch64::ID_INS_PRFM
@ ID_INS_PRFM
prfm
Definition: aarch64Specifications.hpp:295
triton::arch::arm::aarch64::ID_INS_LDAR
@ ID_INS_LDAR
ldar
Definition: aarch64Specifications.hpp:244
triton::arch::arm::aarch64::ID_INS_SBFX
@ ID_INS_SBFX
sbfx
Definition: aarch64Specifications.hpp:522
triton::arch::arm::aarch64::ID_INS_STXRH
@ ID_INS_STXRH
stxrh
Definition: aarch64Specifications.hpp:427
triton::arch::arm::aarch64::ID_INS_UABAL2
@ ID_INS_UABAL2
uabal2
Definition: aarch64Specifications.hpp:442
triton::arch::arm::aarch64::ID_INS_INVALID
@ ID_INS_INVALID
invalid
Definition: aarch64Specifications.hpp:91
triton::arch::arm::aarch64::ID_INS_FCVTZU
@ ID_INS_FCVTZU
fcvtzu
Definition: aarch64Specifications.hpp:190
triton::arch::arm::aarch64::ID_INS_STRB
@ ID_INS_STRB
strb
Definition: aarch64Specifications.hpp:416
triton::arch::arm::aarch64::ID_INS_PRFUM
@ ID_INS_PRFUM
prfum
Definition: aarch64Specifications.hpp:296
triton::arch::arm::aarch64::ID_INS_SMADDL
@ ID_INS_SMADDL
smaddl
Definition: aarch64Specifications.hpp:345
triton::arch::arm::aarch64::ID_INS_IC
@ ID_INS_IC
ic
Definition: aarch64Specifications.hpp:541
triton::arch::arm::aarch64::ID_INS_SMLAL2
@ ID_INS_SMLAL2
smlal2
Definition: aarch64Specifications.hpp:353
triton::arch::arm::aarch64::ID_INS_SHA1P
@ ID_INS_SHA1P
sha1p
Definition: aarch64Specifications.hpp:330
triton::arch::arm::aarch64::ID_INS_LDURB
@ ID_INS_LDURB
ldurb
Definition: aarch64Specifications.hpp:264
triton::arch::arm::aarch64::ID_INS_UMULH
@ ID_INS_UMULH
umulh
Definition: aarch64Specifications.hpp:473
triton::arch::arm::aarch64::ID_INS_SBFM
@ ID_INS_SBFM
sbfm
Definition: aarch64Specifications.hpp:324
triton::arch::arm::aarch64::ID_INS_FCVTMS
@ ID_INS_FCVTMS
fcvtms
Definition: aarch64Specifications.hpp:179
triton::arch::arm::aarch64::ID_INS_CSINV
@ ID_INS_CSINV
csinv
Definition: aarch64Specifications.hpp:144
triton::arch::arm::aarch64::ID_INS_URSRA
@ ID_INS_URSRA
ursra
Definition: aarch64Specifications.hpp:491
triton::arch::arm::aarch64::ID_INS_UABA
@ ID_INS_UABA
uaba
Definition: aarch64Specifications.hpp:444
triton::arch::arm::aarch64::ID_INS_USUBW
@ ID_INS_USUBW
usubw
Definition: aarch64Specifications.hpp:501
triton::arch::arm::aarch64::ID_INS_SQDMULH
@ ID_INS_SQDMULH
sqdmulh
Definition: aarch64Specifications.hpp:368
triton::arch::arm::aarch64::ID_INS_LDARH
@ ID_INS_LDARH
ldarh
Definition: aarch64Specifications.hpp:243
triton::arch::arm::aarch64::ID_INS_TLBI
@ ID_INS_TLBI
tlbi
Definition: aarch64Specifications.hpp:544
triton::arch::arm::aarch64::ID_INS_FABS
@ ID_INS_FABS
fabs
Definition: aarch64Specifications.hpp:159
triton::arch::arm::aarch64::ID_INS_FCMGE
@ ID_INS_FCMGE
fcmge
Definition: aarch64Specifications.hpp:167
triton::arch::arm::aarch64::ID_INS_CMLT
@ ID_INS_CMLT
cmlt
Definition: aarch64Specifications.hpp:130
triton::arch::arm::aarch64::ID_INS_FRINTX
@ ID_INS_FRINTX
frintx
Definition: aarch64Specifications.hpp:223
triton::arch::arm::aarch64::ID_INS_LDRSB
@ ID_INS_LDRSB
ldrsb
Definition: aarch64Specifications.hpp:255
triton::arch::arm::aarch64::ID_INS_LD1
@ ID_INS_LD1
ld1
Definition: aarch64Specifications.hpp:234
triton::arch::arm::aarch64::ID_INS_LDTRB
@ ID_INS_LDTRB
ldtrb
Definition: aarch64Specifications.hpp:258
triton::arch::arm::aarch64::ID_INS_SHLL
@ ID_INS_SHLL
shll
Definition: aarch64Specifications.hpp:339
triton::arch::arm::aarch64::ID_INS_FMULX
@ ID_INS_FMULX
fmulx
Definition: aarch64Specifications.hpp:210
triton::arch::arm::aarch64::ID_INS_LD3
@ ID_INS_LD3
ld3
Definition: aarch64Specifications.hpp:239
triton::arch::arm::aarch64::ID_INS_CMGT
@ ID_INS_CMGT
cmgt
Definition: aarch64Specifications.hpp:126
triton::arch::arm::aarch64::ID_INS_WFI
@ ID_INS_WFI
wfi
Definition: aarch64Specifications.hpp:516
triton::arch::arm::aarch64::ID_INS_STXRB
@ ID_INS_STXRB
stxrb
Definition: aarch64Specifications.hpp:426
triton::arch::arm::aarch64::ID_INS_BRK
@ ID_INS_BRK
brk
Definition: aarch64Specifications.hpp:115
triton::arch::arm::aarch64::ID_INS_EXTR
@ ID_INS_EXTR
extr
Definition: aarch64Specifications.hpp:156
triton::arch::arm::aarch64::ID_INS_DSB
@ ID_INS_DSB
dsb
Definition: aarch64Specifications.hpp:151
triton::arch::arm::aarch64::ID_INS_FMAXNMV
@ ID_INS_FMAXNMV
fmaxnmv
Definition: aarch64Specifications.hpp:196
triton::arch::arm::aarch64::ID_INS_FMUL
@ ID_INS_FMUL
fmul
Definition: aarch64Specifications.hpp:209
triton::arch::arm::aarch64::ID_INS_PMULL
@ ID_INS_PMULL
pmull
Definition: aarch64Specifications.hpp:293
triton::arch::arm::aarch64::ID_INS_SQXTN
@ ID_INS_SQXTN
sqxtn
Definition: aarch64Specifications.hpp:386
triton::arch::arm::aarch64::ID_INS_FABD
@ ID_INS_FABD
fabd
Definition: aarch64Specifications.hpp:158
triton::arch::arm::aarch64::ID_INS_TRN1
@ ID_INS_TRN1
trn1
Definition: aarch64Specifications.hpp:440
triton::arch::arm::aarch64::ID_INS_UQRSHRN2
@ ID_INS_UQRSHRN2
uqrshrn2
Definition: aarch64Specifications.hpp:479
triton::arch::arm::aarch64::ID_INS_UBFIZ
@ ID_INS_UBFIZ
ubfiz
Definition: aarch64Specifications.hpp:521
triton::arch::arm::aarch64::ID_INS_RET
@ ID_INS_RET
ret
Definition: aarch64Specifications.hpp:300
triton::arch::arm::aarch64::ID_INS_BIT
@ ID_INS_BIT
bit
Definition: aarch64Specifications.hpp:111
triton::arch::arm::aarch64::ID_INS_TRN2
@ ID_INS_TRN2
trn2
Definition: aarch64Specifications.hpp:441
triton::arch::arm::aarch64::ID_INS_SMC
@ ID_INS_SMC
smc
Definition: aarch64Specifications.hpp:349
triton::arch::arm::aarch64::ID_INS_SQXTUN2
@ ID_INS_SQXTUN2
sqxtun2
Definition: aarch64Specifications.hpp:387
triton::arch::arm::aarch64::ID_INS_UABAL
@ ID_INS_UABAL
uabal
Definition: aarch64Specifications.hpp:443
triton::arch::arm::aarch64::ID_INS_SHA1C
@ ID_INS_SHA1C
sha1c
Definition: aarch64Specifications.hpp:327
triton::arch::arm::aarch64::ID_INS_UQADD
@ ID_INS_UQADD
uqadd
Definition: aarch64Specifications.hpp:476
triton::arch::arm::aarch64::ID_INS_LDTRSH
@ ID_INS_LDTRSH
ldtrsh
Definition: aarch64Specifications.hpp:261
triton::arch::arm::aarch64::ID_INS_UMLSL
@ ID_INS_UMLSL
umlsl
Definition: aarch64Specifications.hpp:470
triton::arch::arm::aarch64::ID_INS_MLS
@ ID_INS_MLS
mls
Definition: aarch64Specifications.hpp:278
triton::arch::architecture_e
architecture_e
Definition: archEnums.hpp:32
triton::arch::register_e
register_e
Types of register.
Definition: archEnums.hpp:64
triton::arch::ARCH_AARCH64
@ ARCH_AARCH64
Definition: archEnums.hpp:34
triton::arch::ID_REG_INVALID
@ ID_REG_INVALID
invalid = 0
Definition: archEnums.hpp:65
triton::arch::arm::shift_e
shift_e
Types of shift.
Definition: archEnums.hpp:124
triton::arch::arm::vas_e
vas_e
Vector arrangement specifier.
Definition: archEnums.hpp:175
triton::arch::arm::extend_e
extend_e
Types of extend.
Definition: archEnums.hpp:140
triton::arch::arm::condition_e
condition_e
Types of condition.
Definition: archEnums.hpp:154
triton::arch::arm::ID_SHIFT_LSR
@ ID_SHIFT_LSR
Logical Shift Right (immediate)
Definition: archEnums.hpp:128
triton::arch::arm::ID_SHIFT_ASR
@ ID_SHIFT_ASR
Arithmetic Shift Right (immediate)
Definition: archEnums.hpp:126
triton::arch::arm::ID_SHIFT_ROR
@ ID_SHIFT_ROR
Rotate Right (immediate)
Definition: archEnums.hpp:129
triton::arch::arm::ID_SHIFT_INVALID
@ ID_SHIFT_INVALID
invalid
Definition: archEnums.hpp:125
triton::arch::arm::ID_SHIFT_LSL
@ ID_SHIFT_LSL
Logical Shift Left (immediate)
Definition: archEnums.hpp:127
triton::arch::arm::ID_VAS_4S
@ ID_VAS_4S
4 lanes, each containing a 32-bit element.
Definition: archEnums.hpp:181
triton::arch::arm::ID_VAS_2D
@ ID_VAS_2D
2 lanes, each containing a 64-bit element.
Definition: archEnums.hpp:183
triton::arch::arm::ID_VAS_1D
@ ID_VAS_1D
1 lane containing a 64-bit element.
Definition: archEnums.hpp:184
triton::arch::arm::ID_VAS_16B
@ ID_VAS_16B
16 lanes, each containing an 8-bit element.
Definition: archEnums.hpp:177
triton::arch::arm::ID_VAS_8B
@ ID_VAS_8B
8 lanes, each containing an 8-bit element.
Definition: archEnums.hpp:178
triton::arch::arm::ID_VAS_INVALID
@ ID_VAS_INVALID
invalid
Definition: archEnums.hpp:176
triton::arch::arm::ID_VAS_8H
@ ID_VAS_8H
8 lanes, each containing a 16-bit element.
Definition: archEnums.hpp:179
triton::arch::arm::ID_VAS_4H
@ ID_VAS_4H
4 lanes, each containing a 16-bit element.
Definition: archEnums.hpp:180
triton::arch::arm::ID_VAS_2S
@ ID_VAS_2S
2 lanes, each containing a 32-bit element.
Definition: archEnums.hpp:182
triton::arch::arm::ID_EXTEND_SXTW
@ ID_EXTEND_SXTW
Extracts a word (32-bit) value from a register and zero extends it to the size of the register.
Definition: archEnums.hpp:148
triton::arch::arm::ID_EXTEND_UXTX
@ ID_EXTEND_UXTX
Use the whole 64-bit register.
Definition: archEnums.hpp:145
triton::arch::arm::ID_EXTEND_SXTX
@ ID_EXTEND_SXTX
Use the whole 64-bit register.
Definition: archEnums.hpp:149
triton::arch::arm::ID_EXTEND_SXTH
@ ID_EXTEND_SXTH
Extracts a halfword (16-bit) value from a register and zero extends it to the size of the register.
Definition: archEnums.hpp:147
triton::arch::arm::ID_EXTEND_UXTB
@ ID_EXTEND_UXTB
Extracts a byte (8-bit) value from a register and zero extends it to the size of the register.
Definition: archEnums.hpp:142
triton::arch::arm::ID_EXTEND_INVALID
@ ID_EXTEND_INVALID
invalid
Definition: archEnums.hpp:141
triton::arch::arm::ID_EXTEND_UXTW
@ ID_EXTEND_UXTW
Extracts a word (32-bit) value from a register and zero extends it to the size of the register.
Definition: archEnums.hpp:144
triton::arch::arm::ID_EXTEND_SXTB
@ ID_EXTEND_SXTB
Extracts a byte (8-bit) value from a register and zero extends it to the size of the register.
Definition: archEnums.hpp:146
triton::arch::arm::ID_EXTEND_UXTH
@ ID_EXTEND_UXTH
Extracts a halfword (16-bit) value from a register and zero extends it to the size of the register.
Definition: archEnums.hpp:143
triton::arch::arm::ID_CONDITION_HS
@ ID_CONDITION_HS
Higher or same (unsigned >=). C set.
Definition: archEnums.hpp:161
triton::arch::arm::ID_CONDITION_PL
@ ID_CONDITION_PL
Positive or zero. N clear.
Definition: archEnums.hpp:168
triton::arch::arm::ID_CONDITION_VC
@ ID_CONDITION_VC
No overflow. V clear.
Definition: archEnums.hpp:169
triton::arch::arm::ID_CONDITION_LE
@ ID_CONDITION_LE
Signed <=. Z set, N and V differ.
Definition: archEnums.hpp:162
triton::arch::arm::ID_CONDITION_VS
@ ID_CONDITION_VS
Overflow. V set.
Definition: archEnums.hpp:170
triton::arch::arm::ID_CONDITION_MI
@ ID_CONDITION_MI
Negative. N set.
Definition: archEnums.hpp:166
triton::arch::arm::ID_CONDITION_GE
@ ID_CONDITION_GE
Signed >=. N and V the same.
Definition: archEnums.hpp:158
triton::arch::arm::ID_CONDITION_GT
@ ID_CONDITION_GT
Signed >. Z clear, N and V the same.
Definition: archEnums.hpp:159
triton::arch::arm::ID_CONDITION_HI
@ ID_CONDITION_HI
Higher (unsigned >). C set and Z clear.
Definition: archEnums.hpp:160
triton::arch::arm::ID_CONDITION_NE
@ ID_CONDITION_NE
Not equal. Z clear.
Definition: archEnums.hpp:167
triton::arch::arm::ID_CONDITION_AL
@ ID_CONDITION_AL
Always. Any flags. This suffix is normally omitted.
Definition: archEnums.hpp:156
triton::arch::arm::ID_CONDITION_LO
@ ID_CONDITION_LO
Lower (unsigned <). C clear.
Definition: archEnums.hpp:163
triton::arch::arm::ID_CONDITION_LT
@ ID_CONDITION_LT
Signed <. N and V differ.
Definition: archEnums.hpp:165
triton::arch::arm::ID_CONDITION_LS
@ ID_CONDITION_LS
Lower or same (unsigned <=). C clear or Z set.
Definition: archEnums.hpp:164
triton::arch::arm::ID_CONDITION_INVALID
@ ID_CONDITION_INVALID
invalid
Definition: archEnums.hpp:155
triton::arch::arm::ID_CONDITION_EQ
@ ID_CONDITION_EQ
Equal. Z set.
Definition: archEnums.hpp:157
triton::uint32
std::uint32_t uint32
unisgned 32-bits
Definition: tritonTypes.hpp:39
triton
The Triton namespace.
Definition: architecture.cpp:22
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