Arm

Collaboration diagram for Arm:

Modules
	Aarch64
	Arm32

Namespaces
namespace	triton::arch::arm::aarch64
	The aarch64 namespace.
namespace	triton::arch::arm::arm32
	The arm32 namespace.

Classes
class	triton::arch::arm::ArmOperandProperties
	This class is used to represent specific properties of an Arm operand. More...

Enumerations
enum	triton::arch::arm::shift_e {   triton::arch::arm::ID_SHIFT_INVALID = 0 , triton::arch::arm::ID_SHIFT_ASR , triton::arch::arm::ID_SHIFT_LSL , triton::arch::arm::ID_SHIFT_LSR ,   triton::arch::arm::ID_SHIFT_ROR , triton::arch::arm::ID_SHIFT_RRX , triton::arch::arm::ID_SHIFT_ASR_REG , triton::arch::arm::ID_SHIFT_LSL_REG ,   triton::arch::arm::ID_SHIFT_LSR_REG , triton::arch::arm::ID_SHIFT_ROR_REG , triton::arch::arm::ID_SHIFT_RRX_REG , triton::arch::arm::ID_SHIFT_LAST_ITEM }
	Types of shift. More...
enum	triton::arch::arm::extend_e {   triton::arch::arm::ID_EXTEND_INVALID = 0 , triton::arch::arm::ID_EXTEND_UXTB , triton::arch::arm::ID_EXTEND_UXTH , triton::arch::arm::ID_EXTEND_UXTW ,   triton::arch::arm::ID_EXTEND_UXTX , triton::arch::arm::ID_EXTEND_SXTB , triton::arch::arm::ID_EXTEND_SXTH , triton::arch::arm::ID_EXTEND_SXTW ,   triton::arch::arm::ID_EXTEND_SXTX , triton::arch::arm::ID_EXTEND_LAST_ITEM }
	Types of extend. More...
enum	triton::arch::arm::condition_e {   triton::arch::arm::ID_CONDITION_INVALID = 0 , triton::arch::arm::ID_CONDITION_AL , triton::arch::arm::ID_CONDITION_EQ , triton::arch::arm::ID_CONDITION_GE ,   triton::arch::arm::ID_CONDITION_GT , triton::arch::arm::ID_CONDITION_HI , triton::arch::arm::ID_CONDITION_HS , triton::arch::arm::ID_CONDITION_LE ,   triton::arch::arm::ID_CONDITION_LO , triton::arch::arm::ID_CONDITION_LS , triton::arch::arm::ID_CONDITION_LT , triton::arch::arm::ID_CONDITION_MI ,   triton::arch::arm::ID_CONDITION_NE , triton::arch::arm::ID_CONDITION_PL , triton::arch::arm::ID_CONDITION_VC , triton::arch::arm::ID_CONDITION_VS ,   triton::arch::arm::ID_CONDITION_LAST_ITEM }
	Types of condition. More...
enum	triton::arch::arm::vas_e {   triton::arch::arm::ID_VAS_INVALID = 0 , triton::arch::arm::ID_VAS_16B , triton::arch::arm::ID_VAS_8B , triton::arch::arm::ID_VAS_8H ,   triton::arch::arm::ID_VAS_4H , triton::arch::arm::ID_VAS_4S , triton::arch::arm::ID_VAS_2S , triton::arch::arm::ID_VAS_2D ,   triton::arch::arm::ID_VAS_1D , triton::arch::arm::ID_VAS_LAST_ITEM }
	Vector arrangement specifier. More...

Detailed Description

Enumeration Type Documentation

condition_e

enum triton::arch::arm::condition_e

Types of condition.

Enumerator
ID_CONDITION_INVALID	invalid
ID_CONDITION_AL	Always. Any flags. This suffix is normally omitted.
ID_CONDITION_EQ	Equal. Z set.
ID_CONDITION_GE	Signed >=. N and V the same.
ID_CONDITION_GT	Signed >. Z clear, N and V the same.
ID_CONDITION_HI	Higher (unsigned >). C set and Z clear.
ID_CONDITION_HS	Higher or same (unsigned >=). C set.
ID_CONDITION_LE	Signed <=. Z set, N and V differ.
ID_CONDITION_LO	Lower (unsigned <). C clear.
ID_CONDITION_LS	Lower or same (unsigned <=). C clear or Z set.
ID_CONDITION_LT	Signed <. N and V differ.
ID_CONDITION_MI	Negative. N set.
ID_CONDITION_NE	Not equal. Z clear.
ID_CONDITION_PL	Positive or zero. N clear.
ID_CONDITION_VC	No overflow. V clear.
ID_CONDITION_VS	Overflow. V set.
ID_CONDITION_LAST_ITEM	must be the last item.

Definition at line 154 of file archEnums.hpp.

extend_e

enum triton::arch::arm::extend_e

Types of extend.

Enumerator
ID_EXTEND_INVALID	invalid
ID_EXTEND_UXTB	Extracts a byte (8-bit) value from a register and zero extends it to the size of the register.
ID_EXTEND_UXTH	Extracts a halfword (16-bit) value from a register and zero extends it to the size of the register.
ID_EXTEND_UXTW	Extracts a word (32-bit) value from a register and zero extends it to the size of the register.
ID_EXTEND_UXTX	Use the whole 64-bit register.
ID_EXTEND_SXTB	Extracts a byte (8-bit) value from a register and zero extends it to the size of the register.
ID_EXTEND_SXTH	Extracts a halfword (16-bit) value from a register and zero extends it to the size of the register.
ID_EXTEND_SXTW	Extracts a word (32-bit) value from a register and zero extends it to the size of the register.
ID_EXTEND_SXTX	Use the whole 64-bit register.
ID_EXTEND_LAST_ITEM	Must be the last item.

Definition at line 140 of file archEnums.hpp.

shift_e

enum triton::arch::arm::shift_e

Types of shift.

Enumerator
ID_SHIFT_INVALID	invalid
ID_SHIFT_ASR	Arithmetic Shift Right (immediate)
ID_SHIFT_LSL	Logical Shift Left (immediate)
ID_SHIFT_LSR	Logical Shift Right (immediate)
ID_SHIFT_ROR	Rotate Right (immediate)
ID_SHIFT_RRX	Rotate Right with Extend (immediate)
ID_SHIFT_ASR_REG	Arithmetic Shift Right (register)
ID_SHIFT_LSL_REG	Logical Shift Left (register)
ID_SHIFT_LSR_REG	Logical Shift Right (register)
ID_SHIFT_ROR_REG	Rotate Right (register)
ID_SHIFT_RRX_REG	Rotate Right with Extend (register)
ID_SHIFT_LAST_ITEM	Must be the last item.

Definition at line 124 of file archEnums.hpp.

vas_e

enum triton::arch::arm::vas_e

Vector arrangement specifier.

Enumerator
ID_VAS_INVALID	invalid
ID_VAS_16B	16 lanes, each containing an 8-bit element.
ID_VAS_8B	8 lanes, each containing an 8-bit element.
ID_VAS_8H	8 lanes, each containing a 16-bit element.
ID_VAS_4H	4 lanes, each containing a 16-bit element.
ID_VAS_4S	4 lanes, each containing a 32-bit element.
ID_VAS_2S	2 lanes, each containing a 32-bit element.
ID_VAS_2D	2 lanes, each containing a 64-bit element.
ID_VAS_1D	1 lane containing a 64-bit element.
ID_VAS_LAST_ITEM	must be the last item.

Definition at line 175 of file archEnums.hpp.