libTriton version 1.0 build 1592
Loading...
Searching...
No Matches
shortcutRegister.hpp
Go to the documentation of this file.
1
2/*
3** Copyright (C) - Triton
4**
5** This program is under the terms of the Apache License 2.0.
6*/
7
8#ifndef TRITON_SHORTCUTREGISTER_HPP
9#define TRITON_SHORTCUTREGISTER_HPP
10
11#include <triton/archEnums.hpp>
12#include <triton/exceptions.hpp>
13#include <triton/register.hpp>
14
15
16
18namespace triton {
25 namespace arch {
34 class ShortcutRegister {
35 public:
36 #define REG_SPEC(_0, LOWER_NAME, _2, _3, _4, _5, _6, _7, _8) \
37 triton::arch::Register x86_##LOWER_NAME;
38 #define REG_SPEC_NO_CAPSTONE REG_SPEC
39 #include "triton/x86.spec"
40
41 #define REG_SPEC(_0, LOWER_NAME, _2, _3, _4, _5) \
42 triton::arch::Register aarch64_##LOWER_NAME;
43 #define REG_SPEC_NO_CAPSTONE REG_SPEC
44 #define SYS_REG_SPEC REG_SPEC
45 #include "triton/aarch64.spec"
46
47 #define REG_SPEC(_0, LOWER_NAME, _2, _3, _4, _5) \
48 triton::arch::Register arm32_##LOWER_NAME;
49 #define REG_SPEC_NO_CAPSTONE REG_SPEC
50 #include "triton/arm32.spec"
51
52 #ifdef COMPILE_RISCV
53 // ShortcutRegister set for RV32 is the same,
54 #define REG_SPEC(_0, _1, LOWER_NAME, _2, _3, _4, _5) \
55 triton::arch::Register riscv_##LOWER_NAME;
56 #define REG_SPEC_NO_CAPSTONE REG_SPEC
57 #include "triton/riscv64.spec"
58 #endif
59
61 ShortcutRegister() {};
62
64 void clear(void) {
65 #define REG_SPEC(_0, LOWER_NAME, _2, _3, _4, _5, _6, _7, _8) \
66 this->x86_##LOWER_NAME = triton::arch::Register();
67 #define REG_SPEC_NO_CAPSTONE REG_SPEC
68 #include "triton/x86.spec"
69
70 #define REG_SPEC(_0, LOWER_NAME, _2, _3, _4, _5) \
71 this->aarch64_##LOWER_NAME = triton::arch::Register();
72 #define REG_SPEC_NO_CAPSTONE REG_SPEC
73 #define SYS_REG_SPEC REG_SPEC
74 #include "triton/aarch64.spec"
75
76 #define REG_SPEC(_0, LOWER_NAME, _2, _3, _4, _5) \
77 this->arm32_##LOWER_NAME = triton::arch::Register();
78 #define REG_SPEC_NO_CAPSTONE REG_SPEC
79 #include "triton/arm32.spec"
80
81 #ifdef COMPILE_RISCV
82 // ShortcutRegister set for RV32 is the same,
83 #define REG_SPEC(_0, _1, LOWER_NAME, _2, _3, _4, _5) \
84 this->riscv_##LOWER_NAME = triton::arch::Register();
85 #define REG_SPEC_NO_CAPSTONE REG_SPEC
86 #include "triton/riscv64.spec"
87 #endif
88 };
89
91 void init(triton::arch::architecture_e arch) {
92 this->clear();
93
94 switch (arch) {
95 case triton::arch::ARCH_AARCH64: {
96 #define REG_SPEC(UPPER_NAME, LOWER_NAME, AARCH64_UPPER, AARCH64_LOWER, AARCH64_PARENT, MUTABLE) \
97 this->aarch64_##LOWER_NAME = triton::arch::Register(triton::arch::ID_REG_AARCH64_##UPPER_NAME, \
98 #LOWER_NAME, \
99 triton::arch::ID_REG_AARCH64_##AARCH64_PARENT, \
100 AARCH64_UPPER, \
101 AARCH64_LOWER, \
102 MUTABLE);
103 #define REG_SPEC_NO_CAPSTONE REG_SPEC
104 #define SYS_REG_SPEC REG_SPEC
105 #include "triton/aarch64.spec"
106 }
107 break;
108
109 case triton::arch::ARCH_ARM32: {
110 #define REG_SPEC(UPPER_NAME, LOWER_NAME, ARM32_UPPER, ARM32_LOWER, ARM32_PARENT, MUTABLE) \
111 this->arm32_##LOWER_NAME = triton::arch::Register(triton::arch::ID_REG_ARM32_##UPPER_NAME, \
112 #LOWER_NAME, \
113 triton::arch::ID_REG_ARM32_##ARM32_PARENT, \
114 ARM32_UPPER, \
115 ARM32_LOWER, \
116 MUTABLE);
117 #define REG_SPEC_NO_CAPSTONE REG_SPEC
118 #include "triton/arm32.spec"
119 }
120 break;
121
122 case triton::arch::ARCH_X86: {
123 #define REG_SPEC(UPPER_NAME, LOWER_NAME, _1, _2, _3, X86_UPPER, X86_LOWER, X86_PARENT, X86_AVAIL) \
124 if (X86_AVAIL) \
125 this->x86_##LOWER_NAME = triton::arch::Register(triton::arch::ID_REG_X86_##UPPER_NAME, \
126 #LOWER_NAME, \
127 triton::arch::ID_REG_X86_##X86_PARENT, \
128 X86_UPPER, \
129 X86_LOWER, \
130 true);
131 #define REG_SPEC_NO_CAPSTONE REG_SPEC
132 #include "triton/x86.spec"
133 }
134 break;
135
136 case triton::arch::ARCH_X86_64: {
137 #define REG_SPEC(UPPER_NAME, LOWER_NAME, X86_64_UPPER, X86_64_LOWER, X86_64_PARENT, X86_UPPER, X86_LOWER, X86_PARENT, X86_AVAIL) \
138 this->x86_##LOWER_NAME = triton::arch::Register(triton::arch::ID_REG_X86_##UPPER_NAME, \
139 #LOWER_NAME, \
140 triton::arch::ID_REG_X86_##X86_64_PARENT, \
141 X86_64_UPPER, \
142 X86_64_LOWER, \
143 true);
144 #define REG_SPEC_NO_CAPSTONE REG_SPEC
145 #include "triton/x86.spec"
146 }
147 break;
148
149 #ifdef COMPILE_RISCV
150 case triton::arch::ARCH_RV64: {
151 #define REG_SPEC(CS_UPPER_NAME, UPPER_NAME, LOWER_NAME, ABI_NAME, RISCV_UPPER, RISCV_LOWER, MUTABLE) \
152 this->riscv_##LOWER_NAME = triton::arch::Register(triton::arch::ID_REG_RV64_##UPPER_NAME, \
153 #LOWER_NAME, \
154 triton::arch::ID_REG_RV64_##UPPER_NAME, \
155 RISCV_UPPER, \
156 RISCV_LOWER, \
157 MUTABLE);
158 #define REG_SPEC_NO_CAPSTONE REG_SPEC
159 #include "triton/riscv64.spec"
160 }
161 break;
162
163 case triton::arch::ARCH_RV32: {
164 #define REG_SPEC(CS_UPPER_NAME, UPPER_NAME, LOWER_NAME, ABI_NAME, RISCV_UPPER, RISCV_LOWER, MUTABLE) \
165 this->riscv_##LOWER_NAME = triton::arch::Register(triton::arch::ID_REG_RV32_##UPPER_NAME, \
166 #LOWER_NAME, \
167 triton::arch::ID_REG_RV32_##UPPER_NAME, \
168 RISCV_UPPER, \
169 RISCV_LOWER, \
170 MUTABLE);
171 #define REG_SPEC_NO_CAPSTONE REG_SPEC
172 #include "triton/riscv32.spec"
173 }
174 break;
175 #endif
176
177 default:
178 throw triton::exceptions::Architecture("ShortcutRegister::init(): Invalid architecture.");
179 }
180 };
181 };
182
184 };
186};
187
188#endif /* TRITON_SHORTCUTREGISTER_HPP */
triton::arch::ShortcutRegister
This is used as a shortcut to access to registers.
Definition shortcutRegister.hpp:34
triton::arch::ShortcutRegister::init
void init(triton::arch::architecture_e arch)
Definition shortcutRegister.hpp:91
triton::exceptions::Architecture
The exception class used by architectures.
Definition exceptions.hpp:221
triton::arch::architecture_e
architecture_e
Definition archEnums.hpp:32
triton::arch::ARCH_X86
@ ARCH_X86
Definition archEnums.hpp:40
triton::arch::ARCH_AARCH64
@ ARCH_AARCH64
Definition archEnums.hpp:34
triton::arch::ARCH_ARM32
@ ARCH_ARM32
Definition archEnums.hpp:35
triton::arch::ARCH_X86_64
@ ARCH_X86_64
Definition archEnums.hpp:41
triton
The Triton namespace.
Definition architecture.cpp:27
Generated by doxygen 1.10.0