27 this->callbacks = callbacks;
39 return this->
cpu->getEndianness();
46 return this->
cpu.get();
61 if (this->
cpu ==
nullptr) {
87 return this->
cpu->isFlag(regId);
99 return this->
cpu->isRegister(regId);
111 return this->
cpu->isRegisterValid(regId);
123 return this->
cpu->isThumb();
129 this->
cpu->setThumb(state);
137 return this->
cpu->isMemoryExclusive(mem);
143 this->
cpu->setMemoryExclusiveTag(mem, tag);
151 return this->
cpu->numberOfRegisters();
158 return this->
cpu->gprSize();
165 return this->
cpu->gprBitSize();
172 return this->
cpu->getAllRegisters();
179 return this->
cpu->getParentRegisters();
186 return this->
cpu->getProgramCounter();
193 return this->
cpu->getStackPointer();
200 return this->
cpu->getRegister(
id);
207 return this->
cpu->getRegister(name);
214 return this->
cpu->getParentRegister(reg);
221 return this->
cpu->getParentRegister(
id);
228 this->
cpu->disassembly(inst);
237 inst.setAddress(addr);
238 this->
cpu->disassembly(inst);
239 addr += inst.getSize();
245 std::vector<triton::arch::Instruction> ret;
256 addr += inst.getSize();
264 std::vector<triton::arch::Instruction> ret;
274 addr += inst.getSize();
275 }
while (!ret.back().isControlFlow());
284 return this->
cpu->getConcreteMemoryValue(addr, execCallbacks);
291 return this->
cpu->getConcreteMemoryValue(mem, execCallbacks);
298 return this->
cpu->getConcreteMemoryAreaValue(baseAddr, size, execCallbacks);
305 return this->
cpu->getConcreteRegisterValue(reg, execCallbacks);
312 this->
cpu->setConcreteMemoryValue(addr, value, execCallbacks);
319 this->
cpu->setConcreteMemoryValue(mem, value, execCallbacks);
326 this->
cpu->setConcreteMemoryAreaValue(baseAddr, values, execCallbacks);
333 this->
cpu->setConcreteMemoryAreaValue(baseAddr, area, size, execCallbacks);
340 this->
cpu->setConcreteRegisterValue(reg, value, execCallbacks);
347 return this->
cpu->isConcreteMemoryValueDefined(mem);
354 return this->
cpu->isConcreteMemoryValueDefined(baseAddr, size);
361 this->
cpu->clearConcreteMemoryValue(mem);
368 this->
cpu->clearConcreteMemoryValue(baseAddr, size);
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory area.
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters(void) const
Returns all parent registers.
TRITON_EXPORT void setThumb(bool state)
Sets CPU state to Thumb mode. Only valid for Arm32.
TRITON_EXPORT const triton::arch::Register & getStackPointer(void) const
Returns the stack pointer register.
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register ®, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
TRITON_EXPORT void setConcreteMemoryValue(triton::uint64 addr, triton::uint8 value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory cell.
TRITON_EXPORT void setArchitecture(triton::arch::architecture_e arch)
Initializes an architecture.
TRITON_EXPORT void disassembly(triton::arch::Instruction &inst) const
Disassembles the instruction according to the architecture.
TRITON_EXPORT void clearArchitecture(void)
Clears the architecture states (registers and memory).
TRITON_EXPORT bool isMemoryExclusive(const triton::arch::MemoryAccess &mem) const
Returns true if the memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
TRITON_EXPORT std::vector< triton::uint8 > getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
Returns the concrete value of a memory area.
TRITON_EXPORT const triton::arch::Instruction getNopInstruction(void) const
Returns a NOP instruction according to the architecture.
TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess &mem) const
Returns true if memory cells have a defined concrete value.
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters(void) const
Returns all registers.
TRITON_EXPORT Architecture(triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
TRITON_EXPORT const triton::arch::Register & getProgramCounter(void) const
Returns the program counter register.
std::unique_ptr< triton::arch::CpuInterface > cpu
Instance to the real CPU class.
TRITON_EXPORT void setMemoryExclusiveTag(const triton::arch::MemoryAccess &mem, bool tag)
Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
TRITON_EXPORT triton::uint8 getConcreteMemoryValue(triton::uint64 addr, bool execCallbacks=true) const
Returns the concrete value of a memory cell.
triton::arch::architecture_e arch
The kind of architecture used.
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register ®, bool execCallbacks=true) const
Returns the concrete value of a register.
TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess &mem)
Clears concrete values assigned to the memory cells.
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is a register or a flag.
TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const
Returns true if the register ID is a register.
TRITON_EXPORT bool isThumb(void) const
Returns true if the execution mode is Thumb. Only valid for Arm32.
TRITON_EXPORT triton::arch::architecture_e getArchitecture(void) const
Returns the kind of architecture as triton::arch::architecture_e.
TRITON_EXPORT bool isValid(void) const
Returns true if the architecture is valid.
TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const
Returns the kind of endianness as triton::arch::endianness_e.
TRITON_EXPORT triton::uint32 gprSize(void) const
Returns the bit in byte of the General Purpose Registers.
TRITON_EXPORT const triton::arch::Register & getParentRegister(triton::arch::register_e id) const
Returns parent register from id.
TRITON_EXPORT triton::arch::CpuInterface * getCpuInstance(void)
Returns the instance of the current CPU used.
This class is used to represent a basic block.
TRITON_EXPORT std::vector< triton::arch::Instruction > & getInstructions(void)
Gets all instructions of the block.
This interface is used as abstract CPU interface. All CPU must use this interface.
This class is used to represent an instruction.
This class is used to represent a memory access.
This class is used when an instruction has a register operand.
TRITON_EXPORT triton::arch::register_e getId(void) const
Returns the id of the register.
This class is used to describe the ARM (64-bits) spec.
This class is used to describe the ARM (32-bits) spec.
This class is used to describe the x86 (64-bits) spec.
This class is used to describe the x86 (32-bits) spec.
The exception class used by architectures.
const triton::arch::Instruction nop
AArch64 NOP instruction.
register_e
Types of register.
const triton::arch::Instruction nop
ARM32 NOP instruction.
const triton::arch::Instruction thumbnop
ARM32 Thumb NOP instruction.
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
std::uint64_t uint64
unisgned 64-bits
std::uint32_t uint32
unisgned 32-bits
std::uint8_t uint8
unisgned 8-bits
const triton::arch::Instruction nop
x86 NOP instruction