27 this->callbacks = callbacks;
43 triton::extlibs::capstone::cs_close(&this->handle);
48 void x8664Cpu::disassInit(
void) {
50 triton::extlibs::capstone::cs_close(&this->handle);
53 if (triton::extlibs::capstone::cs_open(triton::extlibs::capstone::CS_ARCH_X86, triton::extlibs::capstone::CS_MODE_64, &this->handle) != triton::extlibs::capstone::CS_ERR_OK)
56 triton::extlibs::capstone::cs_option(this->handle, triton::extlibs::capstone::CS_OPT_DETAIL, triton::extlibs::capstone::CS_OPT_ON);
57 triton::extlibs::capstone::cs_option(this->handle, triton::extlibs::capstone::CS_OPT_SYNTAX, triton::extlibs::capstone::CS_OPT_SYNTAX_INTEL);
61 void x8664Cpu::copy(
const x8664Cpu& other) {
62 this->callbacks = other.callbacks;
63 this->
memory = other.memory;
65 std::memcpy(this->
rax, other.rax,
sizeof(this->rax));
66 std::memcpy(this->
rbx, other.rbx,
sizeof(this->rbx));
67 std::memcpy(this->
rcx, other.rcx,
sizeof(this->rcx));
68 std::memcpy(this->
rdx, other.rdx,
sizeof(this->rdx));
69 std::memcpy(this->
rdi, other.rdi,
sizeof(this->rdi));
70 std::memcpy(this->
rsi, other.rsi,
sizeof(this->rsi));
71 std::memcpy(this->
rsp, other.rsp,
sizeof(this->rsp));
72 std::memcpy(this->
rbp, other.rbp,
sizeof(this->rbp));
73 std::memcpy(this->
rip, other.rip,
sizeof(this->rip));
74 std::memcpy(this->
eflags, other.eflags,
sizeof(this->eflags));
75 std::memcpy(this->
r8, other.r8,
sizeof(this->r8));
76 std::memcpy(this->
r9, other.r9,
sizeof(this->r9));
77 std::memcpy(this->
r10, other.r10,
sizeof(this->r10));
78 std::memcpy(this->
r11, other.r11,
sizeof(this->r11));
79 std::memcpy(this->
r12, other.r12,
sizeof(this->r12));
80 std::memcpy(this->
r13, other.r13,
sizeof(this->r13));
81 std::memcpy(this->
r14, other.r14,
sizeof(this->r14));
82 std::memcpy(this->
r15, other.r15,
sizeof(this->r15));
83 std::memcpy(this->
st0, other.st0,
sizeof(this->st0));
84 std::memcpy(this->
st1, other.st1,
sizeof(this->st1));
85 std::memcpy(this->
st2, other.st2,
sizeof(this->st2));
86 std::memcpy(this->
st3, other.st3,
sizeof(this->st3));
87 std::memcpy(this->
st4, other.st4,
sizeof(this->st4));
88 std::memcpy(this->
st5, other.st5,
sizeof(this->st5));
89 std::memcpy(this->
st6, other.st6,
sizeof(this->st6));
90 std::memcpy(this->
st7, other.st7,
sizeof(this->st7));
91 std::memcpy(this->
zmm0, other.zmm0,
sizeof(this->zmm0));
92 std::memcpy(this->
zmm1, other.zmm1,
sizeof(this->zmm1));
93 std::memcpy(this->
zmm2, other.zmm2,
sizeof(this->zmm2));
94 std::memcpy(this->
zmm3, other.zmm3,
sizeof(this->zmm3));
95 std::memcpy(this->
zmm4, other.zmm4,
sizeof(this->zmm4));
96 std::memcpy(this->
zmm5, other.zmm5,
sizeof(this->zmm5));
97 std::memcpy(this->
zmm6, other.zmm6,
sizeof(this->zmm6));
98 std::memcpy(this->
zmm7, other.zmm7,
sizeof(this->zmm7));
99 std::memcpy(this->
zmm8, other.zmm8,
sizeof(this->zmm8));
100 std::memcpy(this->
zmm9, other.zmm9,
sizeof(this->zmm9));
101 std::memcpy(this->
zmm10, other.zmm10,
sizeof(this->zmm10));
102 std::memcpy(this->
zmm11, other.zmm11,
sizeof(this->zmm11));
103 std::memcpy(this->
zmm12, other.zmm12,
sizeof(this->zmm12));
104 std::memcpy(this->
zmm13, other.zmm13,
sizeof(this->zmm13));
105 std::memcpy(this->
zmm14, other.zmm14,
sizeof(this->zmm14));
106 std::memcpy(this->
zmm15, other.zmm15,
sizeof(this->zmm15));
107 std::memcpy(this->
zmm16, other.zmm16,
sizeof(this->zmm16));
108 std::memcpy(this->
zmm17, other.zmm17,
sizeof(this->zmm17));
109 std::memcpy(this->
zmm18, other.zmm18,
sizeof(this->zmm18));
110 std::memcpy(this->
zmm19, other.zmm19,
sizeof(this->zmm19));
111 std::memcpy(this->
zmm20, other.zmm20,
sizeof(this->zmm20));
112 std::memcpy(this->
zmm21, other.zmm21,
sizeof(this->zmm21));
113 std::memcpy(this->
zmm22, other.zmm22,
sizeof(this->zmm22));
114 std::memcpy(this->
zmm23, other.zmm23,
sizeof(this->zmm23));
115 std::memcpy(this->
zmm24, other.zmm24,
sizeof(this->zmm24));
116 std::memcpy(this->
zmm25, other.zmm25,
sizeof(this->zmm25));
117 std::memcpy(this->
zmm26, other.zmm26,
sizeof(this->zmm26));
118 std::memcpy(this->
zmm27, other.zmm27,
sizeof(this->zmm27));
119 std::memcpy(this->
zmm28, other.zmm28,
sizeof(this->zmm28));
120 std::memcpy(this->
zmm29, other.zmm29,
sizeof(this->zmm29));
121 std::memcpy(this->
zmm30, other.zmm30,
sizeof(this->zmm30));
122 std::memcpy(this->
zmm31, other.zmm31,
sizeof(this->zmm31));
123 std::memcpy(this->
mxcsr, other.mxcsr,
sizeof(this->mxcsr));
124 std::memcpy(this->
cr0, other.cr0,
sizeof(this->cr0));
125 std::memcpy(this->
cr1, other.cr1,
sizeof(this->cr1));
126 std::memcpy(this->
cr2, other.cr2,
sizeof(this->cr2));
127 std::memcpy(this->
cr3, other.cr3,
sizeof(this->cr3));
128 std::memcpy(this->
cr4, other.cr4,
sizeof(this->cr4));
129 std::memcpy(this->
cr5, other.cr5,
sizeof(this->cr5));
130 std::memcpy(this->
cr6, other.cr6,
sizeof(this->cr6));
131 std::memcpy(this->
cr7, other.cr7,
sizeof(this->cr7));
132 std::memcpy(this->
cr8, other.cr8,
sizeof(this->cr8));
133 std::memcpy(this->
cr9, other.cr9,
sizeof(this->cr9));
134 std::memcpy(this->
cr10, other.cr10,
sizeof(this->cr10));
135 std::memcpy(this->
cr11, other.cr11,
sizeof(this->cr11));
136 std::memcpy(this->
cr12, other.cr12,
sizeof(this->cr12));
137 std::memcpy(this->
cr13, other.cr13,
sizeof(this->cr13));
138 std::memcpy(this->
cr14, other.cr14,
sizeof(this->cr14));
139 std::memcpy(this->
cr15, other.cr15,
sizeof(this->cr15));
140 std::memcpy(this->
cs, other.cs,
sizeof(this->cs));
141 std::memcpy(this->
ds, other.ds,
sizeof(this->ds));
142 std::memcpy(this->
es, other.es,
sizeof(this->es));
143 std::memcpy(this->
fs, other.fs,
sizeof(this->fs));
144 std::memcpy(this->
gs, other.gs,
sizeof(this->gs));
145 std::memcpy(this->
ss, other.ss,
sizeof(this->ss));
146 std::memcpy(this->
dr0, other.dr0,
sizeof(this->dr0));
147 std::memcpy(this->
dr1, other.dr1,
sizeof(this->dr1));
148 std::memcpy(this->
dr2, other.dr2,
sizeof(this->dr2));
149 std::memcpy(this->
dr3, other.dr3,
sizeof(this->dr3));
150 std::memcpy(this->
dr6, other.dr6,
sizeof(this->dr6));
151 std::memcpy(this->
dr7, other.dr7,
sizeof(this->dr7));
152 std::memcpy(this->
mxcsr_mask, other.mxcsr_mask,
sizeof(this->mxcsr_mask));
153 std::memcpy(this->
fcw, other.fcw,
sizeof(this->fcw));
154 std::memcpy(this->
fsw, other.fsw,
sizeof(this->fsw));
155 std::memcpy(this->
ftw, other.ftw,
sizeof(this->ftw));
156 std::memcpy(this->
fop, other.fop,
sizeof(this->fop));
157 std::memcpy(this->
fip, other.fip,
sizeof(this->fip));
158 std::memcpy(this->
fcs, other.fcs,
sizeof(this->fcs));
159 std::memcpy(this->
fdp, other.fdp,
sizeof(this->fdp));
160 std::memcpy(this->
fds, other.fds,
sizeof(this->fds));
161 std::memcpy(this->
efer, other.efer,
sizeof(this->efer));
162 std::memcpy(this->
tsc, other.tsc,
sizeof(this->tsc));
171 std::memset(this->
rax, 0x00,
sizeof(this->
rax));
172 std::memset(this->
rbx, 0x00,
sizeof(this->
rbx));
173 std::memset(this->
rcx, 0x00,
sizeof(this->
rcx));
174 std::memset(this->
rdx, 0x00,
sizeof(this->
rdx));
175 std::memset(this->
rdi, 0x00,
sizeof(this->
rdi));
176 std::memset(this->
rsi, 0x00,
sizeof(this->
rsi));
177 std::memset(this->
rsp, 0x00,
sizeof(this->
rsp));
178 std::memset(this->
rbp, 0x00,
sizeof(this->
rbp));
179 std::memset(this->
rip, 0x00,
sizeof(this->
rip));
181 std::memset(this->
r8, 0x00,
sizeof(this->
r8));
182 std::memset(this->
r9, 0x00,
sizeof(this->
r9));
183 std::memset(this->
r10, 0x00,
sizeof(this->
r10));
184 std::memset(this->
r11, 0x00,
sizeof(this->
r11));
185 std::memset(this->
r12, 0x00,
sizeof(this->
r12));
186 std::memset(this->
r13, 0x00,
sizeof(this->
r13));
187 std::memset(this->
r14, 0x00,
sizeof(this->
r14));
188 std::memset(this->
r15, 0x00,
sizeof(this->
r15));
189 std::memset(this->
st0, 0x00,
sizeof(this->
st0));
190 std::memset(this->
st1, 0x00,
sizeof(this->
st1));
191 std::memset(this->
st2, 0x00,
sizeof(this->
st2));
192 std::memset(this->
st3, 0x00,
sizeof(this->
st3));
193 std::memset(this->
st4, 0x00,
sizeof(this->
st4));
194 std::memset(this->
st5, 0x00,
sizeof(this->
st5));
195 std::memset(this->
st6, 0x00,
sizeof(this->
st6));
196 std::memset(this->
st7, 0x00,
sizeof(this->
st7));
197 std::memset(this->
zmm0, 0x00,
sizeof(this->
zmm0));
198 std::memset(this->
zmm1, 0x00,
sizeof(this->
zmm1));
199 std::memset(this->
zmm2, 0x00,
sizeof(this->
zmm2));
200 std::memset(this->
zmm3, 0x00,
sizeof(this->
zmm3));
201 std::memset(this->
zmm4, 0x00,
sizeof(this->
zmm4));
202 std::memset(this->
zmm5, 0x00,
sizeof(this->
zmm5));
203 std::memset(this->
zmm6, 0x00,
sizeof(this->
zmm6));
204 std::memset(this->
zmm7, 0x00,
sizeof(this->
zmm7));
205 std::memset(this->
zmm8, 0x00,
sizeof(this->
zmm8));
206 std::memset(this->
zmm9, 0x00,
sizeof(this->
zmm9));
207 std::memset(this->
zmm10, 0x00,
sizeof(this->
zmm10));
208 std::memset(this->
zmm11, 0x00,
sizeof(this->
zmm11));
209 std::memset(this->
zmm12, 0x00,
sizeof(this->
zmm12));
210 std::memset(this->
zmm13, 0x00,
sizeof(this->
zmm13));
211 std::memset(this->
zmm14, 0x00,
sizeof(this->
zmm14));
212 std::memset(this->
zmm15, 0x00,
sizeof(this->
zmm15));
213 std::memset(this->
zmm16, 0x00,
sizeof(this->
zmm16));
214 std::memset(this->
zmm17, 0x00,
sizeof(this->
zmm17));
215 std::memset(this->
zmm18, 0x00,
sizeof(this->
zmm18));
216 std::memset(this->
zmm19, 0x00,
sizeof(this->
zmm19));
217 std::memset(this->
zmm20, 0x00,
sizeof(this->
zmm20));
218 std::memset(this->
zmm21, 0x00,
sizeof(this->
zmm21));
219 std::memset(this->
zmm22, 0x00,
sizeof(this->
zmm22));
220 std::memset(this->
zmm23, 0x00,
sizeof(this->
zmm23));
221 std::memset(this->
zmm24, 0x00,
sizeof(this->
zmm24));
222 std::memset(this->
zmm25, 0x00,
sizeof(this->
zmm25));
223 std::memset(this->
zmm26, 0x00,
sizeof(this->
zmm26));
224 std::memset(this->
zmm27, 0x00,
sizeof(this->
zmm27));
225 std::memset(this->
zmm28, 0x00,
sizeof(this->
zmm28));
226 std::memset(this->
zmm29, 0x00,
sizeof(this->
zmm29));
227 std::memset(this->
zmm30, 0x00,
sizeof(this->
zmm30));
228 std::memset(this->
zmm31, 0x00,
sizeof(this->
zmm31));
229 std::memset(this->
mxcsr, 0x00,
sizeof(this->
mxcsr));
230 std::memset(this->
cr0, 0x00,
sizeof(this->
cr0));
231 std::memset(this->
cr1, 0x00,
sizeof(this->
cr1));
232 std::memset(this->
cr2, 0x00,
sizeof(this->
cr2));
233 std::memset(this->
cr3, 0x00,
sizeof(this->
cr3));
234 std::memset(this->
cr4, 0x00,
sizeof(this->
cr4));
235 std::memset(this->
cr5, 0x00,
sizeof(this->
cr5));
236 std::memset(this->
cr6, 0x00,
sizeof(this->
cr6));
237 std::memset(this->
cr7, 0x00,
sizeof(this->
cr7));
238 std::memset(this->
cr8, 0x00,
sizeof(this->
cr8));
239 std::memset(this->
cr9, 0x00,
sizeof(this->
cr9));
240 std::memset(this->
cr10, 0x00,
sizeof(this->
cr10));
241 std::memset(this->
cr11, 0x00,
sizeof(this->
cr11));
242 std::memset(this->
cr12, 0x00,
sizeof(this->
cr12));
243 std::memset(this->
cr13, 0x00,
sizeof(this->
cr13));
244 std::memset(this->
cr14, 0x00,
sizeof(this->
cr14));
245 std::memset(this->
cr15, 0x00,
sizeof(this->
cr15));
246 std::memset(this->
cs, 0x00,
sizeof(this->
cs));
247 std::memset(this->
ds, 0x00,
sizeof(this->
ds));
248 std::memset(this->
es, 0x00,
sizeof(this->
es));
249 std::memset(this->
fs, 0x00,
sizeof(this->
fs));
250 std::memset(this->
gs, 0x00,
sizeof(this->
gs));
251 std::memset(this->
ss, 0x00,
sizeof(this->
ss));
252 std::memset(this->
dr0, 0x00,
sizeof(this->
dr0));
253 std::memset(this->
dr1, 0x00,
sizeof(this->
dr1));
254 std::memset(this->
dr2, 0x00,
sizeof(this->
dr2));
255 std::memset(this->
dr3, 0x00,
sizeof(this->
dr3));
256 std::memset(this->
dr6, 0x00,
sizeof(this->
dr6));
257 std::memset(this->
dr7, 0x00,
sizeof(this->
dr7));
259 std::memset(this->
fcw, 0x00,
sizeof(this->
fcw));
260 std::memset(this->
fsw, 0x00,
sizeof(this->
fsw));
261 std::memset(this->
ftw, 0x00,
sizeof(this->
ftw));
262 std::memset(this->
fop, 0x00,
sizeof(this->
fop));
263 std::memset(this->
fip, 0x00,
sizeof(this->
fip));
264 std::memset(this->
fcs, 0x00,
sizeof(this->
fcs));
265 std::memset(this->
fdp, 0x00,
sizeof(this->
fdp));
266 std::memset(this->
fds, 0x00,
sizeof(this->
fds));
267 std::memset(this->
efer, 0x00,
sizeof(this->
efer));
268 std::memset(this->
tsc, 0x00,
sizeof(this->
tsc));
284 if (regId >= triton::arch::ID_REG_X86_AC && regId <= triton::arch::ID_REG_X86_ZF) {
return true; }
285 if (regId >= triton::arch::ID_REG_X86_FTW && regId <= triton::arch::ID_REG_X86_FDP) {
return true; }
286 if (regId >= triton::arch::ID_REG_X86_SSE_IE && regId <= triton::arch::ID_REG_X86_SSE_FZ) {
return true; }
287 if (regId >= triton::arch::ID_REG_X86_FCW_IM && regId <= triton::arch::ID_REG_X86_FCW_X) {
return true; }
288 if (regId >= triton::arch::ID_REG_X86_FSW_IE && regId <= triton::arch::ID_REG_X86_FSW_B) {
return true; }
289 if (regId >= triton::arch::ID_REG_X86_EFER_TCE && regId <= triton::arch::ID_REG_X86_EFER_SCE) {
return true; }
297 this->
isGPR(regId) ||
298 this->
isMMX(regId) ||
299 this->
isSTX(regId) ||
300 this->
isSSE(regId) ||
301 this->
isFPU(regId) ||
303 this->
isTSC(regId) ||
319 return ((regId >= triton::arch::ID_REG_X86_RAX && regId <= triton::arch::ID_REG_X86_EFLAGS) ?
true :
false);
324 return ((regId >= triton::arch::ID_REG_X86_MM0 && regId <= triton::arch::ID_REG_X86_MM7) ?
true :
false);
329 return ((regId >= triton::arch::ID_REG_X86_ST0 && regId <= triton::arch::ID_REG_X86_ST7) ?
true :
false);
334 return ((regId >= triton::arch::ID_REG_X86_MXCSR && regId <= triton::arch::ID_REG_X86_XMM15) ?
true :
false);
339 return ((regId >= triton::arch::ID_REG_X86_FTW && regId <= triton::arch::ID_REG_X86_FDP) ?
true :
false);
344 return ((regId == triton::arch::ID_REG_X86_EFER) ?
true :
false);
349 return ((regId == triton::arch::ID_REG_X86_TSC) ?
true :
false);
354 return ((regId >= triton::arch::ID_REG_X86_YMM0 && regId <= triton::arch::ID_REG_X86_YMM15) ?
true :
false);
359 return ((regId >= triton::arch::ID_REG_X86_ZMM0 && regId <= triton::arch::ID_REG_X86_ZMM31) ?
true :
false);
364 return ((regId >= triton::arch::ID_REG_X86_CR0 && regId <= triton::arch::ID_REG_X86_CR15) ?
true :
false);
369 return ((regId >= triton::arch::ID_REG_X86_DR0 && regId <= triton::arch::ID_REG_X86_DR7) ?
true :
false);
374 return ((regId >= triton::arch::ID_REG_X86_CS && regId <= triton::arch::ID_REG_X86_SS) ?
true :
false);
399 std::set<const triton::arch::Register*> ret;
401 for (
const auto& kv: this->
id2reg) {
402 auto regId = kv.first;
403 const auto& reg = kv.second;
406 if (reg.getSize() == this->gprSize())
410 else if (this->
isFlag(regId))
414 else if (this->
isSTX(regId))
418 else if (this->
isSSE(regId))
422 else if (this->
isFPU(regId))
426 else if (this->
isEFER(regId))
430 else if (this->
isTSC(regId))
460 return this->
id2reg.at(
id);
461 }
catch (
const std::out_of_range&) {
468 std::string lower = name;
469 std::transform(lower.begin(), lower.end(), lower.begin(), [](
unsigned char c){ return std::tolower(c); });
472 }
catch (
const std::out_of_range&) {
499 triton::extlibs::capstone::cs_insn* insn;
518 triton::extlibs::capstone::cs_detail* detail = insn->detail;
521 std::stringstream str;
523 str << insn[0].mnemonic;
524 if (detail->x86.op_count)
525 str <<
" " << insn[0].op_str;
543 triton::extlibs::capstone::cs_x86_op* op = &(detail->x86.operands[n]);
546 case triton::extlibs::capstone::X86_OP_IMM:
550 case triton::extlibs::capstone::X86_OP_MEM: {
571 if (base.
getId() == this->pcId)
584 case triton::extlibs::capstone::X86_OP_REG:
594 if (detail->groups_count > 0) {
596 if (detail->groups[n] == triton::extlibs::capstone::X86_GRP_JUMP)
598 if (detail->groups[n] == triton::extlibs::capstone::X86_GRP_JUMP ||
599 detail->groups[n] == triton::extlibs::capstone::X86_GRP_CALL ||
600 detail->groups[n] == triton::extlibs::capstone::X86_GRP_RET)
606 triton::extlibs::capstone::cs_free(insn, count);
614 if (execCallbacks && this->callbacks)
617 auto it = this->
memory.find(addr);
618 if (it == this->
memory.end()) {
631 if (execCallbacks && this->callbacks)
648 std::vector<triton::uint8> area;
651 area.push_back(this->getConcreteMemoryValue(baseAddr+index, execCallbacks));
660 if (execCallbacks && this->callbacks)
663 switch (reg.
getId()) {
751 case triton::arch::ID_REG_X86_ST0: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st0)); }
752 case triton::arch::ID_REG_X86_ST1: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st1)); }
753 case triton::arch::ID_REG_X86_ST2: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st2)); }
754 case triton::arch::ID_REG_X86_ST3: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st3)); }
755 case triton::arch::ID_REG_X86_ST4: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st4)); }
756 case triton::arch::ID_REG_X86_ST5: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st5)); }
757 case triton::arch::ID_REG_X86_ST6: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st6)); }
758 case triton::arch::ID_REG_X86_ST7: {
return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->
st7)); }
760 case triton::arch::ID_REG_X86_XMM0: {
return triton::utils::cast<triton::uint128>(this->
zmm0); }
761 case triton::arch::ID_REG_X86_XMM1: {
return triton::utils::cast<triton::uint128>(this->
zmm1); }
762 case triton::arch::ID_REG_X86_XMM2: {
return triton::utils::cast<triton::uint128>(this->
zmm2); }
763 case triton::arch::ID_REG_X86_XMM3: {
return triton::utils::cast<triton::uint128>(this->
zmm3); }
764 case triton::arch::ID_REG_X86_XMM4: {
return triton::utils::cast<triton::uint128>(this->
zmm4); }
765 case triton::arch::ID_REG_X86_XMM5: {
return triton::utils::cast<triton::uint128>(this->
zmm5); }
766 case triton::arch::ID_REG_X86_XMM6: {
return triton::utils::cast<triton::uint128>(this->
zmm6); }
767 case triton::arch::ID_REG_X86_XMM7: {
return triton::utils::cast<triton::uint128>(this->
zmm7); }
768 case triton::arch::ID_REG_X86_XMM8: {
return triton::utils::cast<triton::uint128>(this->
zmm8); }
769 case triton::arch::ID_REG_X86_XMM9: {
return triton::utils::cast<triton::uint128>(this->
zmm9); }
770 case triton::arch::ID_REG_X86_XMM10: {
return triton::utils::cast<triton::uint128>(this->
zmm10); }
771 case triton::arch::ID_REG_X86_XMM11: {
return triton::utils::cast<triton::uint128>(this->
zmm11); }
772 case triton::arch::ID_REG_X86_XMM12: {
return triton::utils::cast<triton::uint128>(this->
zmm12); }
773 case triton::arch::ID_REG_X86_XMM13: {
return triton::utils::cast<triton::uint128>(this->
zmm13); }
774 case triton::arch::ID_REG_X86_XMM14: {
return triton::utils::cast<triton::uint128>(this->
zmm14); }
775 case triton::arch::ID_REG_X86_XMM15: {
return triton::utils::cast<triton::uint128>(this->
zmm15); }
777 case triton::arch::ID_REG_X86_YMM0: {
return triton::utils::cast<triton::uint256>(this->
zmm0); }
778 case triton::arch::ID_REG_X86_YMM1: {
return triton::utils::cast<triton::uint256>(this->
zmm1); }
779 case triton::arch::ID_REG_X86_YMM2: {
return triton::utils::cast<triton::uint256>(this->
zmm2); }
780 case triton::arch::ID_REG_X86_YMM3: {
return triton::utils::cast<triton::uint256>(this->
zmm3); }
781 case triton::arch::ID_REG_X86_YMM4: {
return triton::utils::cast<triton::uint256>(this->
zmm4); }
782 case triton::arch::ID_REG_X86_YMM5: {
return triton::utils::cast<triton::uint256>(this->
zmm5); }
783 case triton::arch::ID_REG_X86_YMM6: {
return triton::utils::cast<triton::uint256>(this->
zmm6); }
784 case triton::arch::ID_REG_X86_YMM7: {
return triton::utils::cast<triton::uint256>(this->
zmm7); }
785 case triton::arch::ID_REG_X86_YMM8: {
return triton::utils::cast<triton::uint256>(this->
zmm8); }
786 case triton::arch::ID_REG_X86_YMM9: {
return triton::utils::cast<triton::uint256>(this->
zmm9); }
787 case triton::arch::ID_REG_X86_YMM10: {
return triton::utils::cast<triton::uint256>(this->
zmm10); }
788 case triton::arch::ID_REG_X86_YMM11: {
return triton::utils::cast<triton::uint256>(this->
zmm11); }
789 case triton::arch::ID_REG_X86_YMM12: {
return triton::utils::cast<triton::uint256>(this->
zmm12); }
790 case triton::arch::ID_REG_X86_YMM13: {
return triton::utils::cast<triton::uint256>(this->
zmm13); }
791 case triton::arch::ID_REG_X86_YMM14: {
return triton::utils::cast<triton::uint256>(this->
zmm14); }
792 case triton::arch::ID_REG_X86_YMM15: {
return triton::utils::cast<triton::uint256>(this->
zmm15); }
794 case triton::arch::ID_REG_X86_ZMM0: {
return triton::utils::cast<triton::uint512>(this->
zmm0); }
795 case triton::arch::ID_REG_X86_ZMM1: {
return triton::utils::cast<triton::uint512>(this->
zmm1); }
796 case triton::arch::ID_REG_X86_ZMM2: {
return triton::utils::cast<triton::uint512>(this->
zmm2); }
797 case triton::arch::ID_REG_X86_ZMM3: {
return triton::utils::cast<triton::uint512>(this->
zmm3); }
798 case triton::arch::ID_REG_X86_ZMM4: {
return triton::utils::cast<triton::uint512>(this->
zmm4); }
799 case triton::arch::ID_REG_X86_ZMM5: {
return triton::utils::cast<triton::uint512>(this->
zmm5); }
800 case triton::arch::ID_REG_X86_ZMM6: {
return triton::utils::cast<triton::uint512>(this->
zmm6); }
801 case triton::arch::ID_REG_X86_ZMM7: {
return triton::utils::cast<triton::uint512>(this->
zmm7); }
802 case triton::arch::ID_REG_X86_ZMM8: {
return triton::utils::cast<triton::uint512>(this->
zmm8); }
803 case triton::arch::ID_REG_X86_ZMM9: {
return triton::utils::cast<triton::uint512>(this->
zmm9); }
804 case triton::arch::ID_REG_X86_ZMM10: {
return triton::utils::cast<triton::uint512>(this->
zmm10); }
805 case triton::arch::ID_REG_X86_ZMM11: {
return triton::utils::cast<triton::uint512>(this->
zmm11); }
806 case triton::arch::ID_REG_X86_ZMM12: {
return triton::utils::cast<triton::uint512>(this->
zmm12); }
807 case triton::arch::ID_REG_X86_ZMM13: {
return triton::utils::cast<triton::uint512>(this->
zmm13); }
808 case triton::arch::ID_REG_X86_ZMM14: {
return triton::utils::cast<triton::uint512>(this->
zmm14); }
809 case triton::arch::ID_REG_X86_ZMM15: {
return triton::utils::cast<triton::uint512>(this->
zmm15); }
810 case triton::arch::ID_REG_X86_ZMM16: {
return triton::utils::cast<triton::uint512>(this->
zmm16); }
811 case triton::arch::ID_REG_X86_ZMM17: {
return triton::utils::cast<triton::uint512>(this->
zmm17); }
812 case triton::arch::ID_REG_X86_ZMM18: {
return triton::utils::cast<triton::uint512>(this->
zmm18); }
813 case triton::arch::ID_REG_X86_ZMM19: {
return triton::utils::cast<triton::uint512>(this->
zmm19); }
814 case triton::arch::ID_REG_X86_ZMM20: {
return triton::utils::cast<triton::uint512>(this->
zmm20); }
815 case triton::arch::ID_REG_X86_ZMM21: {
return triton::utils::cast<triton::uint512>(this->
zmm21); }
816 case triton::arch::ID_REG_X86_ZMM22: {
return triton::utils::cast<triton::uint512>(this->
zmm22); }
817 case triton::arch::ID_REG_X86_ZMM23: {
return triton::utils::cast<triton::uint512>(this->
zmm23); }
818 case triton::arch::ID_REG_X86_ZMM24: {
return triton::utils::cast<triton::uint512>(this->
zmm24); }
819 case triton::arch::ID_REG_X86_ZMM25: {
return triton::utils::cast<triton::uint512>(this->
zmm25); }
820 case triton::arch::ID_REG_X86_ZMM26: {
return triton::utils::cast<triton::uint512>(this->
zmm26); }
821 case triton::arch::ID_REG_X86_ZMM27: {
return triton::utils::cast<triton::uint512>(this->
zmm27); }
822 case triton::arch::ID_REG_X86_ZMM28: {
return triton::utils::cast<triton::uint512>(this->
zmm28); }
823 case triton::arch::ID_REG_X86_ZMM29: {
return triton::utils::cast<triton::uint512>(this->
zmm29); }
824 case triton::arch::ID_REG_X86_ZMM30: {
return triton::utils::cast<triton::uint512>(this->
zmm30); }
825 case triton::arch::ID_REG_X86_ZMM31: {
return triton::utils::cast<triton::uint512>(this->
zmm31); }
950 if (execCallbacks && this->callbacks)
952 this->
memory[addr] = value;
962 throw triton::exceptions::Register(
"x8664Cpu::setConcreteMemoryValue(): You cannot set this concrete value (too big) to this memory access.");
967 if (execCallbacks && this->callbacks)
979 this->
memory.reserve(values.size() + this->memory.size());
980 for (
triton::usize index = 0; index < values.size(); index++) {
997 throw triton::exceptions::Register(
"x8664Cpu::setConcreteRegisterValue(): You cannot set this concrete value (too big) to this register.");
999 if (execCallbacks && this->callbacks)
1002 switch (reg.
getId()) {
1046 case triton::arch::ID_REG_X86_EFLAGS: {
1052 case triton::arch::ID_REG_X86_CF: {
1055 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1060 case triton::arch::ID_REG_X86_PF: {
1063 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1068 case triton::arch::ID_REG_X86_AF: {
1071 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1076 case triton::arch::ID_REG_X86_ZF: {
1079 flag = !value.is_zero() ? (flag | (1 << 6)) : (flag & ~(1 << 6));
1084 case triton::arch::ID_REG_X86_SF: {
1087 flag = !value.is_zero() ? (flag | (1 << 7)) : (flag & ~(1 << 7));
1092 case triton::arch::ID_REG_X86_TF: {
1095 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1100 case triton::arch::ID_REG_X86_IF: {
1103 flag = !value.is_zero() ? (flag | (1 << 9)) : (flag & ~(1 << 9));
1108 case triton::arch::ID_REG_X86_DF: {
1111 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1116 case triton::arch::ID_REG_X86_OF: {
1119 flag = !value.is_zero() ? (flag | (1 << 11)) : (flag & ~(1 << 11));
1124 case triton::arch::ID_REG_X86_NT: {
1127 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1132 case triton::arch::ID_REG_X86_RF: {
1135 flag = !value.is_zero() ? (flag | (1 << 16)) : (flag & ~(1 << 16));
1140 case triton::arch::ID_REG_X86_VM: {
1143 flag = !value.is_zero() ? (flag | (1 << 17)) : (flag & ~(1 << 17));
1148 case triton::arch::ID_REG_X86_AC: {
1151 flag = !value.is_zero() ? (flag | (1 << 18)) : (flag & ~(1 << 18));
1156 case triton::arch::ID_REG_X86_VIF: {
1159 flag = !value.is_zero() ? (flag | (1 << 19)) : (flag & ~(1 << 19));
1164 case triton::arch::ID_REG_X86_VIP: {
1167 flag = !value.is_zero() ? (flag | (1 << 20)) : (flag & ~(1 << 20));
1172 case triton::arch::ID_REG_X86_ID: {
1175 flag = !value.is_zero() ? (flag | (1 << 21)) : (flag & ~(1 << 21));
1298 case triton::arch::ID_REG_X86_MXCSR: {
1304 case triton::arch::ID_REG_X86_MXCSR_MASK: {
1310 case triton::arch::ID_REG_X86_SSE_IE: {
1313 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1318 case triton::arch::ID_REG_X86_SSE_DE: {
1321 flag = !value.is_zero() ? (flag | (1 << 1)) : (flag & ~(1 << 1));
1326 case triton::arch::ID_REG_X86_SSE_ZE: {
1329 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1334 case triton::arch::ID_REG_X86_SSE_OE: {
1337 flag = !value.is_zero() ? (flag | (1 << 3)) : (flag & ~(1 << 3));
1342 case triton::arch::ID_REG_X86_SSE_UE: {
1345 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1350 case triton::arch::ID_REG_X86_SSE_PE: {
1353 flag = !value.is_zero() ? (flag | (1 << 5)) : (flag & ~(1 << 5));
1358 case triton::arch::ID_REG_X86_SSE_DAZ: {
1361 flag = !value.is_zero() ? (flag | (1 << 6)) : (flag & ~(1 << 6));
1366 case triton::arch::ID_REG_X86_SSE_IM: {
1369 flag = !value.is_zero() ? (flag | (1 << 7)) : (flag & ~(1 << 7));
1374 case triton::arch::ID_REG_X86_SSE_DM: {
1377 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1382 case triton::arch::ID_REG_X86_SSE_ZM: {
1385 flag = !value.is_zero() ? (flag | (1 << 9)) : (flag & ~(1 << 9));
1390 case triton::arch::ID_REG_X86_SSE_OM: {
1393 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1398 case triton::arch::ID_REG_X86_SSE_UM: {
1401 flag = !value.is_zero() ? (flag | (1 << 11)) : (flag & ~(1 << 11));
1406 case triton::arch::ID_REG_X86_SSE_PM: {
1409 flag = !value.is_zero() ? (flag | (1 << 12)) : (flag & ~(1 << 12));
1414 case triton::arch::ID_REG_X86_SSE_RL: {
1417 flag = !value.is_zero() ? (flag | (1 << 13)) : (flag & ~(1 << 13));
1422 case triton::arch::ID_REG_X86_SSE_RH: {
1425 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1430 case triton::arch::ID_REG_X86_SSE_FZ: {
1433 flag = !value.is_zero() ? (flag | (1 << 15)) : (flag & ~(1 << 15));
1438 case triton::arch::ID_REG_X86_FIP: {
1444 case triton::arch::ID_REG_X86_FDP: {
1450 case triton::arch::ID_REG_X86_FCW: {
1456 case triton::arch::ID_REG_X86_FSW: {
1462 case triton::arch::ID_REG_X86_FOP: {
1468 case triton::arch::ID_REG_X86_FCS: {
1474 case triton::arch::ID_REG_X86_FDS: {
1480 case triton::arch::ID_REG_X86_FTW: {
1486 case triton::arch::ID_REG_X86_FCW_IM: {
1489 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1494 case triton::arch::ID_REG_X86_FCW_DM: {
1497 flag = !value.is_zero() ? (flag | (1 << 1)) : (flag & ~(1 << 1));
1502 case triton::arch::ID_REG_X86_FCW_ZM: {
1505 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1510 case triton::arch::ID_REG_X86_FCW_OM: {
1513 flag = !value.is_zero() ? (flag | (1 << 3)) : (flag & ~(1 << 3));
1518 case triton::arch::ID_REG_X86_FCW_UM: {
1521 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1526 case triton::arch::ID_REG_X86_FCW_PM: {
1529 flag = !value.is_zero() ? (flag | (1 << 5)) : (flag & ~(1 << 5));
1534 case triton::arch::ID_REG_X86_FCW_PC: {
1537 flag = (flag & 0xFCFF) | (
static_cast<triton::uint16>(value) << 8);
1542 case triton::arch::ID_REG_X86_FCW_RC: {
1545 flag = (flag & 0xF3FF) | (
static_cast<triton::uint16>(value) << 10);
1550 case triton::arch::ID_REG_X86_FCW_X: {
1553 flag = !value.is_zero() ? (flag | (1 << 12)) : (flag & ~(1 << 12));
1558 case triton::arch::ID_REG_X86_FSW_IE: {
1561 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1566 case triton::arch::ID_REG_X86_FSW_DE: {
1569 flag = !value.is_zero() ? (flag | (1 << 1)) : (flag & ~(1 << 1));
1574 case triton::arch::ID_REG_X86_FSW_ZE: {
1577 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1582 case triton::arch::ID_REG_X86_FSW_OE: {
1585 flag = !value.is_zero() ? (flag | (1 << 3)) : (flag & ~(1 << 3));
1590 case triton::arch::ID_REG_X86_FSW_UE: {
1593 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1598 case triton::arch::ID_REG_X86_FSW_PE: {
1601 flag = !value.is_zero() ? (flag | (1 << 5)) : (flag & ~(1 << 5));
1606 case triton::arch::ID_REG_X86_FSW_SF: {
1609 flag = !value.is_zero() ? (flag | (1 << 6)) : (flag & ~(1 << 6));
1614 case triton::arch::ID_REG_X86_FSW_ES: {
1617 flag = !value.is_zero() ? (flag | (1 << 7)) : (flag & ~(1 << 7));
1622 case triton::arch::ID_REG_X86_FSW_C0: {
1625 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1630 case triton::arch::ID_REG_X86_FSW_C1: {
1633 flag = !value.is_zero() ? (flag | (1 << 9)) : (flag & ~(1 << 9));
1638 case triton::arch::ID_REG_X86_FSW_C2: {
1641 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1646 case triton::arch::ID_REG_X86_FSW_TOP: {
1649 flag = (flag & 0xC7FF) | (
static_cast<triton::uint16>(value) << 11);
1654 case triton::arch::ID_REG_X86_FSW_C3: {
1657 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1662 case triton::arch::ID_REG_X86_FSW_B: {
1665 flag = !value.is_zero() ? (flag | (1 << 15)) : (flag & ~(1 << 15));
1670 case triton::arch::ID_REG_X86_EFER: {
1676 case triton::arch::ID_REG_X86_EFER_SCE: {
1679 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1684 case triton::arch::ID_REG_X86_EFER_LME: {
1687 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1692 case triton::arch::ID_REG_X86_EFER_LMA: {
1695 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1700 case triton::arch::ID_REG_X86_EFER_NXE: {
1703 flag = !value.is_zero() ? (flag | (1 << 11)) : (flag & ~(1 << 11));
1708 case triton::arch::ID_REG_X86_EFER_SVME: {
1711 flag = !value.is_zero() ? (flag | (1 << 12)) : (flag & ~(1 << 12));
1716 case triton::arch::ID_REG_X86_EFER_LMSLE: {
1719 flag = !value.is_zero() ? (flag | (1 << 13)) : (flag & ~(1 << 13));
1724 case triton::arch::ID_REG_X86_EFER_FFXSR: {
1727 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1732 case triton::arch::ID_REG_X86_EFER_TCE: {
1735 flag = !value.is_zero() ? (flag | (1 << 15)) : (flag & ~(1 << 15));
1808 if (this->
memory.find(baseAddr + index) == this->memory.end()) {
1823 if (this->
memory.find(baseAddr + index) != this->memory.end()) {
1824 this->
memory.erase(baseAddr + index);
TRITON_EXPORT triton::uint512 getMaxValue(void) const
Returns the max possible value of the bitvector.
TRITON_EXPORT void setBits(triton::uint32 high, triton::uint32 low)
Sets the bits (high, low) position.
This class is used to represent an instruction.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size of the instruction.
TRITON_EXPORT void setDisassembly(const std::string &str)
Sets the disassembly of the instruction.
TRITON_EXPORT const triton::uint8 * getOpcode(void) const
Returns the opcode of the instruction.
TRITON_EXPORT void setType(triton::uint32 type)
Sets the type of the instruction.
TRITON_EXPORT void setPrefix(triton::arch::x86::prefix_e prefix)
Sets the prefix of the instruction (mainly for X86).
TRITON_EXPORT void setAddress(triton::uint64 addr)
Sets the address of the instruction.
TRITON_EXPORT void setArchitecture(triton::arch::architecture_e arch)
Sets the instruction's architecture.
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the instruction.
TRITON_EXPORT void setBranch(bool flag)
Sets flag to define this instruction as branch or not.
TRITON_EXPORT void setSize(triton::uint32 size)
Sets the size of the instruction.
std::vector< triton::arch::OperandWrapper > operands
A list of operands.
TRITON_EXPORT void setControlFlow(bool flag)
Sets flag to define this instruction changes the control flow or not.
TRITON_EXPORT triton::uint64 getNextAddress(void) const
Returns the next address of the instruction.
This class is used to represent a memory access.
TRITON_EXPORT void setDisplacement(const triton::arch::Immediate &displacement)
LEA - Sets the displacement operand.
TRITON_EXPORT void setScale(const triton::arch::Immediate &scale)
LEA - Sets the scale operand.
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the memory.
TRITON_EXPORT void setPcRelative(triton::uint64 addr)
LEA - Sets pc relative.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the memory vector.
TRITON_EXPORT void setIndexRegister(const triton::arch::Register &index)
LEA - Sets the index register operand.
TRITON_EXPORT void setSegmentRegister(const triton::arch::Register &segment)
LEA - Sets the segment register operand.
TRITON_EXPORT void setBaseRegister(const triton::arch::Register &base)
LEA - Sets the base register operand.
This class is used as operand wrapper.
This class is used when an instruction has a register operand.
TRITON_EXPORT triton::arch::register_e getParent(void) const
Returns the parent id of the register.
TRITON_EXPORT triton::arch::register_e getId(void) const
Returns the id of the register.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the register.
This class is used to describe the x86 (64-bits) spec.
triton::uint8 gs[triton::size::qword]
Concrete value of GS.
triton::uint8 zmm0[triton::size::dqqword]
Concrete value of zmm0.
TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const
Returns true if the register ID is a register.
triton::uint8 zmm18[triton::size::dqqword]
Concrete value of zmm18.
triton::uint8 cr12[triton::size::qword]
Concrete value of cr12.
triton::uint8 rax[triton::size::qword]
Concrete value of rax.
TRITON_EXPORT x8664Cpu & operator=(const x8664Cpu &other)
Copies a x8664Cpu class.
triton::uint8 dr7[triton::size::qword]
Condete value of dr7.
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
triton::uint8 st4[triton::size::fword]
Concrete value of st4.
TRITON_EXPORT void setMemoryExclusiveTag(const triton::arch::MemoryAccess &mem, bool tag)
Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
triton::uint8 zmm30[triton::size::dqqword]
Concrete value of zmm30.
triton::uint8 es[triton::size::qword]
Concrete value of ES.
triton::uint8 zmm10[triton::size::dqqword]
Concrete value of zmm10.
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register ®, bool execCallbacks=true) const
Returns the concrete value of a register.
triton::uint8 r10[triton::size::qword]
Concrete value of r10.
triton::uint8 zmm12[triton::size::dqqword]
Concrete value of zmm12.
triton::uint8 cr1[triton::size::qword]
Concrete value of cr1.
triton::uint8 st1[triton::size::fword]
Concrete value of st1.
triton::uint8 zmm21[triton::size::dqqword]
Concrete value of zmm21.
triton::uint8 r12[triton::size::qword]
Concrete value of r12.
triton::uint8 cr10[triton::size::qword]
Concrete value of cr10.
triton::uint8 eflags[triton::size::qword]
Concrete value of eflags.
TRITON_EXPORT const triton::arch::Register & getProgramCounter(void) const
Returns the program counter register.
TRITON_EXPORT bool isMemoryExclusive(const triton::arch::MemoryAccess &mem) const
Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
triton::uint8 zmm5[triton::size::dqqword]
Concrete value of zmm5.
TRITON_EXPORT x8664Cpu(triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
triton::uint8 cr7[triton::size::qword]
Concrete value of cr7.
triton::uint8 zmm7[triton::size::dqqword]
Concrete value of zmm7.
TRITON_EXPORT triton::uint512 getConcreteMemoryValue(const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const
Returns the concrete value of memory cells.
triton::uint8 zmm9[triton::size::dqqword]
Concrete value of zmm9.
triton::uint8 zmm2[triton::size::dqqword]
Concrete value of zmm2.
triton::uint8 dr1[triton::size::qword]
Condete value of dr1.
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > memory
map of address -> concrete value
triton::uint8 zmm27[triton::size::dqqword]
Concrete value of zmm27.
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters(void) const
Returns all registers.
triton::uint8 mxcsr_mask[triton::size::dword]
Concrete value of the SSE Register State Mask.
triton::uint8 rip[triton::size::qword]
Concrete value of rip.
triton::uint8 zmm16[triton::size::dqqword]
Concrete value of zmm16.
TRITON_EXPORT bool isAVX256(triton::arch::register_e regId) const
Returns true if regId is a AVX-256 (YMM) register.
TRITON_EXPORT bool isEFER(triton::arch::register_e regId) const
Returns true if regId is an EFER register.
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters(void) const
Returns all parent registers.
triton::uint8 zmm20[triton::size::dqqword]
Concrete value of zmm20.
TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory area.
TRITON_EXPORT bool isMMX(triton::arch::register_e regId) const
Returns true if regId is a MMX register.
triton::uint8 dr6[triton::size::qword]
Condete value of dr6.
triton::uint8 cr13[triton::size::qword]
Concrete value of cr13.
TRITON_EXPORT std::vector< triton::uint8 > getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
Returns the concrete value of a memory area.
triton::uint8 fdp[triton::size::qword]
Concrete value of the x87 FPU Instruction Operand Pointer Offset.
TRITON_EXPORT triton::uint32 gprSize(void) const
Returns the bit in byte of the General Purpose Registers.
triton::uint8 cr14[triton::size::qword]
Concrete value of cr14.
triton::uint8 st5[triton::size::fword]
Concrete value of st5.
triton::uint8 zmm6[triton::size::dqqword]
Concrete value of zmm6.
triton::uint8 cr2[triton::size::qword]
Concrete value of cr2.
triton::uint8 cr11[triton::size::qword]
Concrete value of cr11.
triton::uint8 cr4[triton::size::qword]
Concrete value of cr4.
TRITON_EXPORT bool isSSE(triton::arch::register_e regId) const
Returns true if regId is a SSE register.
triton::uint8 cr8[triton::size::qword]
Concrete value of cr8.
triton::uint8 dr0[triton::size::qword]
Concrete value of dr0.
triton::uint8 zmm13[triton::size::dqqword]
Concrete value of zmm13.
triton::uint8 cr9[triton::size::qword]
Concrete value of cr9.
triton::uint8 st7[triton::size::fword]
Concrete value of st7.
triton::uint8 fcw[triton::size::word]
Concrete value of the x87 FPU Control Word.
triton::uint8 zmm8[triton::size::dqqword]
Concrete value of zmm8.
triton::uint8 efer[triton::size::qword]
Concrete value of the EFER MSR Register.
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register ®, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
triton::uint8 zmm22[triton::size::dqqword]
Concrete value of zmm22.
triton::uint8 ss[triton::size::qword]
Concrete value of SS.
triton::uint8 r9[triton::size::qword]
Concrete value of r9.
triton::uint8 rdx[triton::size::qword]
Concrete value of rdx.
triton::uint8 mxcsr[triton::size::dword]
Concrete value of the SSE Register State.
triton::uint8 cr0[triton::size::qword]
Concrete value of cr0.
triton::uint8 r15[triton::size::qword]
Concrete value of r15.
triton::uint8 dr3[triton::size::qword]
Condete value of dr3.
triton::uint8 rsi[triton::size::qword]
Concrete value of rsi.
TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess &mem) const
Returns true if memory cells have a defined concrete value.
triton::uint8 fs[triton::size::qword]
Concrete value of FS.
triton::uint8 r11[triton::size::qword]
Concrete value of r11.
TRITON_EXPORT bool isControl(triton::arch::register_e regId) const
Returns true if regId is a control (cr) register.
triton::uint8 cr5[triton::size::qword]
Concrete value of cr5.
TRITON_EXPORT bool isAVX512(triton::arch::register_e regId) const
Returns true if regId is a AVX-512 (ZMM) register.
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
triton::uint8 fcs[triton::size::word]
Concrete value of the x87 FPU Instruction Pointer Selector.
triton::uint8 fop[triton::size::word]
Concrete value of the x87 FPU Opcode.
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
triton::uint8 zmm29[triton::size::dqqword]
Concrete value of zmm29.
TRITON_EXPORT void disassembly(triton::arch::Instruction &inst)
Disassembles the instruction according to the architecture.
triton::uint8 zmm31[triton::size::dqqword]
Concrete value of zmm31.
triton::uint8 rbx[triton::size::qword]
Concrete value of rbx.
triton::uint8 zmm4[triton::size::dqqword]
Concrete value of zmm4.
TRITON_EXPORT bool isSegment(triton::arch::register_e regId) const
Returns true if regId is a Segment.
triton::uint8 zmm3[triton::size::dqqword]
Concrete value of zmm3.
triton::uint8 fds[triton::size::word]
Concrete value of the x87 FPU Instruction Operand Pointer Selector.
TRITON_EXPORT const triton::arch::Register & getParentRegister(const triton::arch::Register ®) const
Returns parent register from a given one.
triton::uint8 zmm14[triton::size::dqqword]
Concrete value of zmm14.
triton::uint8 r8[triton::size::qword]
Concrete value of r8.
triton::uint8 rdi[triton::size::qword]
Concrete value of rdi.
TRITON_EXPORT bool isGPR(triton::arch::register_e regId) const
Returns true if regId is a GRP.
TRITON_EXPORT const triton::arch::Register & getStackPointer(void) const
Returns the stack pointer register.
triton::uint8 st0[triton::size::fword]
Concrete value of st0.
triton::uint8 zmm24[triton::size::dqqword]
Concrete value of zmm24.
virtual TRITON_EXPORT ~x8664Cpu()
Destructor.
TRITON_EXPORT bool isThumb(void) const
Returns true if the execution mode is Thumb. Only useful for Arm32.
triton::uint8 r14[triton::size::qword]
Concrete value of r14.
triton::uint8 tsc[triton::size::qword]
Concrete value of the TSC Register.
triton::uint8 cr3[triton::size::qword]
Concrete value of cr3.
triton::uint8 zmm1[triton::size::dqqword]
Concrete value of zmm1.
triton::uint8 zmm28[triton::size::dqqword]
Concrete value of zmm28.
triton::uint8 ds[triton::size::qword]
Concrete value of DS.
TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess &mem)
Clears concrete values assigned to the memory cells.
triton::uint8 zmm23[triton::size::dqqword]
Concrete value of zmm23.
triton::uint8 st6[triton::size::fword]
Concrete value of st6.
triton::uint8 zmm19[triton::size::dqqword]
Concrete value of zmm19.
triton::uint8 rbp[triton::size::qword]
Concrete value of rbp.
triton::uint8 zmm11[triton::size::dqqword]
Concrete value of zmm11.
TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const
Returns the kind of endianness as triton::arch::endianness_e.
triton::uint8 rcx[triton::size::qword]
Concrete value of rcx.
TRITON_EXPORT void setConcreteMemoryValue(const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of memory cells.
triton::uint8 st3[triton::size::fword]
Concrete value of st3.
triton::uint8 fsw[triton::size::word]
Concrete value of the x87 FPU Status Word.
triton::uint8 r13[triton::size::qword]
Concrete value of r13.
triton::uint8 cr6[triton::size::qword]
Concrete value of cr6.
triton::uint8 dr2[triton::size::qword]
Condete value of dr2.
TRITON_EXPORT bool isFPU(triton::arch::register_e regId) const
Returns true if regId is a FPU register.
triton::uint8 cr15[triton::size::qword]
Concrete value of cr15.
TRITON_EXPORT void setThumb(bool state)
Sets CPU state to Thumb mode.
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is valid.
TRITON_EXPORT void clear(void)
Clears the architecture states (registers and memory).
triton::uint8 fip[triton::size::qword]
Concrete value of the x87 FPU Instruction Pointer Offset.
triton::uint8 zmm26[triton::size::dqqword]
Concrete value of zmm26.
triton::uint8 rsp[triton::size::qword]
Concrete value of rsp.
TRITON_EXPORT bool isSTX(triton::arch::register_e regId) const
Returns true if regId is a STX register.
triton::uint8 zmm25[triton::size::dqqword]
Concrete value of zmm25.
triton::uint8 st2[triton::size::fword]
Concrete value of st2.
triton::uint8 zmm15[triton::size::dqqword]
Concrete value of zmm15.
triton::uint8 ftw[triton::size::word]
Concrete value of the x87 FPU Tag Word.
TRITON_EXPORT bool isTSC(triton::arch::register_e regId) const
Returns true if regId is an TSC register.
triton::uint8 zmm17[triton::size::dqqword]
Concrete value of zmm17.
TRITON_EXPORT bool isDebug(triton::arch::register_e regId) const
Returns true if regId is a debug (dr) register.
triton::uint8 cs[triton::size::qword]
Concrete value of CS.
The x86Specifications class defines specifications about the x86 and x86_64 CPU.
TRITON_EXPORT triton::arch::register_e capstoneRegisterToTritonRegister(triton::uint32 id) const
Converts a capstone's register id to a triton's register id.
std::unordered_map< triton::arch::register_e, const triton::arch::Register > id2reg
List of registers specification available for this architecture.
TRITON_EXPORT triton::arch::x86::prefix_e capstonePrefixToTritonPrefix(triton::uint32 id) const
Converts a capstone's prefix id to a triton's prefix id.
TRITON_EXPORT triton::uint32 capstoneInstructionToTritonInstruction(triton::uint32 id) const
Converts a capstone's instruction id to a triton's instruction id.
TRITON_EXPORT triton::ast::SharedAbstractNode processCallbacks(triton::callbacks::callback_e kind, triton::ast::SharedAbstractNode node)
Processes callbacks according to the kind and the C++ polymorphism.
The exception class used by all CPUs.
The exception class used by the disassembler.
The exception class used by register operands.
register_e
Types of register.
@ ID_REG_LAST_ITEM
must be the last item
constexpr triton::uint32 byte
byte size in bit
constexpr triton::uint32 qword
qword size in bit
@ GET_CONCRETE_REGISTER_VALUE
@ GET_CONCRETE_MEMORY_VALUE
@ SET_CONCRETE_MEMORY_VALUE
@ SET_CONCRETE_REGISTER_VALUE
constexpr triton::uint32 dword
dword size in byte
constexpr triton::uint32 dqqword
dqqword size in byte
constexpr triton::uint32 word
word size in byte
constexpr triton::uint32 byte
byte size in byte
constexpr triton::uint32 qword
qword size in byte
std::int32_t sint32
signed 32-bits
std::uint16_t uint16
unisgned 16-bits
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
std::uint64_t uint64
unisgned 64-bits
std::uint32_t uint32
unisgned 32-bits
std::uint8_t uint8
unisgned 8-bits
TRITON_EXPORT void fromUintToBuffer(triton::uint80 value, triton::uint8 *buffer)
Inject the value into the buffer. Make sure that the buffer contains at least 10 allocated bytes.