libTriton version 1.0 build 1592
Loading...
Searching...
No Matches
Classes | Namespaces | Macros
riscv32Cpu.hpp File Reference
#include <set>
#include <string>
#include <unordered_map>
#include <vector>
#include <triton/archEnums.hpp>
#include <triton/callbacks.hpp>
#include <triton/cpuInterface.hpp>
#include <triton/dllexport.hpp>
#include <triton/instruction.hpp>
#include <triton/memoryAccess.hpp>
#include <triton/register.hpp>
#include <triton/tritonTypes.hpp>
#include <triton/riscvSpecifications.hpp>
#include "triton/riscv32.spec"
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes

class  triton::arch::riscv::riscv32Cpu
 This class is used to describe the RV32 spec. More...
 

Namespaces

namespace  triton
 The Triton namespace.
 
namespace  triton::arch
 The Architecture namespace.
 
namespace  triton::arch::riscv
 The riscv namespace.
 

Macros

#define SYS_REG_SPEC(_, LOWER_NAME, _2, _3, _4, _5, _6)    triton::uint8 LOWER_NAME[triton::size::qword];
 System registers.
 
#define REG_SPEC(_1, _2, _3, _4, _5, _6, _7)
 
#define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6, _7)
 

Macro Definition Documentation

◆ REG_SPEC

#define REG_SPEC ( _1,
_2,
_3,
_4,
_5,
_6,
_7 )

Definition at line 215 of file riscv32Cpu.hpp.

◆ REG_SPEC_NO_CAPSTONE

#define REG_SPEC_NO_CAPSTONE ( _1,
_2,
_3,
_4,
_5,
_6,
_7 )

Definition at line 216 of file riscv32Cpu.hpp.

◆ SYS_REG_SPEC

#define SYS_REG_SPEC ( _,
LOWER_NAME,
_2,
_3,
_4,
_5,
_6 )    triton::uint8 LOWER_NAME[triton::size::qword];

System registers.

Definition at line 213 of file riscv32Cpu.hpp.