32 if (architecture ==
nullptr) {
36 this->architecture = architecture;
37 this->callbacks = callbacks;
50 astCtxt(other.astCtxt),
54 this->architecture = other.architecture;
55 this->callbacks = other.callbacks;
80 this->architecture = other.architecture;
81 this->astCtxt = other.astCtxt;
82 this->callbacks = other.callbacks;
84 this->modes = other.modes;
140 if (this->isArrayMode() && array) {
142 auto cell = this->astCtxt->store(this->astCtxt->reference(this->getMemoryArray()), addr, this->astCtxt->bv(cv,
triton::bitsize::byte));
169 if (this->
alignedBitvectorMemory.find(std::make_pair(address, size)) != this->alignedBitvectorMemory.end()) {
178 this->removeAlignedMemory(address, size);
197 if (this->isArrayMode())
242 if (
auto node = it->second.lock()) {
260 if (
auto symVar = sv.second.lock()) {
261 if (symVar->getName() == name || symVar->getAlias() == name) {
273 std::map<triton::usize, SharedSymbolicVariable> ret;
274 std::vector<triton::usize> toRemove;
277 if (
auto sp = kv.second.lock()) {
280 toRemove.push_back(kv.first);
343 return node->evaluate();
349 std::vector<triton::uint8> area;
384 if (this->isArrayMode() && this->
memoryArray ==
nullptr) {
401 auto n = node->getChildren()[1];
405 node->setChild(1, this->astCtxt->reference(e));
418 if (expr ==
nullptr) {
433 const auto& mem = expr->getOriginMemory();
439 const auto& reg = expr->getOriginRegister();
456 if (
auto sp = it->second.lock()) {
468 std::unordered_map<triton::usize, SharedSymbolicExpression> ret;
469 std::vector<triton::usize> toRemove;
472 if (
auto sp = kv.second.lock()) {
475 toRemove.push_back(kv.first);
479 for (
auto id : toRemove)
488 std::unordered_map<triton::usize, SharedSymbolicExpression> exprs;
490 if (expr ==
nullptr) {
494 exprs[expr->getId()] = expr;
497 for (
auto&& n : worklist) {
500 auto eid = expr->getId();
511 std::vector<SharedSymbolicExpression> taintedExprs;
512 std::vector<triton::usize> invalidSymExpr;
515 if (
auto sp = it->second.lock()) {
517 taintedExprs.push_back(sp);
520 invalidSymExpr.push_back(it->first);
524 for (
auto id : invalidSymExpr) {
534 std::unordered_map<triton::arch::register_e, SharedSymbolicExpression> ret;
564 if (expression->getAst()) {
568 expression->setAst(tmp);
598 if (this->isAlignedMode() && this->isArrayMode() ==
false) {
600 aligned->setOriginMemory(mem);
601 this->addAlignedMemory(memAddr, symVarSize, aligned);
614 if (this->isArrayMode()) {
615 const auto& cell = this->astCtxt->store(this->astCtxt->reference(this->getMemoryArray()), memAddr + index, tmp);
618 this->addBitvectorMemory(memAddr + index, this->
memoryArray);
624 this->addBitvectorMemory(memAddr + index, se);
667 if (symVar ==
nullptr) {
706 return this->astCtxt->bvashr(node, this->astCtxt->bv(imm, node->getBitvectorSize()));
709 return this->astCtxt->bvshl(node, this->astCtxt->bv(imm, node->getBitvectorSize()));
712 return this->astCtxt->bvlshr(node, this->astCtxt->bv(imm, node->getBitvectorSize()));
715 return this->astCtxt->bvror(node, this->astCtxt->bv(imm, node->getBitvectorSize()));
718 return this->astCtxt->extract(
719 node->getBitvectorSize(),
721 this->astCtxt->bvror(
722 this->astCtxt->concat(
724 this->getRegisterAst(this->architecture->getRegister(triton::arch::ID_REG_ARM32_C))
731 return this->astCtxt->bvashr(
734 this->architecture->getRegister(reg).getBitSize() - 8,
735 this->astCtxt->extract(
738 this->getRegisterAst(this->architecture->getRegister(reg))
744 return this->astCtxt->bvshl(
747 this->architecture->getRegister(reg).getBitSize() - 8,
748 this->astCtxt->extract(
751 this->getRegisterAst(this->architecture->getRegister(reg))
757 return this->astCtxt->bvlshr(
760 this->architecture->getRegister(reg).getBitSize() - 8,
761 this->astCtxt->extract(
764 this->getRegisterAst(this->architecture->getRegister(reg))
770 return this->astCtxt->bvror(
773 this->architecture->getRegister(reg).getBitSize() - 8,
774 this->astCtxt->extract(
777 this->getRegisterAst(this->architecture->getRegister(reg))
797 auto high = low + vas_size - 1;
799 return this->astCtxt->extract(high, low, node);
808 return this->astCtxt->zx(size, this->astCtxt->bvshl(this->astCtxt->extract(7, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 8)));
811 return this->astCtxt->zx(size, this->astCtxt->bvshl(this->astCtxt->extract(15, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 16)));
814 return this->astCtxt->zx(size, this->astCtxt->bvshl(this->astCtxt->extract(31, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 32)));
817 return this->astCtxt->zx(size, this->astCtxt->bvshl(this->astCtxt->extract(63, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 64)));
820 return this->astCtxt->sx(size, this->astCtxt->bvshl(this->astCtxt->extract(7, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 8)));
823 return this->astCtxt->sx(size, this->astCtxt->bvshl(this->astCtxt->extract(15, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 16)));
826 return this->astCtxt->sx(size, this->astCtxt->bvshl(this->astCtxt->extract(31, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 32)));
829 return this->astCtxt->sx(size, this->astCtxt->bvshl(this->astCtxt->extract(63, 0, node), this->astCtxt->bv(extend.
getShiftImmediate(), 64)));
860 std::vector<triton::ast::SharedAbstractNode> cells;
875 if (this->isArrayMode() ==
false && this->isAlignedMode() && this->isAlignedMemory(address, size)) {
876 return this->getAlignedMemory(address, size)->getAst();
882 if (this->isArrayMode()) {
883 auto gpr_size = this->architecture->
gprBitSize();
884 auto memor_ea = mem.
getLeaAst() !=
nullptr ? mem.
getLeaAst() : this->astCtxt->bv(address, gpr_size);
885 auto final_ea = this->astCtxt->bvadd(memor_ea, this->astCtxt->bv(size - 1, gpr_size));
889 final_ea = this->astCtxt->bv(final_ea->evaluate(), gpr_size);
892 cells.push_back(this->astCtxt->select(this->astCtxt->reference(this->getMemoryArray()), final_ea));
897 if (symMem) cells.push_back(this->astCtxt->reference(symMem));
898 else cells.push_back(this->astCtxt->bv(raw[size - 1],
bitsize::byte));
904 if (cells.size() == 1) {
909 return this->astCtxt->concat(cells);
921 this->setImplicitReadRegisterFromEffectiveAddress(inst, mem);
937 if (symReg) node = this->astCtxt->extract(high, low, this->astCtxt->reference(symReg));
938 else node = this->astCtxt->bv(value, bvSize);
987 if (this->isAlignedMode() && this->isArrayMode() ==
false) {
989 aligned->setOriginMemory(mem);
990 this->addAlignedMemory(address, writeSize, aligned);
1004 tmp = this->astCtxt->extract(high, low, node);
1007 if (this->isArrayMode()) {
1008 auto gpr_size = this->architecture->
gprBitSize();
1009 auto memor_ea = mem.
getLeaAst() !=
nullptr ? mem.
getLeaAst() : this->astCtxt->bv(address, gpr_size);
1010 auto final_ea = this->astCtxt->bvadd(memor_ea, this->astCtxt->bv(writeSize - 1, gpr_size));
1014 final_ea = this->astCtxt->bv(final_ea->evaluate(), gpr_size);
1017 auto cell = this->astCtxt->store(this->astCtxt->reference(this->getMemoryArray()), final_ea, tmp);
1020 this->addBitvectorMemory((address + writeSize) - 1, this->
memoryArray);
1026 this->addBitvectorMemory((address + writeSize) - 1, se);
1034 this->setImplicitReadRegisterFromEffectiveAddress(inst, mem);
1044 se->setOriginMemory(mem);
1046 return this->addSymbolicExpressions(inst,
id);
1055 if (this->architecture->
isFlag(reg)) {
1069 return this->astCtxt->concat(keep, node);
1077 return this->astCtxt->concat(keep, this->astCtxt->concat(node, this->astCtxt->extract((
bitsize::byte - 1), 0, origReg)));
1084 return this->astCtxt->concat(this->astCtxt->extract((parentReg.
getBitSize() - 1),
bitsize::word, origReg), node);
1094 if (zxForAssign ==
false) {
1097 return this->astCtxt->concat(this->astCtxt->extract((parentReg.
getBitSize() - 1), reg.
getHigh() + 1, origReg), node);
1105 return this->astCtxt->zx(parentReg.
getBitSize() - node->getBitvectorSize(), node);
1124 return this->addSymbolicExpressions(inst,
id);
1132 return this->addSymbolicExpressions(inst,
id);
1148 if (reg.
getId() !=
id) {
1153 if (node->getBitvectorSize() != reg.
getBitSize()) {
1154 throw triton::exceptions::SymbolicEngine(
"SymbolicEngine::assignSymbolicExpressionToRegister(): The size of the symbolic expression is not equal to the target register.");
1158 se->setOriginRegister(reg);
1176 if (node->getBitvectorSize() != mem.
getBitSize()) {
1177 throw triton::exceptions::SymbolicEngine(
"SymbolicEngine::assignSymbolicExpressionToMemory(): The size of the symbolic expression is not equal to the memory access.");
1181 if (this->isAlignedMode() && this->isArrayMode() ==
false) {
1182 this->addAlignedMemory(address, writeSize, se);
1197 if (this->isArrayMode()) {
1198 const auto& cell = this->astCtxt->store(this->astCtxt->reference(this->getMemoryArray()), ((address + writeSize) - 1), tmp);
1201 this->addBitvectorMemory((address + writeSize) - 1, this->
memoryArray);
1207 this->addBitvectorMemory((address + writeSize) - 1, se);
1223 return (it->second.use_count() > 0);
1243 if (expr && expr->isSymbolized()) {
1255 return expr->isSymbolized();
1280 this->astCtxt->bv(0, bitSize));
1282 auto indexMulScaleAst = this->astCtxt->bvmul(
1283 (this->architecture->
isRegisterValid(index) ? this->getRegisterAst(index) : this->astCtxt->bv(0, bitSize)),
1284 this->astCtxt->bv(scaleValue, bitSize)
1287 auto dispAst = this->astCtxt->bv(dispValue, bitSize);
1288 auto leaAst = this->astCtxt->bvadd(
1289 index.
isSubtracted() ? this->astCtxt->bvsub(pcPlusBaseAst, indexMulScaleAst) : this->astCtxt->bvadd(pcPlusBaseAst, indexMulScaleAst),
1295 leaAst = this->astCtxt->bvadd(
1297 this->astCtxt->sx((seg.
getBitSize() - bitSize), leaAst)
1312 return this->astCtxt->getVariableValue(symVar->getName());
1320 max = max >> (512 - symVar->getSize());
1326 this->astCtxt->updateVariable(symVar->getName(), value);
1344 inline bool SymbolicEngine::isAlignedMode(
void)
const {
1349 inline bool SymbolicEngine::isArrayMode(
void)
const {
The abstract architecture class.
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register ®, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
TRITON_EXPORT void setConcreteMemoryValue(triton::uint64 addr, triton::uint8 value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory cell.
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
TRITON_EXPORT triton::uint8 getConcreteMemoryValue(triton::uint64 addr, bool execCallbacks=true) const
Returns the concrete value of a memory cell.
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register ®, bool execCallbacks=true) const
Returns the concrete value of a register.
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is a register or a flag.
TRITON_EXPORT const triton::arch::Register & getParentRegister(triton::arch::register_e id) const
Returns parent register from id.
TRITON_EXPORT triton::uint32 getHigh(void) const
Returns the highest bit.
TRITON_EXPORT triton::uint32 getLow(void) const
Returns the lower bit.
This class is used to represent an instruction.
TRITON_EXPORT void setLoadAccess(const triton::arch::MemoryAccess &mem, const triton::ast::SharedAbstractNode &node)
Sets a load access.
TRITON_EXPORT void setWrittenRegister(const triton::arch::Register ®, const triton::ast::SharedAbstractNode &node)
Sets a written register.
TRITON_EXPORT void setStoreAccess(const triton::arch::MemoryAccess &mem, const triton::ast::SharedAbstractNode &node)
Sets a store access.
TRITON_EXPORT void addSymbolicExpression(const triton::engines::symbolic::SharedSymbolicExpression &expr)
Adds a symbolic expression.
TRITON_EXPORT void setReadImmediate(const triton::arch::Immediate &imm, const triton::ast::SharedAbstractNode &node)
Sets a read immediate.
std::vector< triton::engines::symbolic::SharedSymbolicExpression > symbolicExpressions
The semantics set of the instruction.
TRITON_EXPORT void setReadRegister(const triton::arch::Register ®, const triton::ast::SharedAbstractNode &node)
Sets a read register.
This class is used to represent a memory access.
TRITON_EXPORT triton::uint64 getPcRelative(void) const
LEA - Gets pc relative.
TRITON_EXPORT triton::ast::SharedAbstractNode getLeaAst(void) const
Returns the AST of the memory access (LEA).
TRITON_EXPORT const triton::arch::Register & getConstBaseRegister(void) const
LEA - Returns the base register operand.
TRITON_EXPORT void setLeaAst(const triton::ast::SharedAbstractNode &ast)
Sets the AST of the memory access (LEA).
TRITON_EXPORT const triton::arch::Register & getConstSegmentRegister(void) const
LEA - Returns the segment register operand.
TRITON_EXPORT triton::uint32 getBitSize(void) const
Returns the size (in bits) of the memory vector.
TRITON_EXPORT const triton::arch::Immediate & getConstDisplacement(void) const
LEA - Returns the displacement operand.
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the memory.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the memory vector.
TRITON_EXPORT void setAddress(triton::uint64 addr)
Sets the address of the memory access.
TRITON_EXPORT const triton::arch::Register & getConstIndexRegister(void) const
LEA - Returns the index register operand.
TRITON_EXPORT const triton::arch::Immediate & getConstScale(void) const
LEA - Returns the scale operand.
This class is used as operand wrapper.
TRITON_EXPORT triton::arch::operand_e getType(void) const
Returns the abstract type of the operand.
TRITON_EXPORT const triton::arch::MemoryAccess & getConstMemory(void) const
Returns the memory operand as const.
TRITON_EXPORT const triton::arch::Register & getConstRegister(void) const
Returns the register operand.
TRITON_EXPORT const triton::arch::Immediate & getConstImmediate(void) const
Returns the immediate operand.
This class is used when an instruction has a register operand.
TRITON_EXPORT triton::uint32 getBitSize(void) const
Returns the size (in bits) of the register.
TRITON_EXPORT triton::arch::register_e getParent(void) const
Returns the parent id of the register.
TRITON_EXPORT triton::arch::register_e getId(void) const
Returns the id of the register.
TRITON_EXPORT bool isMutable(void) const
Returns true if this register is mutable. Mainly used in AArch64 to define that some registers like X...
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the register.
This class is used to represent specific properties of an Arm operand.
TRITON_EXPORT triton::arch::arm::shift_e getShiftType(void) const
Returns the type of the shift.
TRITON_EXPORT triton::arch::register_e getShiftRegister(void) const
Returns the value of the shift register.
TRITON_EXPORT triton::arch::arm::extend_e getExtendType(void) const
Returns the type of the extend.
TRITON_EXPORT triton::uint32 getExtendSize(void) const
Returns the size (in bits) of the extend.
TRITON_EXPORT triton::sint32 getVectorIndex(void) const
Returns the vector index (-1 if irrelevant).
TRITON_EXPORT triton::uint32 getShiftImmediate(void) const
Returns the value of the shift immediate.
TRITON_EXPORT bool isSubtracted(void) const
Returns true if the operand has to be subtracted when computing a memory access.
TRITON_EXPORT triton::uint32 getVASSize(void) const
Returns the vector arrangement specifier size (64 or 128 bits).
TRITON_EXPORT PathManager & operator=(const PathManager &other)
Copies a PathManager.
The symbolic engine class.
std::unordered_map< triton::usize, WeakSymbolicExpression > symbolicExpressions
The map of symbolic expressions <id : SymbolicExpression>
TRITON_EXPORT const SharedSymbolicExpression & createSymbolicMemoryExpression(triton::arch::Instruction &inst, const triton::ast::SharedAbstractNode &node, const triton::arch::MemoryAccess &mem, const std::string &comment="")
Returns the new symbolic memory expression expression and links this expression to the instruction.
triton::usize uniqueSymExprId
Symbolic expressions id.
TRITON_EXPORT void concretizeMemory(const triton::arch::MemoryAccess &mem, bool array=true)
Concretizes specific symbolic memory cells.
SharedSymbolicExpression memoryArray
An array memory model.
TRITON_EXPORT const SharedSymbolicExpression & createSymbolicRegisterExpression(triton::arch::Instruction &inst, const triton::ast::SharedAbstractNode &node, const triton::arch::Register ®, const std::string &comment="")
Returns the new symbolic register expression expression and links this expression to the instruction.
TRITON_EXPORT SharedSymbolicVariable symbolizeExpression(triton::usize exprId, triton::uint32 symVarSize, const std::string &symVarAlias="")
Converts a symbolic expression to a symbolic variable. symVarSize must be in bits.
triton::usize uniqueSymVarId
Symbolic variables id.
TRITON_EXPORT bool isMemorySymbolized(const triton::arch::MemoryAccess &mem) const
Returns true if memory cell expressions contain symbolic variables.
TRITON_EXPORT std::unordered_map< triton::usize, SharedSymbolicExpression > getSymbolicExpressions(void) const
Returns all symbolic expressions.
TRITON_EXPORT bool isSymbolicExpressionExists(triton::usize symExprId) const
Returns true if the symbolic expression ID exists.
triton::ast::SharedAbstractNode getIndexAst(const triton::arch::arm::ArmOperandProperties &vas_index, const triton::ast::SharedAbstractNode &node)
Returns the AST corresponding to the VAS vector index operation. Mainly used for Arm Neon vector oper...
TRITON_EXPORT SymbolicEngine & operator=(const SymbolicEngine &other)
Copies a SymbolicEngine.
TRITON_EXPORT SharedSymbolicVariable symbolizeRegister(const triton::arch::Register ®, const std::string &symVarAlias="")
Converts a symbolic register expression to a symbolic variable.
triton::ast::SharedAbstractNode getShiftAst(const triton::arch::arm::ArmOperandProperties &shift, const triton::ast::SharedAbstractNode &node)
Returns the AST corresponding to the shift operation. Mainly used for Arm32 operands.
TRITON_EXPORT SharedSymbolicExpression getSymbolicExpression(triton::usize symExprId) const
Returns the symbolic expression corresponding to an id.
TRITON_EXPORT SharedSymbolicVariable getSymbolicVariable(triton::usize symVarId) const
Returns the symbolic variable corresponding to the symbolic variable id.
TRITON_EXPORT const SharedSymbolicExpression & createSymbolicVolatileExpression(triton::arch::Instruction &inst, const triton::ast::SharedAbstractNode &node, const std::string &comment="")
Returns the new symbolic volatile expression expression and links this expression to the instruction.
TRITON_EXPORT void assignSymbolicExpressionToMemory(const SharedSymbolicExpression &se, const triton::arch::MemoryAccess &mem)
Assigns a symbolic expression to a memory.
std::unordered_map< triton::uint64, SharedSymbolicExpression > memoryBitvector
A bitvector memory model represented by a map of <address:SymbolicExpression>
TRITON_EXPORT void setConcreteVariableValue(const SharedSymbolicVariable &symVar, const triton::uint512 &value)
Sets the concrete value of a symbolic variable.
TRITON_EXPORT const std::unordered_map< triton::uint64, SharedSymbolicExpression > & getSymbolicMemory(void) const
Returns the map (addr:expr) of all symbolic memory assigned.
TRITON_EXPORT void assignSymbolicExpressionToRegister(const SharedSymbolicExpression &se, const triton::arch::Register ®)
Assigns a symbolic expression to a register.
TRITON_EXPORT void initLeaAst(triton::arch::MemoryAccess &mem, bool force=true)
Initializes the effective address of a memory access.
TRITON_EXPORT std::vector< triton::uint8 > getSymbolicMemoryAreaValue(triton::uint64 baseAddr, triton::usize size)
Returns the symbolic values of a memory area.
TRITON_EXPORT std::unordered_map< triton::arch::register_e, SharedSymbolicExpression > getSymbolicRegisters(void) const
Returns the map of symbolic registers defined.
TRITON_EXPORT SymbolicEngine(triton::arch::Architecture *architecture, const triton::modes::SharedModes &modes, const triton::ast::SharedAstContext &astCtxt, triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
TRITON_EXPORT triton::ast::SharedAbstractNode getMemoryAst(const triton::arch::MemoryAccess &mem)
Returns the AST corresponding to the memory.
TRITON_EXPORT SharedSymbolicVariable symbolizeMemory(const triton::arch::MemoryAccess &mem, const std::string &symVarAlias="")
Converts a symbolic memory expression to a symbolic variable.
TRITON_EXPORT triton::uint512 getSymbolicRegisterValue(const triton::arch::Register ®)
Returns the symbolic register value.
TRITON_EXPORT std::vector< SharedSymbolicExpression > getTaintedSymbolicExpressions(void) const
Returns the vector of the tainted symbolic expressions.
TRITON_EXPORT triton::ast::SharedAbstractNode getRegisterAst(const triton::arch::Register ®)
Returns the AST corresponding to the register.
TRITON_EXPORT triton::uint512 getConcreteVariableValue(const SharedSymbolicVariable &symVar) const
Gets the concrete value of a symbolic variable.
TRITON_EXPORT SharedSymbolicVariable newSymbolicVariable(triton::engines::symbolic::variable_e type, triton::uint64 source, triton::uint32 size, const std::string &alias="")
Adds a symbolic variable.
TRITON_EXPORT const SharedSymbolicExpression & createSymbolicExpression(triton::arch::Instruction &inst, const triton::ast::SharedAbstractNode &node, const triton::arch::OperandWrapper &dst, const std::string &comment="")
Returns the new symbolic expression and links this expression to the instruction.
TRITON_EXPORT SharedSymbolicExpression newSymbolicExpression(const triton::ast::SharedAbstractNode &node, triton::engines::symbolic::expression_e type, const std::string &comment="")
Creates a new symbolic expression.
TRITON_EXPORT const SharedSymbolicExpression & getSymbolicRegister(const triton::arch::Register ®) const
Returns the symbolic expression assigned to the register.
TRITON_EXPORT void removeSymbolicExpression(const SharedSymbolicExpression &expr)
Removes the symbolic expression corresponding to the id.
TRITON_EXPORT std::unordered_map< triton::usize, SharedSymbolicExpression > sliceExpressions(const SharedSymbolicExpression &expr)
Slices all expressions from a given one.
triton::uint32 numberOfRegisters
Number of registers.
TRITON_EXPORT triton::uint8 getSymbolicMemoryValue(triton::uint64 address)
Returns the symbolic memory value.
TRITON_EXPORT void concretizeAllMemory(void)
Concretizes all the symbolic memory.
std::unordered_map< triton::usize, WeakSymbolicVariable > symbolicVariables
The map of symbolic variables <id : SymbolicVariable>
TRITON_EXPORT ~SymbolicEngine()
Destructor.
TRITON_EXPORT triton::ast::SharedAbstractNode getImmediateAst(const triton::arch::Immediate &imm)
Returns the AST corresponding to the immediate.
std::vector< SharedSymbolicExpression > symbolicReg
The list of all symbolic registers.
TRITON_EXPORT void concretizeAllRegister(void)
Concretizes all symbolic registers.
TRITON_EXPORT std::map< triton::usize, SharedSymbolicVariable > getSymbolicVariables(void) const
Returns all symbolic variables.
TRITON_EXPORT void concretizeRegister(const triton::arch::Register ®)
Concretizes a specific symbolic register.
TRITON_EXPORT triton::ast::SharedAbstractNode getOperandAst(const triton::arch::OperandWrapper &op)
Returns the AST corresponding to the operand.
std::map< std::pair< triton::uint64, triton::uint32 >, SharedSymbolicExpression > alignedBitvectorMemory
The map of aligned symbolic expressions (used for symbolic optimizations) <<addr : size> : SharedSymb...
TRITON_EXPORT bool isRegisterSymbolized(const triton::arch::Register ®) const
Returns true if the register expression contains a symbolic variable.
The symbolic simplification class.
TRITON_EXPORT triton::ast::SharedAbstractNode simplify(const triton::ast::SharedAbstractNode &node) const
Processes all recorded simplifications. Returns the simplified node.
TRITON_EXPORT SymbolicSimplification & operator=(const SymbolicSimplification &other)
Copies a SymbolicSimplification.
The exception class used by the symbolic engine.
register_e
Types of register.
@ ID_SHIFT_LSR
Logical Shift Right (immediate)
@ ID_SHIFT_LSR_REG
Logical Shift Right (register)
@ ID_SHIFT_ASR
Arithmetic Shift Right (immediate)
@ ID_SHIFT_ROR_REG
Rotate Right (register)
@ ID_SHIFT_ROR
Rotate Right (immediate)
@ ID_SHIFT_ASR_REG
Arithmetic Shift Right (register)
@ ID_SHIFT_RRX
Rotate Right with Extend (immediate)
@ ID_SHIFT_RRX_REG
Rotate Right with Extend (register)
@ ID_SHIFT_LSL_REG
Logical Shift Left (register)
@ ID_SHIFT_INVALID
invalid
@ ID_SHIFT_LSL
Logical Shift Left (immediate)
@ ID_EXTEND_SXTW
Extracts a word (32-bit) value from a register and zero extends it to the size of the register.
@ ID_EXTEND_UXTX
Use the whole 64-bit register.
@ ID_EXTEND_SXTX
Use the whole 64-bit register.
@ ID_EXTEND_SXTH
Extracts a halfword (16-bit) value from a register and zero extends it to the size of the register.
@ ID_EXTEND_UXTB
Extracts a byte (8-bit) value from a register and zero extends it to the size of the register.
@ ID_EXTEND_INVALID
invalid
@ ID_EXTEND_UXTW
Extracts a word (32-bit) value from a register and zero extends it to the size of the register.
@ ID_EXTEND_SXTB
Extracts a byte (8-bit) value from a register and zero extends it to the size of the register.
@ ID_EXTEND_UXTH
Extracts a halfword (16-bit) value from a register and zero extends it to the size of the register.
std::vector< SharedAbstractNode > childrenExtraction(const SharedAbstractNode &node, bool unroll, bool revert)
Returns node and all its children of an AST sorted topologically. If unroll is true,...
std::shared_ptr< triton::ast::AbstractNode > SharedAbstractNode
Shared Abstract Node.
std::shared_ptr< triton::ast::AstContext > SharedAstContext
Shared AST context.
constexpr triton::uint32 byte
byte size in bit
constexpr triton::uint32 word
word size in bit
std::shared_ptr< triton::modes::Modes > SharedModes
Shared Modes.
@ ALIGNED_MEMORY
[symbolic] Keep a map of aligned memory.
@ SYMBOLIZE_STORE
[symbolic] Symbolize memory store if memory array is enabled
@ ONLY_ON_SYMBOLIZED
[symbolic] Perform symbolic execution only on symbolized expressions.
@ SYMBOLIZE_LOAD
[symbolic] Symbolize memory load if memory array is enabled
@ AST_OPTIMIZATIONS
[AST] Classical arithmetic optimisations to reduce the depth of the trees.
@ MEMORY_ARRAY
[symbolic] Enable memory symbolic array
constexpr triton::uint32 fword
fword size in byte
constexpr triton::uint32 dword
dword size in byte
constexpr triton::uint32 dqqword
dqqword size in byte
constexpr triton::uint32 word
word size in byte
constexpr triton::uint32 dqword
dqword size in byte
constexpr triton::uint32 byte
byte size in byte
constexpr triton::uint32 qword
qword size in byte
constexpr triton::uint32 qqword
qqword size in byte
std::shared_ptr< triton::engines::symbolic::SymbolicExpression > SharedSymbolicExpression
Shared Symbolic Expression.
expression_e
Type of symbolic expressions.
std::shared_ptr< triton::engines::symbolic::SymbolicVariable > SharedSymbolicVariable
Shared Symbolic variable.
variable_e
Type of symbolic variable.
@ REGISTER_EXPRESSION
Assigned to a register expression.
@ MEMORY_EXPRESSION
Assigned to a memory expression.
@ VOLATILE_EXPRESSION
Assigned to a volatile expression.
@ REGISTER_VARIABLE
Variable assigned to a register.
@ MEMORY_VARIABLE
Variable assigned to a memory.
@ UNDEFINED_VARIABLE
Undefined assignment.
std::int32_t sint32
signed 32-bits
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
std::uint64_t uint64
unisgned 64-bits
std::uint32_t uint32
unisgned 32-bits
std::uint8_t uint8
unisgned 8-bits
TRITON_EXPORT void fromUintToBuffer(triton::uint80 value, triton::uint8 *buffer)
Inject the value into the buffer. Make sure that the buffer contains at least 10 allocated bytes.