libTriton version 1.0 build 1592
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x86Cpu.cpp
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1
2/*
3** Copyright (C) - Triton
4**
5** This program is under the terms of the Apache License 2.0.
6*/
7
8#include <algorithm>
9#include <cctype>
10#include <cstring>
11
12#include <triton/architecture.hpp>
13#include <triton/coreUtils.hpp>
14#include <triton/cpuSize.hpp>
15#include <triton/exceptions.hpp>
16#include <triton/externalLibs.hpp>
17#include <triton/immediate.hpp>
18#include <triton/x86Cpu.hpp>
19
20
21
22namespace triton {
23 namespace arch {
24 namespace x86 {
25
26 x86Cpu::x86Cpu(triton::callbacks::Callbacks* callbacks) : x86Specifications(ARCH_X86) {
27 this->callbacks = callbacks;
28 this->handle = 0;
29
30 this->clear();
31 this->disassInit();
32 }
33
34
35 x86Cpu::x86Cpu(const x86Cpu& other) : x86Specifications(ARCH_X86) {
36 this->copy(other);
37 }
38
39
40 x86Cpu::~x86Cpu() {
41 this->memory.clear();
42 if (this->handle) {
43 triton::extlibs::capstone::cs_close(&this->handle);
44 }
45 }
46
47
48 void x86Cpu::disassInit(void) {
49 if (this->handle) {
50 triton::extlibs::capstone::cs_close(&this->handle);
51 }
52
53 if (triton::extlibs::capstone::cs_open(triton::extlibs::capstone::CS_ARCH_X86, triton::extlibs::capstone::CS_MODE_32, &this->handle) != triton::extlibs::capstone::CS_ERR_OK)
54 throw triton::exceptions::Disassembly("x86Cpu::disassInit(): Cannot open capstone.");
55
56 triton::extlibs::capstone::cs_option(this->handle, triton::extlibs::capstone::CS_OPT_DETAIL, triton::extlibs::capstone::CS_OPT_ON);
57 triton::extlibs::capstone::cs_option(this->handle, triton::extlibs::capstone::CS_OPT_SYNTAX, triton::extlibs::capstone::CS_OPT_SYNTAX_INTEL);
58 }
59
60
61 void x86Cpu::copy(const x86Cpu& other) {
62 this->callbacks = other.callbacks;
63 this->memory = other.memory;
64
65 std::memcpy(this->eax, other.eax, sizeof(this->eax));
66 std::memcpy(this->ebx, other.ebx, sizeof(this->ebx));
67 std::memcpy(this->ecx, other.ecx, sizeof(this->ecx));
68 std::memcpy(this->edx, other.edx, sizeof(this->edx));
69 std::memcpy(this->edi, other.edi, sizeof(this->edi));
70 std::memcpy(this->esi, other.esi, sizeof(this->esi));
71 std::memcpy(this->esp, other.esp, sizeof(this->esp));
72 std::memcpy(this->ebp, other.ebp, sizeof(this->ebp));
73 std::memcpy(this->eip, other.eip, sizeof(this->eip));
74 std::memcpy(this->eflags, other.eflags, sizeof(this->eflags));
75 std::memcpy(this->st0, other.st0, sizeof(this->st0));
76 std::memcpy(this->st1, other.st1, sizeof(this->st1));
77 std::memcpy(this->st2, other.st2, sizeof(this->st2));
78 std::memcpy(this->st3, other.st3, sizeof(this->st3));
79 std::memcpy(this->st4, other.st4, sizeof(this->st4));
80 std::memcpy(this->st5, other.st5, sizeof(this->st5));
81 std::memcpy(this->st6, other.st6, sizeof(this->st6));
82 std::memcpy(this->st7, other.st7, sizeof(this->st7));
83 std::memcpy(this->ymm0, other.ymm0, sizeof(this->ymm0));
84 std::memcpy(this->ymm1, other.ymm1, sizeof(this->ymm1));
85 std::memcpy(this->ymm2, other.ymm2, sizeof(this->ymm2));
86 std::memcpy(this->ymm3, other.ymm3, sizeof(this->ymm3));
87 std::memcpy(this->ymm4, other.ymm4, sizeof(this->ymm4));
88 std::memcpy(this->ymm5, other.ymm5, sizeof(this->ymm5));
89 std::memcpy(this->ymm6, other.ymm6, sizeof(this->ymm6));
90 std::memcpy(this->ymm7, other.ymm7, sizeof(this->ymm7));
91 std::memcpy(this->mxcsr, other.mxcsr, sizeof(this->mxcsr));
92 std::memcpy(this->cr0, other.cr0, sizeof(this->cr0));
93 std::memcpy(this->cr1, other.cr1, sizeof(this->cr1));
94 std::memcpy(this->cr2, other.cr2, sizeof(this->cr2));
95 std::memcpy(this->cr3, other.cr3, sizeof(this->cr3));
96 std::memcpy(this->cr4, other.cr4, sizeof(this->cr4));
97 std::memcpy(this->cr5, other.cr5, sizeof(this->cr5));
98 std::memcpy(this->cr6, other.cr6, sizeof(this->cr6));
99 std::memcpy(this->cr7, other.cr7, sizeof(this->cr7));
100 std::memcpy(this->cr8, other.cr8, sizeof(this->cr8));
101 std::memcpy(this->cr9, other.cr9, sizeof(this->cr9));
102 std::memcpy(this->cr10, other.cr10, sizeof(this->cr10));
103 std::memcpy(this->cr11, other.cr11, sizeof(this->cr11));
104 std::memcpy(this->cr12, other.cr12, sizeof(this->cr12));
105 std::memcpy(this->cr13, other.cr13, sizeof(this->cr13));
106 std::memcpy(this->cr14, other.cr14, sizeof(this->cr14));
107 std::memcpy(this->cr15, other.cr15, sizeof(this->cr15));
108 std::memcpy(this->cs, other.cs, sizeof(this->cs));
109 std::memcpy(this->ds, other.ds, sizeof(this->ds));
110 std::memcpy(this->es, other.es, sizeof(this->es));
111 std::memcpy(this->fs, other.fs, sizeof(this->fs));
112 std::memcpy(this->gs, other.gs, sizeof(this->gs));
113 std::memcpy(this->ss, other.ss, sizeof(this->ss));
114 std::memcpy(this->dr0, other.dr0, sizeof(this->dr0));
115 std::memcpy(this->dr1, other.dr1, sizeof(this->dr1));
116 std::memcpy(this->dr2, other.dr2, sizeof(this->dr2));
117 std::memcpy(this->dr3, other.dr3, sizeof(this->dr3));
118 std::memcpy(this->dr6, other.dr6, sizeof(this->dr6));
119 std::memcpy(this->dr7, other.dr7, sizeof(this->dr7));
120 std::memcpy(this->mxcsr_mask, other.mxcsr_mask, sizeof(this->mxcsr_mask));
121 std::memcpy(this->fcw, other.fcw, sizeof(this->fcw));
122 std::memcpy(this->fsw, other.fsw, sizeof(this->fsw));
123 std::memcpy(this->ftw, other.ftw, sizeof(this->ftw));
124 std::memcpy(this->fop, other.fop, sizeof(this->fop));
125 std::memcpy(this->fip, other.fip, sizeof(this->fip));
126 std::memcpy(this->fcs, other.fcs, sizeof(this->fcs));
127 std::memcpy(this->fdp, other.fdp, sizeof(this->fdp));
128 std::memcpy(this->fds, other.fds, sizeof(this->fds));
129 std::memcpy(this->efer, other.efer, sizeof(this->efer));
130 std::memcpy(this->tsc, other.tsc, sizeof(this->tsc));
131 }
132
133
134 void x86Cpu::clear(void) {
135 /* Clear memory */
136 this->memory.clear();
137
138 /* Clear registers */
139 std::memset(this->eax, 0x00, sizeof(this->eax));
140 std::memset(this->ebx, 0x00, sizeof(this->ebx));
141 std::memset(this->ecx, 0x00, sizeof(this->ecx));
142 std::memset(this->edx, 0x00, sizeof(this->edx));
143 std::memset(this->edi, 0x00, sizeof(this->edi));
144 std::memset(this->esi, 0x00, sizeof(this->esi));
145 std::memset(this->esp, 0x00, sizeof(this->esp));
146 std::memset(this->ebp, 0x00, sizeof(this->ebp));
147 std::memset(this->eip, 0x00, sizeof(this->eip));
148 std::memset(this->eflags, 0x00, sizeof(this->eflags));
149 std::memset(this->st0, 0x00, sizeof(this->st0));
150 std::memset(this->st1, 0x00, sizeof(this->st1));
151 std::memset(this->st2, 0x00, sizeof(this->st2));
152 std::memset(this->st3, 0x00, sizeof(this->st3));
153 std::memset(this->st4, 0x00, sizeof(this->st4));
154 std::memset(this->st5, 0x00, sizeof(this->st5));
155 std::memset(this->st6, 0x00, sizeof(this->st6));
156 std::memset(this->st7, 0x00, sizeof(this->st7));
157 std::memset(this->ymm0, 0x00, sizeof(this->ymm0));
158 std::memset(this->ymm1, 0x00, sizeof(this->ymm1));
159 std::memset(this->ymm2, 0x00, sizeof(this->ymm2));
160 std::memset(this->ymm3, 0x00, sizeof(this->ymm3));
161 std::memset(this->ymm4, 0x00, sizeof(this->ymm4));
162 std::memset(this->ymm5, 0x00, sizeof(this->ymm5));
163 std::memset(this->ymm6, 0x00, sizeof(this->ymm6));
164 std::memset(this->ymm7, 0x00, sizeof(this->ymm7));
165 std::memset(this->mxcsr, 0x00, sizeof(this->mxcsr));
166 std::memset(this->cr0, 0x00, sizeof(this->cr0));
167 std::memset(this->cr1, 0x00, sizeof(this->cr1));
168 std::memset(this->cr2, 0x00, sizeof(this->cr2));
169 std::memset(this->cr3, 0x00, sizeof(this->cr3));
170 std::memset(this->cr4, 0x00, sizeof(this->cr4));
171 std::memset(this->cr5, 0x00, sizeof(this->cr5));
172 std::memset(this->cr6, 0x00, sizeof(this->cr6));
173 std::memset(this->cr7, 0x00, sizeof(this->cr7));
174 std::memset(this->cr8, 0x00, sizeof(this->cr8));
175 std::memset(this->cr9, 0x00, sizeof(this->cr9));
176 std::memset(this->cr10, 0x00, sizeof(this->cr10));
177 std::memset(this->cr11, 0x00, sizeof(this->cr11));
178 std::memset(this->cr12, 0x00, sizeof(this->cr12));
179 std::memset(this->cr13, 0x00, sizeof(this->cr13));
180 std::memset(this->cr14, 0x00, sizeof(this->cr14));
181 std::memset(this->cr15, 0x00, sizeof(this->cr15));
182 std::memset(this->cs, 0x00, sizeof(this->cs));
183 std::memset(this->ds, 0x00, sizeof(this->ds));
184 std::memset(this->es, 0x00, sizeof(this->es));
185 std::memset(this->fs, 0x00, sizeof(this->fs));
186 std::memset(this->gs, 0x00, sizeof(this->gs));
187 std::memset(this->ss, 0x00, sizeof(this->ss));
188 std::memset(this->dr0, 0x00, sizeof(this->dr0));
189 std::memset(this->dr1, 0x00, sizeof(this->dr1));
190 std::memset(this->dr2, 0x00, sizeof(this->dr2));
191 std::memset(this->dr3, 0x00, sizeof(this->dr3));
192 std::memset(this->dr6, 0x00, sizeof(this->dr6));
193 std::memset(this->dr7, 0x00, sizeof(this->dr7));
194 std::memset(this->mxcsr_mask, 0x00, sizeof(this->mxcsr_mask));
195 std::memset(this->fcw, 0x00, sizeof(this->fcw));
196 std::memset(this->fsw, 0x00, sizeof(this->fsw));
197 std::memset(this->ftw, 0x00, sizeof(this->ftw));
198 std::memset(this->fop, 0x00, sizeof(this->fop));
199 std::memset(this->fip, 0x00, sizeof(this->fip));
200 std::memset(this->fcs, 0x00, sizeof(this->fcs));
201 std::memset(this->fdp, 0x00, sizeof(this->fdp));
202 std::memset(this->fds, 0x00, sizeof(this->fds));
203 std::memset(this->efer, 0x00, sizeof(this->efer));
204 std::memset(this->tsc, 0x00, sizeof(this->tsc));
205 }
206
207
208 x86Cpu& x86Cpu::operator=(const x86Cpu& other) {
209 this->copy(other);
210 return *this;
211 }
212
213
217
218
219 bool x86Cpu::isFlag(triton::arch::register_e regId) const {
220 if (regId >= triton::arch::ID_REG_X86_AC && regId <= triton::arch::ID_REG_X86_ZF) { return true; }
221 if (regId >= triton::arch::ID_REG_X86_FTW && regId <= triton::arch::ID_REG_X86_FDP) { return true; }
222 if (regId >= triton::arch::ID_REG_X86_SSE_IE && regId <= triton::arch::ID_REG_X86_SSE_FZ) { return true; }
223 if (regId >= triton::arch::ID_REG_X86_FCW_IM && regId <= triton::arch::ID_REG_X86_FCW_X) { return true; }
224 if (regId >= triton::arch::ID_REG_X86_FSW_IE && regId <= triton::arch::ID_REG_X86_FSW_B) { return true; }
225 return false;
226 }
227
228
229 bool x86Cpu::isRegister(triton::arch::register_e regId) const {
230 return (
231 this->isGPR(regId) ||
232 this->isMMX(regId) ||
233 this->isSTX(regId) ||
234 this->isSSE(regId) ||
235 this->isSSECTL(regId) ||
236 this->isFPU(regId) ||
237 this->isEFER(regId) ||
238 this->isTSC(regId) ||
239 this->isAVX256(regId) ||
240 this->isControl(regId) ||
241 this->isDebug(regId) ||
242 this->isSegment(regId)
243 );
244 }
245
246
247 bool x86Cpu::isRegisterValid(triton::arch::register_e regId) const {
248 return (this->isFlag(regId) || this->isRegister(regId));
249 }
250
251
252 bool x86Cpu::isGPR(triton::arch::register_e regId) const {
253 return ((regId >= triton::arch::ID_REG_X86_EAX && regId <= triton::arch::ID_REG_X86_EFLAGS) ? true : false);
254 }
255
256
257 bool x86Cpu::isMMX(triton::arch::register_e regId) const {
258 return ((regId >= triton::arch::ID_REG_X86_MM0 && regId <= triton::arch::ID_REG_X86_MM7) ? true : false);
259 }
260
261
262 bool x86Cpu::isSTX(triton::arch::register_e regId) const {
263 return ((regId >= triton::arch::ID_REG_X86_ST0 && regId <= triton::arch::ID_REG_X86_ST7) ? true : false);
264 }
265
266
267 bool x86Cpu::isSSE(triton::arch::register_e regId) const {
268 return ((regId >= triton::arch::ID_REG_X86_XMM0 && regId <= triton::arch::ID_REG_X86_XMM7) ? true : false);
269 }
270
271
272 bool x86Cpu::isSSECTL(triton::arch::register_e regId) const {
273 return ((regId >= triton::arch::ID_REG_X86_MXCSR && regId <= triton::arch::ID_REG_X86_MXCSR_MASK) ? true : false);
274 }
275
276
277 bool x86Cpu::isFPU(triton::arch::register_e regId) const {
278 return ((regId >= triton::arch::ID_REG_X86_FTW && regId <= triton::arch::ID_REG_X86_FDP) ? true : false);
279 }
280
281
282 bool x86Cpu::isEFER(triton::arch::register_e regId) const {
283 return ((regId == triton::arch::ID_REG_X86_EFER) ? true : false);
284 }
285
286
287 bool x86Cpu::isTSC(triton::arch::register_e regId) const {
288 return ((regId == triton::arch::ID_REG_X86_TSC) ? true : false);
289 }
290
291
292 bool x86Cpu::isAVX256(triton::arch::register_e regId) const {
293 return ((regId >= triton::arch::ID_REG_X86_YMM0 && regId <= triton::arch::ID_REG_X86_YMM7) ? true : false);
294 }
295
296
297 bool x86Cpu::isControl(triton::arch::register_e regId) const {
298 return ((regId >= triton::arch::ID_REG_X86_CR0 && regId <= triton::arch::ID_REG_X86_CR15) ? true : false);
299 }
300
301
302 bool x86Cpu::isDebug(triton::arch::register_e regId) const {
303 return ((regId >= triton::arch::ID_REG_X86_DR0 && regId <= triton::arch::ID_REG_X86_DR7) ? true : false);
304 }
305
306
307 bool x86Cpu::isSegment(triton::arch::register_e regId) const {
308 return ((regId >= triton::arch::ID_REG_X86_CS && regId <= triton::arch::ID_REG_X86_SS) ? true : false);
309 }
310
311
315
316
317 triton::uint32 x86Cpu::gprSize(void) const {
318 return triton::size::dword;
319 }
320
321
325
326
327
328 const std::unordered_map<triton::arch::register_e, const triton::arch::Register>& x86Cpu::getAllRegisters(void) const {
329 return this->id2reg;
330 }
331
332 const std::unordered_map<triton::uint64, triton::uint8, IdentityHash<triton::uint64>>& x86Cpu::getConcreteMemory(void) const {
333 return this->memory;
334 }
335
336
337 std::set<const triton::arch::Register*> x86Cpu::getParentRegisters(void) const {
338 std::set<const triton::arch::Register*> ret;
339
340 for (const auto& kv: this->id2reg) {
341 auto regId = kv.first;
342 const auto& reg = kv.second;
343
344 /* Add GPR */
345 if (this->isGPR(regId) && reg.getSize() == this->gprSize())
346 ret.insert(&reg);
347
348 /* Add Flags */
349 else if (this->isFlag(regId))
350 ret.insert(&reg);
351
352 /* Add STX */
353 else if (this->isSTX(regId))
354 ret.insert(&reg);
355
356 /* Add FPU */
357 else if (this->isFPU(regId))
358 ret.insert(&reg);
359
360 /* Add EFER */
361 else if (this->isEFER(regId))
362 ret.insert(&reg);
363
364 /* Add TSC */
365 else if (this->isTSC(regId))
366 ret.insert(&reg);
367
368 else if (this->isSSECTL(regId))
369 ret.insert(&reg);
370
371 /* Add AVX-256 */
372 else if (this->isAVX256(regId))
373 ret.insert(&reg);
374
375 /* Add Control */
376 else if (this->isControl(regId))
377 ret.insert(&reg);
378
379 /* Add Debug */
380 else if (this->isDebug(regId))
381 ret.insert(&reg);
382
383 /* Add Segment */
384 else if (this->isSegment(regId))
385 ret.insert(&reg);
386 }
387
388 return ret;
389 }
390
391
392 const triton::arch::Register& x86Cpu::getRegister(triton::arch::register_e id) const {
393 try {
394 return this->id2reg.at(id);
395 } catch (const std::out_of_range&) {
396 throw triton::exceptions::Cpu("x86Cpu::getRegister(): Invalid register for this architecture.");
397 }
398 }
399
400
401 const triton::arch::Register& x86Cpu::getRegister(const std::string& name) const {
402 std::string lower = name;
403 std::transform(lower.begin(), lower.end(), lower.begin(), [](unsigned char c){ return std::tolower(c); });
404 try {
405 return this->getRegister(this->name2id.at(lower));
406 } catch (const std::out_of_range&) {
407 throw triton::exceptions::Cpu("x86Cpu::getRegister(): Invalid register for this architecture.");
408 }
409 }
410
411
412 const triton::arch::Register& x86Cpu::getParentRegister(const triton::arch::Register& reg) const {
413 return this->getRegister(reg.getParent());
414 }
415
416
420
421
422 const triton::arch::Register& x86Cpu::getProgramCounter(void) const {
423 return this->getRegister(this->pcId);
424 }
425
426
427 const triton::arch::Register& x86Cpu::getStackPointer(void) const {
428 return this->getRegister(this->spId);
429 }
430
431
432 void x86Cpu::disassembly(triton::arch::Instruction& inst) {
433 triton::extlibs::capstone::cs_insn* insn;
434 triton::usize count = 0;
435
436 /* Check if the opcode and opcode' size are defined */
437 if (inst.getOpcode() == nullptr || inst.getSize() == 0)
438 throw triton::exceptions::Disassembly("x86Cpu::disassembly(): Opcode and opcodeSize must be definied.");
439
440 /* Clear instructicon's operands if alredy defined */
441 inst.operands.clear();
442
443 /* Update instruction address if undefined */
444 if (!inst.getAddress()) {
445 inst.setAddress(static_cast<triton::uint64>(this->getConcreteRegisterValue(this->getProgramCounter())));
446 }
447
448 /* Let's disass and build our operands */
449 count = triton::extlibs::capstone::cs_disasm(this->handle, inst.getOpcode(), inst.getSize(), inst.getAddress(), 0, &insn);
450 if (count > 0) {
451 /* Detail information */
452 triton::extlibs::capstone::cs_detail* detail = insn->detail;
453
454 /* Init the disassembly */
455 std::stringstream str;
456
457 str << insn[0].mnemonic;
458 if (detail->x86.op_count)
459 str << " " << insn[0].op_str;
460
461 inst.setDisassembly(str.str());
462
463 /* Refine the size */
464 inst.setSize(insn[0].size);
465
466 /* Init the instruction's type */
467 inst.setType(this->capstoneInstructionToTritonInstruction(insn[0].id));
468
469 /* Init the instruction's prefix */
470 inst.setPrefix(this->capstonePrefixToTritonPrefix(detail->x86.prefix[0]));
471
472 /* Set architecture */
473 inst.setArchitecture(triton::arch::ARCH_X86);
474
475 /* Init operands */
476 for (triton::uint32 n = 0; n < detail->x86.op_count; n++) {
477 triton::extlibs::capstone::cs_x86_op* op = &(detail->x86.operands[n]);
478 switch(op->type) {
479
480 case triton::extlibs::capstone::X86_OP_IMM:
481 inst.operands.push_back(triton::arch::OperandWrapper(triton::arch::Immediate(op->imm, op->size)));
482 break;
483
484 case triton::extlibs::capstone::X86_OP_MEM: {
485 triton::arch::MemoryAccess mem;
486
487 /* Set the size of the memory access */
488 mem.setBits(((op->size * triton::bitsize::byte) - 1), 0);
489
490 /* LEA if exists */
491 const triton::arch::Register segment(*this, this->capstoneRegisterToTritonRegister(op->mem.segment));
492 const triton::arch::Register base(*this, this->capstoneRegisterToTritonRegister(op->mem.base));
493 const triton::arch::Register index(*this, this->capstoneRegisterToTritonRegister(op->mem.index));
494
495 triton::uint32 immsize = (
496 this->isRegisterValid(base.getId()) ? base.getSize() :
497 this->isRegisterValid(index.getId()) ? index.getSize() :
498 this->gprSize()
499 );
500
501 triton::arch::Immediate disp(op->mem.disp, immsize);
502 triton::arch::Immediate scale(op->mem.scale, immsize);
503
504 /* Specify that LEA contains a PC relative */
505 if (base.getId() == this->pcId)
506 mem.setPcRelative(inst.getNextAddress());
507
508 mem.setSegmentRegister(segment);
509 mem.setBaseRegister(base);
510 mem.setIndexRegister(index);
511 mem.setDisplacement(disp);
512 mem.setScale(scale);
513
514 inst.operands.push_back(triton::arch::OperandWrapper(mem));
515 break;
516 }
517
518 case triton::extlibs::capstone::X86_OP_REG:
519 inst.operands.push_back(triton::arch::OperandWrapper(triton::arch::Register(*this, this->capstoneRegisterToTritonRegister(op->reg))));
520 break;
521
522 default:
523 break;
524 }
525
526 }
527 /* Set branch */
528 if (detail->groups_count > 0) {
529 for (triton::uint32 n = 0; n < detail->groups_count; n++) {
530 if (detail->groups[n] == triton::extlibs::capstone::X86_GRP_JUMP)
531 inst.setBranch(true);
532 if (detail->groups[n] == triton::extlibs::capstone::X86_GRP_JUMP ||
533 detail->groups[n] == triton::extlibs::capstone::X86_GRP_CALL ||
534 detail->groups[n] == triton::extlibs::capstone::X86_GRP_RET)
535 inst.setControlFlow(true);
536 }
537 }
538 triton::extlibs::capstone::cs_free(insn, count);
539 }
540 else
541 throw triton::exceptions::Disassembly("x86Cpu::disassembly(): Failed to disassemble the given code.");
542 }
543
544
545 triton::uint8 x86Cpu::getConcreteMemoryValue(triton::uint64 addr, bool execCallbacks) const {
546 if (execCallbacks && this->callbacks)
547 this->callbacks->processCallbacks(triton::callbacks::GET_CONCRETE_MEMORY_VALUE, MemoryAccess(addr, triton::size::byte));
548
549 auto it = this->memory.find(addr);
550 if (it == this->memory.end()) {
551 return 0x00;
552 }
553
554 return it->second;
555 }
556
557
558 triton::uint512 x86Cpu::getConcreteMemoryValue(const triton::arch::MemoryAccess& mem, bool execCallbacks) const {
559 triton::uint512 ret = 0;
560 triton::uint64 addr = 0;
561 triton::uint32 size = 0;
562
563 if (execCallbacks && this->callbacks)
564 this->callbacks->processCallbacks(triton::callbacks::GET_CONCRETE_MEMORY_VALUE, mem);
565
566 addr = mem.getAddress();
567 size = mem.getSize();
568
569 if (size == 0 || size > triton::size::dqqword)
570 throw triton::exceptions::Cpu("x86Cpu::getConcreteMemoryValue(): Invalid size memory.");
571
572 for (triton::sint32 i = size-1; i >= 0; i--)
573 ret = ((ret << triton::bitsize::byte) | this->getConcreteMemoryValue(addr+i, false));
574
575 return ret;
576 }
577
578
579 std::vector<triton::uint8> x86Cpu::getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks) const {
580 std::vector<triton::uint8> area;
581
582 for (triton::usize index = 0; index < size; index++)
583 area.push_back(this->getConcreteMemoryValue(baseAddr+index, execCallbacks));
584
585 return area;
586 }
587
588
589 triton::uint512 x86Cpu::getConcreteRegisterValue(const triton::arch::Register& reg, bool execCallbacks) const {
590 triton::uint512 value = 0;
591
592 if (execCallbacks && this->callbacks)
593 this->callbacks->processCallbacks(triton::callbacks::GET_CONCRETE_REGISTER_VALUE, reg);
594
595 switch (reg.getId()) {
596
597 case triton::arch::ID_REG_X86_EAX: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->eax, triton::size::dword); return val; }
598 case triton::arch::ID_REG_X86_AX: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->eax, triton::size::word); return val; }
599 case triton::arch::ID_REG_X86_AH: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->eax+1, triton::size::byte); return val; }
600 case triton::arch::ID_REG_X86_AL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->eax, triton::size::byte); return val; }
601
602 case triton::arch::ID_REG_X86_EBX: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->ebx, triton::size::dword); return val; }
603 case triton::arch::ID_REG_X86_BX: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->ebx, triton::size::word); return val; }
604 case triton::arch::ID_REG_X86_BH: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->ebx+1, triton::size::byte); return val; }
605 case triton::arch::ID_REG_X86_BL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->ebx, triton::size::byte); return val; }
606
607 case triton::arch::ID_REG_X86_ECX: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->ecx, triton::size::dword); return val; }
608 case triton::arch::ID_REG_X86_CX: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->ecx, triton::size::word); return val; }
609 case triton::arch::ID_REG_X86_CH: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->ecx+1, triton::size::byte); return val; }
610 case triton::arch::ID_REG_X86_CL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->ecx, triton::size::byte); return val; }
611
612 case triton::arch::ID_REG_X86_EDX: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->edx, triton::size::dword); return val; }
613 case triton::arch::ID_REG_X86_DX: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->edx, triton::size::word); return val; }
614 case triton::arch::ID_REG_X86_DH: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->edx+1, triton::size::byte); return val; }
615 case triton::arch::ID_REG_X86_DL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->edx, triton::size::byte); return val; }
616
617 case triton::arch::ID_REG_X86_EDI: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->edi, triton::size::dword); return val; }
618 case triton::arch::ID_REG_X86_DI: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->edi, triton::size::word); return val; }
619 case triton::arch::ID_REG_X86_DIL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->edi, triton::size::byte); return val; }
620
621 case triton::arch::ID_REG_X86_ESI: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->esi, triton::size::dword); return val; }
622 case triton::arch::ID_REG_X86_SI: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->esi, triton::size::word); return val; }
623 case triton::arch::ID_REG_X86_SIL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->esi, triton::size::byte); return val; }
624
625 case triton::arch::ID_REG_X86_ESP: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->esp, triton::size::dword); return val; }
626 case triton::arch::ID_REG_X86_SP: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->esp, triton::size::word); return val; }
627 case triton::arch::ID_REG_X86_SPL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->esp, triton::size::byte); return val; }
628
629 case triton::arch::ID_REG_X86_EBP: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->ebp, triton::size::dword); return val; }
630 case triton::arch::ID_REG_X86_BP: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->ebp, triton::size::word); return val; }
631 case triton::arch::ID_REG_X86_BPL: { triton::uint8 val = 0; std::memcpy(&val, (triton::uint8*)this->ebp, triton::size::byte); return val; }
632
633 case triton::arch::ID_REG_X86_EIP: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->eip, triton::size::dword); return val; }
634 case triton::arch::ID_REG_X86_IP: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->eip, triton::size::word); return val; }
635
636 case triton::arch::ID_REG_X86_EFLAGS: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return val; }
637
638 case triton::arch::ID_REG_X86_MM0: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st0, triton::size::qword); return val; }
639 case triton::arch::ID_REG_X86_MM1: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st1, triton::size::qword); return val; }
640 case triton::arch::ID_REG_X86_MM2: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st2, triton::size::qword); return val; }
641 case triton::arch::ID_REG_X86_MM3: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st3, triton::size::qword); return val; }
642 case triton::arch::ID_REG_X86_MM4: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st4, triton::size::qword); return val; }
643 case triton::arch::ID_REG_X86_MM5: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st5, triton::size::qword); return val; }
644 case triton::arch::ID_REG_X86_MM6: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st6, triton::size::qword); return val; }
645 case triton::arch::ID_REG_X86_MM7: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->st7, triton::size::qword); return val; }
646
647 case triton::arch::ID_REG_X86_ST2: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st2)); }
648 case triton::arch::ID_REG_X86_ST1: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st1)); }
649 case triton::arch::ID_REG_X86_ST3: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st3)); }
650 case triton::arch::ID_REG_X86_ST0: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st0)); }
651 case triton::arch::ID_REG_X86_ST4: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st4)); }
652 case triton::arch::ID_REG_X86_ST5: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st5)); }
653 case triton::arch::ID_REG_X86_ST6: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st6)); }
654 case triton::arch::ID_REG_X86_ST7: { return triton::utils::cast<triton::uint512>(triton::utils::cast<triton::uint80>(this->st7)); }
655
656 case triton::arch::ID_REG_X86_XMM0: { return triton::utils::cast<triton::uint128>(this->ymm0); }
657 case triton::arch::ID_REG_X86_XMM1: { return triton::utils::cast<triton::uint128>(this->ymm1); }
658 case triton::arch::ID_REG_X86_XMM2: { return triton::utils::cast<triton::uint128>(this->ymm2); }
659 case triton::arch::ID_REG_X86_XMM3: { return triton::utils::cast<triton::uint128>(this->ymm3); }
660 case triton::arch::ID_REG_X86_XMM4: { return triton::utils::cast<triton::uint128>(this->ymm4); }
661 case triton::arch::ID_REG_X86_XMM5: { return triton::utils::cast<triton::uint128>(this->ymm5); }
662 case triton::arch::ID_REG_X86_XMM6: { return triton::utils::cast<triton::uint128>(this->ymm6); }
663 case triton::arch::ID_REG_X86_XMM7: { return triton::utils::cast<triton::uint128>(this->ymm7); }
664
665 case triton::arch::ID_REG_X86_YMM0: { return triton::utils::cast<triton::uint256>(this->ymm0); }
666 case triton::arch::ID_REG_X86_YMM1: { return triton::utils::cast<triton::uint256>(this->ymm1); }
667 case triton::arch::ID_REG_X86_YMM2: { return triton::utils::cast<triton::uint256>(this->ymm2); }
668 case triton::arch::ID_REG_X86_YMM3: { return triton::utils::cast<triton::uint256>(this->ymm3); }
669 case triton::arch::ID_REG_X86_YMM4: { return triton::utils::cast<triton::uint256>(this->ymm4); }
670 case triton::arch::ID_REG_X86_YMM5: { return triton::utils::cast<triton::uint256>(this->ymm5); }
671 case triton::arch::ID_REG_X86_YMM6: { return triton::utils::cast<triton::uint256>(this->ymm6); }
672 case triton::arch::ID_REG_X86_YMM7: { return triton::utils::cast<triton::uint256>(this->ymm7); }
673
674
675 case triton::arch::ID_REG_X86_TSC: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->tsc, sizeof(triton::uint64)); return val; }
676 case triton::arch::ID_REG_X86_MXCSR: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return val; }
677 case triton::arch::ID_REG_X86_MXCSR_MASK: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->mxcsr_mask, sizeof(triton::uint32)); return val; }
678
679 case triton::arch::ID_REG_X86_CR0: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr0, triton::size::dword); return val; }
680 case triton::arch::ID_REG_X86_CR1: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr1, triton::size::dword); return val; }
681 case triton::arch::ID_REG_X86_CR2: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr2, triton::size::dword); return val; }
682 case triton::arch::ID_REG_X86_CR3: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr3, triton::size::dword); return val; }
683 case triton::arch::ID_REG_X86_CR4: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr4, triton::size::dword); return val; }
684 case triton::arch::ID_REG_X86_CR5: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr5, triton::size::dword); return val; }
685 case triton::arch::ID_REG_X86_CR6: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr6, triton::size::dword); return val; }
686 case triton::arch::ID_REG_X86_CR7: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr7, triton::size::dword); return val; }
687 case triton::arch::ID_REG_X86_CR8: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr8, triton::size::dword); return val; }
688 case triton::arch::ID_REG_X86_CR9: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr9, triton::size::dword); return val; }
689 case triton::arch::ID_REG_X86_CR10: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr10, triton::size::dword); return val; }
690 case triton::arch::ID_REG_X86_CR11: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr11, triton::size::dword); return val; }
691 case triton::arch::ID_REG_X86_CR12: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr12, triton::size::dword); return val; }
692 case triton::arch::ID_REG_X86_CR13: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr13, triton::size::dword); return val; }
693 case triton::arch::ID_REG_X86_CR14: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr14, triton::size::dword); return val; }
694 case triton::arch::ID_REG_X86_CR15: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint64*)this->cr15, triton::size::dword); return val; }
695
696 case triton::arch::ID_REG_X86_DR0: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->dr0, triton::size::dword); return val; }
697 case triton::arch::ID_REG_X86_DR1: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->dr1, triton::size::dword); return val; }
698 case triton::arch::ID_REG_X86_DR2: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->dr2, triton::size::dword); return val; }
699 case triton::arch::ID_REG_X86_DR3: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->dr3, triton::size::dword); return val; }
700 case triton::arch::ID_REG_X86_DR6: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->dr6, triton::size::dword); return val; }
701 case triton::arch::ID_REG_X86_DR7: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->dr7, triton::size::dword); return val; }
702
703 case triton::arch::ID_REG_X86_SSE_IE: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 0) & 1); }
704 case triton::arch::ID_REG_X86_SSE_DE: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 1) & 1); }
705 case triton::arch::ID_REG_X86_SSE_ZE: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 2) & 1); }
706 case triton::arch::ID_REG_X86_SSE_OE: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 3) & 1); }
707 case triton::arch::ID_REG_X86_SSE_UE: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 4) & 1); }
708 case triton::arch::ID_REG_X86_SSE_PE: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 5) & 1); }
709 case triton::arch::ID_REG_X86_SSE_DAZ: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 6) & 1); }
710 case triton::arch::ID_REG_X86_SSE_IM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 7) & 1); }
711 case triton::arch::ID_REG_X86_SSE_DM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 8) & 1); }
712 case triton::arch::ID_REG_X86_SSE_ZM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 9) & 1); }
713 case triton::arch::ID_REG_X86_SSE_OM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 10) & 1); }
714 case triton::arch::ID_REG_X86_SSE_UM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 11) & 1); }
715 case triton::arch::ID_REG_X86_SSE_PM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 12) & 1); }
716 case triton::arch::ID_REG_X86_SSE_RL: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 13) & 1); }
717 case triton::arch::ID_REG_X86_SSE_RH: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 14) & 1); }
718 case triton::arch::ID_REG_X86_SSE_FZ: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32)); return ((flag >> 15) & 1); }
719
720 case triton::arch::ID_REG_X86_CF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 0) & 1); }
721 case triton::arch::ID_REG_X86_PF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 2) & 1); }
722 case triton::arch::ID_REG_X86_AF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 4) & 1); }
723 case triton::arch::ID_REG_X86_ZF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 6) & 1); }
724 case triton::arch::ID_REG_X86_SF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 7) & 1); }
725 case triton::arch::ID_REG_X86_TF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 8) & 1); }
726 case triton::arch::ID_REG_X86_IF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 9) & 1); }
727 case triton::arch::ID_REG_X86_DF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 10) & 1); }
728 case triton::arch::ID_REG_X86_OF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 11) & 1); }
729 case triton::arch::ID_REG_X86_NT: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 14) & 1); }
730 case triton::arch::ID_REG_X86_RF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 16) & 1); }
731 case triton::arch::ID_REG_X86_VM: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 17) & 1); }
732 case triton::arch::ID_REG_X86_AC: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 18) & 1); }
733 case triton::arch::ID_REG_X86_VIF: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 19) & 1); }
734 case triton::arch::ID_REG_X86_VIP: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 20) & 1); }
735 case triton::arch::ID_REG_X86_ID: { triton::uint32 flag = 0; std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32)); return ((flag >> 21) & 1); }
736
737 case triton::arch::ID_REG_X86_CS: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->cs, triton::size::dword); return val; }
738 case triton::arch::ID_REG_X86_DS: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->ds, triton::size::dword); return val; }
739 case triton::arch::ID_REG_X86_ES: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->es, triton::size::dword); return val; }
740 case triton::arch::ID_REG_X86_FS: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->fs, triton::size::dword); return val; }
741 case triton::arch::ID_REG_X86_GS: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->gs, triton::size::dword); return val; }
742 case triton::arch::ID_REG_X86_SS: { triton::uint32 val = 0; std::memcpy(&val, (triton::uint32*)this->ss, triton::size::dword); return val; }
743
744 case triton::arch::ID_REG_X86_FIP: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->fip, sizeof(triton::uint64)); return val; }
745 case triton::arch::ID_REG_X86_FDP: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->fdp, sizeof(triton::uint64)); return val; }
746 case triton::arch::ID_REG_X86_FCW: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return val; }
747 case triton::arch::ID_REG_X86_FSW: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return val; }
748 case triton::arch::ID_REG_X86_FOP: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->fop, sizeof(triton::uint16)); return val; }
749 case triton::arch::ID_REG_X86_FCS: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->fcs, sizeof(triton::uint16)); return val; }
750 case triton::arch::ID_REG_X86_FDS: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->fds, sizeof(triton::uint16)); return val; }
751 case triton::arch::ID_REG_X86_FTW: { triton::uint16 val = 0; std::memcpy(&val, (triton::uint16*)this->ftw, sizeof(triton::uint16)); return val; }
752
753 case triton::arch::ID_REG_X86_FCW_IM: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 0) & 1); }
754 case triton::arch::ID_REG_X86_FCW_DM: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 1) & 1); }
755 case triton::arch::ID_REG_X86_FCW_ZM: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 2) & 1); }
756 case triton::arch::ID_REG_X86_FCW_OM: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 3) & 1); }
757 case triton::arch::ID_REG_X86_FCW_UM: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 4) & 1); }
758 case triton::arch::ID_REG_X86_FCW_PM: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 5) & 1); }
759 case triton::arch::ID_REG_X86_FCW_PC: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 8) & 3); }
760 case triton::arch::ID_REG_X86_FCW_RC: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 10) & 3); }
761 case triton::arch::ID_REG_X86_FCW_X: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16)); return ((flag >> 12) & 1); }
762
763 case triton::arch::ID_REG_X86_FSW_IE: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 0) & 1); }
764 case triton::arch::ID_REG_X86_FSW_DE: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 1) & 1); }
765 case triton::arch::ID_REG_X86_FSW_ZE: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 2) & 1); }
766 case triton::arch::ID_REG_X86_FSW_OE: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 3) & 1); }
767 case triton::arch::ID_REG_X86_FSW_UE: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 4) & 1); }
768 case triton::arch::ID_REG_X86_FSW_PE: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 5) & 1); }
769 case triton::arch::ID_REG_X86_FSW_SF: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 6) & 1); }
770 case triton::arch::ID_REG_X86_FSW_ES: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 7) & 1); }
771 case triton::arch::ID_REG_X86_FSW_C0: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 8) & 1); }
772 case triton::arch::ID_REG_X86_FSW_C1: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 9) & 1); }
773 case triton::arch::ID_REG_X86_FSW_C2: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 10) & 1); }
774 case triton::arch::ID_REG_X86_FSW_TOP: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 11) & 7); }
775 case triton::arch::ID_REG_X86_FSW_C3: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 14) & 1); }
776 case triton::arch::ID_REG_X86_FSW_B: { triton::uint16 flag = 0; std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16)); return ((flag >> 15) & 1); }
777
778 case triton::arch::ID_REG_X86_EFER_SCE: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 0) & 1); }
779 case triton::arch::ID_REG_X86_EFER_LME: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 8) & 1); }
780 case triton::arch::ID_REG_X86_EFER_LMA: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 10) & 1); }
781 case triton::arch::ID_REG_X86_EFER_NXE: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 11) & 1); }
782 case triton::arch::ID_REG_X86_EFER_SVME: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 12) & 1); }
783 case triton::arch::ID_REG_X86_EFER_LMSLE: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 13) & 1); }
784 case triton::arch::ID_REG_X86_EFER_FFXSR: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 14) & 1); }
785 case triton::arch::ID_REG_X86_EFER_TCE: { triton::uint64 flag = 0; std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64)); return ((flag >> 15) & 1); }
786 case triton::arch::ID_REG_X86_EFER: { triton::uint64 val = 0; std::memcpy(&val, (triton::uint64*)this->efer, sizeof(triton::uint64)); return val; }
787
788 default:
789 throw triton::exceptions::Cpu("x86Cpu::getConcreteRegisterValue(): Invalid register.");
790 }
791
792 return value;
793 }
794
795
796 void x86Cpu::setConcreteMemoryValue(triton::uint64 addr, triton::uint8 value, bool execCallbacks) {
797 if (execCallbacks && this->callbacks)
798 this->callbacks->processCallbacks(triton::callbacks::SET_CONCRETE_MEMORY_VALUE, MemoryAccess(addr, triton::size::byte), value);
799 this->memory[addr] = value;
800 }
801
802
803 void x86Cpu::setConcreteMemoryValue(const triton::arch::MemoryAccess& mem, const triton::uint512& value, bool execCallbacks) {
804 triton::uint64 addr = mem.getAddress();
805 triton::uint32 size = mem.getSize();
806 triton::uint512 cv = value;
807
808 if (cv > mem.getMaxValue())
809 throw triton::exceptions::Register("x86Cpu::setConcreteMemoryValue(): You cannot set this concrete value (too big) to this memory access.");
810
811 if (size == 0 || size > triton::size::dqqword)
812 throw triton::exceptions::Cpu("x86Cpu::setConcreteMemoryValue(): Invalid size memory.");
813
814 if (execCallbacks && this->callbacks)
815 this->callbacks->processCallbacks(triton::callbacks::SET_CONCRETE_MEMORY_VALUE, mem, value);
816
817 for (triton::uint32 i = 0; i < size; i++) {
818 this->memory[addr+i] = static_cast<triton::uint8>(cv & 0xff);
819 cv >>= 8;
820 }
821 }
822
823
824 void x86Cpu::setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector<triton::uint8>& values, bool execCallbacks) {
825 this->memory.reserve(values.size() + this->memory.size());
826 for (triton::usize index = 0; index < values.size(); index++) {
827 this->setConcreteMemoryValue(baseAddr+index, values[index], execCallbacks);
828 }
829 }
830
831
832 void x86Cpu::setConcreteMemoryAreaValue(triton::uint64 baseAddr, const void* area, triton::usize size, bool execCallbacks) {
833 this->memory.reserve(size + this->memory.size());
834 for (triton::usize index = 0; index < size; index++) {
835 this->setConcreteMemoryValue(baseAddr+index, reinterpret_cast<const triton::uint8*>(area)[index], execCallbacks);
836 }
837 }
838
839
840 void x86Cpu::setConcreteRegisterValue(const triton::arch::Register& reg, const triton::uint512& value, bool execCallbacks) {
841 if (value > reg.getMaxValue())
842 throw triton::exceptions::Register("x86Cpu::setConcreteRegisterValue(): You cannot set this concrete value (too big) to this register.");
843
844 if (execCallbacks && this->callbacks)
845 this->callbacks->processCallbacks(triton::callbacks::SET_CONCRETE_REGISTER_VALUE, reg, value);
846
847 switch (reg.getId()) {
848
849 case triton::arch::ID_REG_X86_EAX: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->eax, &val, triton::size::dword); break; }
850 case triton::arch::ID_REG_X86_AX: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->eax, &val, triton::size::word); break; }
851 case triton::arch::ID_REG_X86_AH: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)(this->eax+1), &val, triton::size::byte); break; }
852 case triton::arch::ID_REG_X86_AL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->eax, &val, triton::size::byte); break; }
853
854 case triton::arch::ID_REG_X86_EBX: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->ebx, &val, triton::size::dword); break; }
855 case triton::arch::ID_REG_X86_BX: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->ebx, &val, triton::size::word); break; }
856 case triton::arch::ID_REG_X86_BH: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)(this->ebx+1), &val, triton::size::byte); break; }
857 case triton::arch::ID_REG_X86_BL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->ebx, &val, triton::size::byte); break; }
858
859 case triton::arch::ID_REG_X86_ECX: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->ecx, &val, triton::size::dword); break; }
860 case triton::arch::ID_REG_X86_CX: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->ecx, &val, triton::size::word); break; }
861 case triton::arch::ID_REG_X86_CH: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)(this->ecx+1), &val, triton::size::byte); break; }
862 case triton::arch::ID_REG_X86_CL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->ecx, &val, triton::size::byte); break; }
863
864 case triton::arch::ID_REG_X86_EDX: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->edx, &val, triton::size::dword); break; }
865 case triton::arch::ID_REG_X86_DX: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->edx, &val, triton::size::word); break; }
866 case triton::arch::ID_REG_X86_DH: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)(this->edx+1), &val, triton::size::byte); break; }
867 case triton::arch::ID_REG_X86_DL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->edx, &val, triton::size::byte); break; }
868
869 case triton::arch::ID_REG_X86_EDI: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->edi, &val, triton::size::dword); break; }
870 case triton::arch::ID_REG_X86_DI: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->edi, &val, triton::size::word); break; }
871 case triton::arch::ID_REG_X86_DIL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->edi, &val, triton::size::byte); break; }
872
873 case triton::arch::ID_REG_X86_ESI: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->esi, &val, triton::size::dword); break; }
874 case triton::arch::ID_REG_X86_SI: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->esi, &val, triton::size::word); break; }
875 case triton::arch::ID_REG_X86_SIL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->esi, &val, triton::size::byte); break; }
876
877 case triton::arch::ID_REG_X86_ESP: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->esp, &val, triton::size::dword); break; }
878 case triton::arch::ID_REG_X86_SP: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->esp, &val, triton::size::word); break; }
879 case triton::arch::ID_REG_X86_SPL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->esp, &val, triton::size::byte); break; }
880
881 case triton::arch::ID_REG_X86_EBP: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->ebp, &val, triton::size::dword); break; }
882 case triton::arch::ID_REG_X86_BP: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->ebp, &val, triton::size::word); break; }
883 case triton::arch::ID_REG_X86_BPL: { triton::uint8 val = static_cast<triton::uint8>(value); std::memcpy((triton::uint8*)this->ebp, &val, triton::size::byte); break; }
884
885 case triton::arch::ID_REG_X86_EIP: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->eip, &val, triton::size::dword); break; }
886 case triton::arch::ID_REG_X86_IP: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->eip, &val, triton::size::word); break; }
887
888 case triton::arch::ID_REG_X86_EFLAGS: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->eflags, &val, sizeof(triton::uint32)); break; }
889
890 case triton::arch::ID_REG_X86_MM0: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st0, &val, triton::size::qword); break; }
891 case triton::arch::ID_REG_X86_MM1: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st1, &val, triton::size::qword); break; }
892 case triton::arch::ID_REG_X86_MM2: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st2, &val, triton::size::qword); break; }
893 case triton::arch::ID_REG_X86_MM3: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st3, &val, triton::size::qword); break; }
894 case triton::arch::ID_REG_X86_MM4: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st4, &val, triton::size::qword); break; }
895 case triton::arch::ID_REG_X86_MM5: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st5, &val, triton::size::qword); break; }
896 case triton::arch::ID_REG_X86_MM6: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st6, &val, triton::size::qword); break; }
897 case triton::arch::ID_REG_X86_MM7: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->st7, &val, triton::size::qword); break; }
898
899 case triton::arch::ID_REG_X86_ST0: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st0); break; }
900 case triton::arch::ID_REG_X86_ST1: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st1); break; }
901 case triton::arch::ID_REG_X86_ST2: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st2); break; }
902 case triton::arch::ID_REG_X86_ST3: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st3); break; }
903 case triton::arch::ID_REG_X86_ST4: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st4); break; }
904 case triton::arch::ID_REG_X86_ST5: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st5); break; }
905 case triton::arch::ID_REG_X86_ST6: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st6); break; }
906 case triton::arch::ID_REG_X86_ST7: { triton::utils::fromUintToBuffer(triton::utils::cast<triton::uint80>(value), this->st7); break; }
907
908 case triton::arch::ID_REG_X86_XMM0: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm0); break; }
909 case triton::arch::ID_REG_X86_XMM1: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm1); break; }
910 case triton::arch::ID_REG_X86_XMM2: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm2); break; }
911 case triton::arch::ID_REG_X86_XMM3: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm3); break; }
912 case triton::arch::ID_REG_X86_XMM4: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm4); break; }
913 case triton::arch::ID_REG_X86_XMM5: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm5); break; }
914 case triton::arch::ID_REG_X86_XMM6: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm6); break; }
915 case triton::arch::ID_REG_X86_XMM7: { triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->ymm7); break; }
916
917 case triton::arch::ID_REG_X86_YMM0: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm0); break; }
918 case triton::arch::ID_REG_X86_YMM1: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm1); break; }
919 case triton::arch::ID_REG_X86_YMM2: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm2); break; }
920 case triton::arch::ID_REG_X86_YMM3: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm3); break; }
921 case triton::arch::ID_REG_X86_YMM4: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm4); break; }
922 case triton::arch::ID_REG_X86_YMM5: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm5); break; }
923 case triton::arch::ID_REG_X86_YMM6: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm6); break; }
924 case triton::arch::ID_REG_X86_YMM7: { triton::utils::fromUintToBuffer(static_cast<triton::uint256>(value), this->ymm7); break; }
925
926 case triton::arch::ID_REG_X86_MXCSR: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->mxcsr, &val, sizeof(triton::uint32)); break; }
927 case triton::arch::ID_REG_X86_MXCSR_MASK: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->mxcsr_mask, &val, sizeof(triton::uint32)); break; }
928
929 case triton::arch::ID_REG_X86_CR0: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr0, &val, triton::size::dword); break; }
930 case triton::arch::ID_REG_X86_CR1: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr1, &val, triton::size::dword); break; }
931 case triton::arch::ID_REG_X86_CR2: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr2, &val, triton::size::dword); break; }
932 case triton::arch::ID_REG_X86_CR3: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr3, &val, triton::size::dword); break; }
933 case triton::arch::ID_REG_X86_CR4: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr4, &val, triton::size::dword); break; }
934 case triton::arch::ID_REG_X86_CR5: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr5, &val, triton::size::dword); break; }
935 case triton::arch::ID_REG_X86_CR6: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr6, &val, triton::size::dword); break; }
936 case triton::arch::ID_REG_X86_CR7: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr7, &val, triton::size::dword); break; }
937 case triton::arch::ID_REG_X86_CR8: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr8, &val, triton::size::dword); break; }
938 case triton::arch::ID_REG_X86_CR9: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr9, &val, triton::size::dword); break; }
939 case triton::arch::ID_REG_X86_CR10: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr10, &val, triton::size::dword); break; }
940 case triton::arch::ID_REG_X86_CR11: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr11, &val, triton::size::dword); break; }
941 case triton::arch::ID_REG_X86_CR12: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr12, &val, triton::size::dword); break; }
942 case triton::arch::ID_REG_X86_CR13: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr13, &val, triton::size::dword); break; }
943 case triton::arch::ID_REG_X86_CR14: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr14, &val, triton::size::dword); break; }
944 case triton::arch::ID_REG_X86_CR15: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cr15, &val, triton::size::dword); break; }
945
946 case triton::arch::ID_REG_X86_DR0: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->dr0, &val, triton::size::dword); break; }
947 case triton::arch::ID_REG_X86_DR1: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->dr1, &val, triton::size::dword); break; }
948 case triton::arch::ID_REG_X86_DR2: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->dr2, &val, triton::size::dword); break; }
949 case triton::arch::ID_REG_X86_DR3: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->dr3, &val, triton::size::dword); break; }
950 case triton::arch::ID_REG_X86_DR6: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->dr6, &val, triton::size::dword); break; }
951 case triton::arch::ID_REG_X86_DR7: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->dr7, &val, triton::size::dword); break; }
952
953 case triton::arch::ID_REG_X86_SSE_IE: {
954 triton::uint32 flag = 0;
955 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
956 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
957 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
958 break;
959 }
960
961 case triton::arch::ID_REG_X86_SSE_DE: {
962 triton::uint32 flag = 0;
963 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
964 flag = !value.is_zero() ? (flag | (1 << 1)) : (flag & ~(1 << 1));
965 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
966 break;
967 }
968
969 case triton::arch::ID_REG_X86_SSE_ZE: {
970 triton::uint32 flag = 0;
971 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
972 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
973 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
974 break;
975 }
976
977 case triton::arch::ID_REG_X86_SSE_OE: {
978 triton::uint32 flag = 0;
979 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
980 flag = !value.is_zero() ? (flag | (1 << 3)) : (flag & ~(1 << 3));
981 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
982 break;
983 }
984
985 case triton::arch::ID_REG_X86_SSE_UE: {
986 triton::uint32 flag = 0;
987 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
988 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
989 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
990 break;
991 }
992
993 case triton::arch::ID_REG_X86_SSE_PE: {
994 triton::uint32 flag = 0;
995 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
996 flag = !value.is_zero() ? (flag | (1 << 5)) : (flag & ~(1 << 5));
997 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
998 break;
999 }
1000
1001 case triton::arch::ID_REG_X86_SSE_DAZ: {
1002 triton::uint32 flag = 0;
1003 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1004 flag = !value.is_zero() ? (flag | (1 << 6)) : (flag & ~(1 << 6));
1005 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1006 break;
1007 }
1008
1009 case triton::arch::ID_REG_X86_SSE_IM: {
1010 triton::uint32 flag = 0;
1011 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1012 flag = !value.is_zero() ? (flag | (1 << 7)) : (flag & ~(1 << 7));
1013 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1014 break;
1015 }
1016
1017 case triton::arch::ID_REG_X86_SSE_DM: {
1018 triton::uint32 flag = 0;
1019 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1020 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1021 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1022 break;
1023 }
1024
1025 case triton::arch::ID_REG_X86_SSE_ZM: {
1026 triton::uint32 flag = 0;
1027 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1028 flag = !value.is_zero() ? (flag | (1 << 9)) : (flag & ~(1 << 9));
1029 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1030 break;
1031 }
1032
1033 case triton::arch::ID_REG_X86_SSE_OM: {
1034 triton::uint32 flag = 0;
1035 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1036 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1037 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1038 break;
1039 }
1040
1041 case triton::arch::ID_REG_X86_SSE_UM: {
1042 triton::uint32 flag = 0;
1043 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1044 flag = !value.is_zero() ? (flag | (1 << 11)) : (flag & ~(1 << 11));
1045 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1046 break;
1047 }
1048
1049 case triton::arch::ID_REG_X86_SSE_PM: {
1050 triton::uint32 flag = 0;
1051 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1052 flag = !value.is_zero() ? (flag | (1 << 12)) : (flag & ~(1 << 12));
1053 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1054 break;
1055 }
1056
1057 case triton::arch::ID_REG_X86_SSE_RL: {
1058 triton::uint32 flag = 0;
1059 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1060 flag = !value.is_zero() ? (flag | (1 << 13)) : (flag & ~(1 << 13));
1061 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1062 break;
1063 }
1064
1065 case triton::arch::ID_REG_X86_SSE_RH: {
1066 triton::uint32 flag = 0;
1067 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1068 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1069 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1070 break;
1071 }
1072
1073 case triton::arch::ID_REG_X86_SSE_FZ: {
1074 triton::uint32 flag = 0;
1075 std::memcpy(&flag, (triton::uint32*)this->mxcsr, sizeof(triton::uint32));
1076 flag = !value.is_zero() ? (flag | (1 << 15)) : (flag & ~(1 << 15));
1077 std::memcpy((triton::uint32*)this->mxcsr, &flag, sizeof(triton::uint32));
1078 break;
1079 }
1080
1081 case triton::arch::ID_REG_X86_CF: {
1082 triton::uint32 flag = 0;
1083 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1084 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1085 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1086 break;
1087 }
1088
1089 case triton::arch::ID_REG_X86_PF: {
1090 triton::uint32 flag = 0;
1091 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1092 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1093 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1094 break;
1095 }
1096
1097 case triton::arch::ID_REG_X86_AF: {
1098 triton::uint32 flag = 0;
1099 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1100 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1101 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1102 break;
1103 }
1104
1105 case triton::arch::ID_REG_X86_ZF: {
1106 triton::uint32 flag = 0;
1107 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1108 flag = !value.is_zero() ? (flag | (1 << 6)) : (flag & ~(1 << 6));
1109 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1110 break;
1111 }
1112
1113 case triton::arch::ID_REG_X86_SF: {
1114 triton::uint32 flag = 0;
1115 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1116 flag = !value.is_zero() ? (flag | (1 << 7)) : (flag & ~(1 << 7));
1117 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1118 break;
1119 }
1120
1121 case triton::arch::ID_REG_X86_TF: {
1122 triton::uint32 flag = 0;
1123 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1124 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1125 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1126 break;
1127 }
1128
1129 case triton::arch::ID_REG_X86_IF: {
1130 triton::uint32 flag = 0;
1131 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1132 flag = !value.is_zero() ? (flag | (1 << 9)) : (flag & ~(1 << 9));
1133 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1134 break;
1135 }
1136
1137 case triton::arch::ID_REG_X86_DF: {
1138 triton::uint32 flag = 0;
1139 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1140 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1141 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1142 break;
1143 }
1144
1145 case triton::arch::ID_REG_X86_OF: {
1146 triton::uint32 flag = 0;
1147 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1148 flag = !value.is_zero() ? (flag | (1 << 11)) : (flag & ~(1 << 11));
1149 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1150 break;
1151 }
1152
1153 case triton::arch::ID_REG_X86_NT: {
1154 triton::uint32 flag = 0;
1155 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1156 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1157 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1158 break;
1159 }
1160
1161 case triton::arch::ID_REG_X86_RF: {
1162 triton::uint32 flag = 0;
1163 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1164 flag = !value.is_zero() ? (flag | (1 << 16)) : (flag & ~(1 << 16));
1165 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1166 break;
1167 }
1168
1169 case triton::arch::ID_REG_X86_VM: {
1170 triton::uint32 flag = 0;
1171 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1172 flag = !value.is_zero() ? (flag | (1 << 17)) : (flag & ~(1 << 17));
1173 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1174 break;
1175 }
1176
1177 case triton::arch::ID_REG_X86_AC: {
1178 triton::uint32 flag = 0;
1179 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1180 flag = !value.is_zero() ? (flag | (1 << 18)) : (flag & ~(1 << 18));
1181 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1182 break;
1183 }
1184
1185 case triton::arch::ID_REG_X86_VIF: {
1186 triton::uint32 flag = 0;
1187 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1188 flag = !value.is_zero() ? (flag | (1 << 19)) : (flag & ~(1 << 19));
1189 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1190 break;
1191 }
1192
1193 case triton::arch::ID_REG_X86_VIP: {
1194 triton::uint32 flag = 0;
1195 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1196 flag = !value.is_zero() ? (flag | (1 << 20)) : (flag & ~(1 << 20));
1197 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1198 break;
1199 }
1200
1201 case triton::arch::ID_REG_X86_ID: {
1202 triton::uint32 flag = 0;
1203 std::memcpy(&flag, (triton::uint32*)this->eflags, sizeof(triton::uint32));
1204 flag = !value.is_zero() ? (flag | (1 << 21)) : (flag & ~(1 << 21));
1205 std::memcpy((triton::uint32*)this->eflags, &flag, sizeof(triton::uint32));
1206 break;
1207 }
1208
1209 case triton::arch::ID_REG_X86_CS: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->cs, &val, triton::size::dword); break; }
1210 case triton::arch::ID_REG_X86_DS: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->ds, &val, triton::size::dword); break; }
1211 case triton::arch::ID_REG_X86_ES: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->es, &val, triton::size::dword); break; }
1212 case triton::arch::ID_REG_X86_FS: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->fs, &val, triton::size::dword); break; }
1213 case triton::arch::ID_REG_X86_GS: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->gs, &val, triton::size::dword); break; }
1214 case triton::arch::ID_REG_X86_SS: { triton::uint32 val = static_cast<triton::uint32>(value); std::memcpy((triton::uint32*)this->ss, &val, triton::size::dword); break; }
1215
1216 case triton::arch::ID_REG_X86_FIP: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->fip, &val, sizeof(triton::uint64)); break; }
1217 case triton::arch::ID_REG_X86_FDP: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->fdp, &val, sizeof(triton::uint64)); break; }
1218 case triton::arch::ID_REG_X86_FCW: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->fcw, &val, sizeof(triton::uint16)); break; }
1219 case triton::arch::ID_REG_X86_FSW: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->fsw, &val, sizeof(triton::uint16)); break; }
1220 case triton::arch::ID_REG_X86_FOP: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->fop, &val, sizeof(triton::uint16)); break; }
1221 case triton::arch::ID_REG_X86_FCS: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->fcs, &val, sizeof(triton::uint16)); break; }
1222 case triton::arch::ID_REG_X86_FDS: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->fds, &val, sizeof(triton::uint16)); break; }
1223 case triton::arch::ID_REG_X86_FTW: { triton::uint16 val = static_cast<triton::uint16>(value); std::memcpy((triton::uint16*)this->ftw, &val, sizeof(triton::uint16)); break; }
1224
1225 case triton::arch::ID_REG_X86_FCW_IM: { triton::uint16 flag = 0;
1226 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1227 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1228 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1229 break;
1230 }
1231
1232 case triton::arch::ID_REG_X86_FCW_DM: { triton::uint16 flag = 0;
1233 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1234 flag = !value.is_zero() ? (flag | (1 << 1)) : (flag & ~(1 << 1));
1235 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1236 break;
1237 }
1238
1239 case triton::arch::ID_REG_X86_FCW_ZM: { triton::uint16 flag = 0;
1240 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1241 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1242 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1243 break;
1244 }
1245
1246 case triton::arch::ID_REG_X86_FCW_OM: { triton::uint16 flag = 0;
1247 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1248 flag = !value.is_zero() ? (flag | (1 << 3)) : (flag & ~(1 << 3));
1249 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1250 break;
1251 }
1252
1253 case triton::arch::ID_REG_X86_FCW_UM: { triton::uint16 flag = 0;
1254 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1255 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1256 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1257 break;
1258 }
1259
1260 case triton::arch::ID_REG_X86_FCW_PM: { triton::uint16 flag = 0;
1261 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1262 flag = !value.is_zero() ? (flag | (1 << 5)) : (flag & ~(1 << 5));
1263 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1264 break;
1265 }
1266
1267 case triton::arch::ID_REG_X86_FCW_PC: { triton::uint16 flag = 0;
1268 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1269 flag = (flag & 0xFCFF) | (static_cast<triton::uint16>(value) << 8);
1270 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1271 break;
1272 }
1273
1274 case triton::arch::ID_REG_X86_FCW_RC: { triton::uint16 flag = 0;
1275 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1276 flag = (flag & 0xF3FF) | (static_cast<triton::uint16>(value) << 10);
1277 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1278 break;
1279 }
1280
1281 case triton::arch::ID_REG_X86_FCW_X: { triton::uint16 flag = 0;
1282 std::memcpy(&flag, (triton::uint16*)this->fcw, sizeof(triton::uint16));
1283 flag = !value.is_zero() ? (flag | (1 << 12)) : (flag & ~(1 << 12));
1284 std::memcpy((triton::uint16*)this->fcw, &flag, sizeof(triton::uint16));
1285 break;
1286 }
1287
1288 case triton::arch::ID_REG_X86_FSW_IE: {
1289 triton::uint16 flag = 0;
1290 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1291 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1292 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1293 break;
1294 }
1295
1296 case triton::arch::ID_REG_X86_FSW_DE: {
1297 triton::uint16 flag = 0;
1298 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1299 flag = !value.is_zero() ? (flag | (1 << 1)) : (flag & ~(1 << 1));
1300 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1301 break;
1302 }
1303
1304 case triton::arch::ID_REG_X86_FSW_ZE: {
1305 triton::uint16 flag = 0;
1306 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1307 flag = !value.is_zero() ? (flag | (1 << 2)) : (flag & ~(1 << 2));
1308 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1309 break;
1310 }
1311
1312 case triton::arch::ID_REG_X86_FSW_OE: {
1313 triton::uint16 flag = 0;
1314 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1315 flag = !value.is_zero() ? (flag | (1 << 3)) : (flag & ~(1 << 3));
1316 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1317 break;
1318 }
1319
1320 case triton::arch::ID_REG_X86_FSW_UE: {
1321 triton::uint16 flag = 0;
1322 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1323 flag = !value.is_zero() ? (flag | (1 << 4)) : (flag & ~(1 << 4));
1324 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1325 break;
1326 }
1327
1328 case triton::arch::ID_REG_X86_FSW_PE: {
1329 triton::uint16 flag = 0;
1330 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1331 flag = !value.is_zero() ? (flag | (1 << 5)) : (flag & ~(1 << 5));
1332 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1333 break;
1334 }
1335
1336 case triton::arch::ID_REG_X86_FSW_SF: {
1337 triton::uint16 flag = 0;
1338 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1339 flag = !value.is_zero() ? (flag | (1 << 6)) : (flag & ~(1 << 6));
1340 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1341 break;
1342 }
1343
1344 case triton::arch::ID_REG_X86_FSW_ES: {
1345 triton::uint16 flag = 0;
1346 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1347 flag = !value.is_zero() ? (flag | (1 << 7)) : (flag & ~(1 << 7));
1348 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1349 break;
1350 }
1351
1352 case triton::arch::ID_REG_X86_FSW_C0: {
1353 triton::uint16 flag = 0;
1354 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1355 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1356 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1357 break;
1358 }
1359
1360 case triton::arch::ID_REG_X86_FSW_C1: {
1361 triton::uint16 flag = 0;
1362 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1363 flag = !value.is_zero() ? (flag | (1 << 9)) : (flag & ~(1 << 9));
1364 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1365 break;
1366 }
1367
1368 case triton::arch::ID_REG_X86_FSW_C2: {
1369 triton::uint16 flag = 0;
1370 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1371 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1372 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1373 break;
1374 }
1375
1376 case triton::arch::ID_REG_X86_FSW_TOP: {
1377 triton::uint16 flag = 0;
1378 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1379 flag = (flag & 0xC7FF) | (static_cast<triton::uint16>(value) << 11);
1380 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1381 break;
1382 }
1383
1384 case triton::arch::ID_REG_X86_FSW_C3: {
1385 triton::uint16 flag = 0;
1386 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1387 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1388 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1389 break;
1390 }
1391
1392 case triton::arch::ID_REG_X86_FSW_B: {
1393 triton::uint16 flag = 0;
1394 std::memcpy(&flag, (triton::uint16*)this->fsw, sizeof(triton::uint16));
1395 flag = !value.is_zero() ? (flag | (1 << 15)) : (flag & ~(1 << 15));
1396 std::memcpy((triton::uint16*)this->fsw, &flag, sizeof(triton::uint16));
1397 break;
1398 }
1399
1400 case triton::arch::ID_REG_X86_EFER_SCE: { triton::uint64 flag = 0;
1401 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1402 flag = !value.is_zero() ? (flag | (1 << 0)) : (flag & ~(1 << 0));
1403 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1404 break;
1405 }
1406
1407 case triton::arch::ID_REG_X86_EFER_LME: { triton::uint64 flag = 0;
1408 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1409 flag = !value.is_zero() ? (flag | (1 << 8)) : (flag & ~(1 << 8));
1410 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1411 break;
1412 }
1413
1414 case triton::arch::ID_REG_X86_EFER_LMA: { triton::uint64 flag = 0;
1415 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1416 flag = !value.is_zero() ? (flag | (1 << 10)) : (flag & ~(1 << 10));
1417 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1418 break;
1419 }
1420
1421 case triton::arch::ID_REG_X86_EFER_NXE: { triton::uint64 flag = 0;
1422 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1423 flag = !value.is_zero() ? (flag | (1 << 11)) : (flag & ~(1 << 11));
1424 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1425 break;
1426 }
1427
1428 case triton::arch::ID_REG_X86_EFER_SVME: { triton::uint64 flag = 0;
1429 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1430 flag = !value.is_zero() ? (flag | (1 << 12)) : (flag & ~(1 << 12));
1431 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1432 break;
1433 }
1434
1435 case triton::arch::ID_REG_X86_EFER_LMSLE: { triton::uint64 flag = 0;
1436 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1437 flag = !value.is_zero() ? (flag | (1 << 13)) : (flag & ~(1 << 13));
1438 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1439 break;
1440 }
1441
1442 case triton::arch::ID_REG_X86_EFER_FFXSR: { triton::uint64 flag = 0;
1443 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1444 flag = !value.is_zero() ? (flag | (1 << 14)) : (flag & ~(1 << 14));
1445 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1446 break;
1447 }
1448
1449 case triton::arch::ID_REG_X86_EFER_TCE: { triton::uint64 flag = 0;
1450 std::memcpy(&flag, (triton::uint64*)this->efer, sizeof(triton::uint64));
1451 flag = !value.is_zero() ? (flag | (1 << 15)) : (flag & ~(1 << 15));
1452 std::memcpy((triton::uint64*)this->efer, &flag, sizeof(triton::uint64));
1453 break;
1454 }
1455
1456 case triton::arch::ID_REG_X86_EFER: {
1457 triton::uint64 val = static_cast<triton::uint64>(value);
1458 std::memcpy((triton::uint64*)this->efer, &val, sizeof(triton::uint64));
1459 break;
1460 }
1461
1462 case triton::arch::ID_REG_X86_TSC: { triton::uint64 val = static_cast<triton::uint64>(value); std::memcpy((triton::uint64*)this->tsc, &val, triton::size::qword); break; }
1463
1464 default:
1465 throw triton::exceptions::Cpu("x86Cpu:setConcreteRegisterValue() - Invalid register.");
1466 }
1467 }
1468
1469
1470 bool x86Cpu::isThumb(void) const {
1471 /* There is no thumb mode in x86 */
1472 return false;
1473 }
1474
1475
1476 void x86Cpu::setThumb(bool state) {
1477 /* There is no thumb mode in x86 */
1478 }
1479
1480
1481 bool x86Cpu::isMemoryExclusive(const triton::arch::MemoryAccess& mem) const {
1482 /* There is no exclusive memory access support in x86 */
1483 return false;
1484 }
1485
1486
1487 void x86Cpu::setMemoryExclusiveTag(const triton::arch::MemoryAccess& mem, bool tag) {
1488 /* There is no exclusive memory access support in x86 */
1489 }
1490
1491
1495
1496
1497 bool x86Cpu::isConcreteMemoryValueDefined(triton::uint64 baseAddr, triton::usize size) const {
1498 for (triton::usize index = 0; index < size; index++) {
1499 if (this->memory.find(baseAddr + index) == this->memory.end()) {
1500 return false;
1501 }
1502 }
1503 return true;
1504 }
1505
1506
1510
1511
1512 void x86Cpu::clearConcreteMemoryValue(triton::uint64 baseAddr, triton::usize size) {
1513 for (triton::usize index = 0; index < size; index++) {
1514 if (this->memory.find(baseAddr + index) != this->memory.end()) {
1515 this->memory.erase(baseAddr + index);
1516 }
1517 }
1518 }
1519
1520 }; /* x86 namespace */
1521 }; /* arch namespace */
1522}; /* triton namespace */
math::wide_integer::uintwide_t
Definition uintwide_t.h:1274
triton::arch::BitsVector::getMaxValue
TRITON_EXPORT triton::uint512 getMaxValue(void) const
Returns the max possible value of the bitvector.
Definition bitsVector.cpp:49
triton::arch::BitsVector::setBits
TRITON_EXPORT void setBits(triton::uint32 high, triton::uint32 low)
Sets the bits (high, low) position.
Definition bitsVector.cpp:72
triton::arch::Immediate
This class is used to represent an immediate.
Definition immediate.hpp:37
triton::arch::Instruction
This class is used to represent an instruction.
Definition instruction.hpp:48
triton::arch::Instruction::getSize
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size of the instruction.
Definition instruction.cpp:147
triton::arch::Instruction::setDisassembly
TRITON_EXPORT void setDisassembly(const std::string &str)
Sets the disassembly of the instruction.
Definition instruction.cpp:337
triton::arch::Instruction::getOpcode
TRITON_EXPORT const triton::uint8 * getOpcode(void) const
Returns the opcode of the instruction.
Definition instruction.cpp:134
triton::arch::Instruction::setType
TRITON_EXPORT void setType(triton::uint32 type)
Sets the type of the instruction.
Definition instruction.cpp:307
triton::arch::Instruction::setPrefix
TRITON_EXPORT void setPrefix(triton::arch::x86::prefix_e prefix)
Sets the prefix of the instruction (mainly for X86).
Definition instruction.cpp:312
triton::arch::Instruction::setAddress
TRITON_EXPORT void setAddress(triton::uint64 addr)
Sets the address of the instruction.
Definition instruction.cpp:124
triton::arch::Instruction::setArchitecture
TRITON_EXPORT void setArchitecture(triton::arch::architecture_e arch)
Sets the instruction's architecture.
Definition instruction.cpp:297
triton::arch::Instruction::getAddress
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the instruction.
Definition instruction.cpp:114
triton::arch::Instruction::setBranch
TRITON_EXPORT void setBranch(bool flag)
Sets flag to define this instruction as branch or not.
Definition instruction.cpp:504
triton::arch::Instruction::setSize
TRITON_EXPORT void setSize(triton::uint32 size)
Sets the size of the instruction.
Definition instruction.cpp:302
triton::arch::Instruction::operands
std::vector< triton::arch::OperandWrapper > operands
A list of operands.
Definition instruction.hpp:122
triton::arch::Instruction::setControlFlow
TRITON_EXPORT void setControlFlow(bool flag)
Sets flag to define this instruction changes the control flow or not.
Definition instruction.cpp:509
triton::arch::Instruction::getNextAddress
TRITON_EXPORT triton::uint64 getNextAddress(void) const
Returns the next address of the instruction.
Definition instruction.cpp:119
triton::arch::MemoryAccess
This class is used to represent a memory access.
Definition memoryAccess.hpp:40
triton::arch::MemoryAccess::setDisplacement
TRITON_EXPORT void setDisplacement(const triton::arch::Immediate &displacement)
LEA - Sets the displacement operand.
Definition memoryAccess.cpp:163
triton::arch::MemoryAccess::setScale
TRITON_EXPORT void setScale(const triton::arch::Immediate &scale)
LEA - Sets the scale operand.
Definition memoryAccess.cpp:168
triton::arch::MemoryAccess::getAddress
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the memory.
Definition memoryAccess.cpp:51
triton::arch::MemoryAccess::setPcRelative
TRITON_EXPORT void setPcRelative(triton::uint64 addr)
LEA - Sets pc relative.
Definition memoryAccess.cpp:143
triton::arch::MemoryAccess::getSize
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the memory vector.
Definition memoryAccess.cpp:71
triton::arch::MemoryAccess::setIndexRegister
TRITON_EXPORT void setIndexRegister(const triton::arch::Register &index)
LEA - Sets the index register operand.
Definition memoryAccess.cpp:158
triton::arch::MemoryAccess::setSegmentRegister
TRITON_EXPORT void setSegmentRegister(const triton::arch::Register &segment)
LEA - Sets the segment register operand.
Definition memoryAccess.cpp:148
triton::arch::MemoryAccess::setBaseRegister
TRITON_EXPORT void setBaseRegister(const triton::arch::Register &base)
LEA - Sets the base register operand.
Definition memoryAccess.cpp:153
triton::arch::OperandWrapper
This class is used as operand wrapper.
Definition operandWrapper.hpp:38
triton::arch::Register
This class is used when an instruction has a register operand.
Definition register.hpp:44
triton::arch::Register::getParent
TRITON_EXPORT triton::arch::register_e getParent(void) const
Returns the parent id of the register.
Definition register.cpp:58
triton::arch::Register::getId
TRITON_EXPORT triton::arch::register_e getId(void) const
Returns the id of the register.
Definition register.cpp:53
triton::arch::Register::getSize
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the register.
Definition register.cpp:68
triton::arch::x86::x86Cpu
This class is used to describe the x86 (32-bits) spec.
Definition x86Cpu.hpp:53
triton::arch::x86::x86Cpu::cr5
triton::uint8 cr5[triton::size::dword]
Concrete value of cr5.
Definition x86Cpu.hpp:144
triton::arch::x86::x86Cpu::dr2
triton::uint8 dr2[triton::size::dword]
Condete value of dr2.
Definition x86Cpu.hpp:182
triton::arch::x86::x86Cpu::dr1
triton::uint8 dr1[triton::size::dword]
Condete value of dr1.
Definition x86Cpu.hpp:180
triton::arch::x86::x86Cpu::efer
triton::uint8 efer[triton::size::qword]
Concrete value of the EFER MSR Register.
Definition x86Cpu.hpp:206
triton::arch::x86::x86Cpu::st1
triton::uint8 st1[triton::size::fword]
Concrete value of st1.
Definition x86Cpu.hpp:104
triton::arch::x86::x86Cpu::dr7
triton::uint8 dr7[triton::size::dword]
Condete value of dr7.
Definition x86Cpu.hpp:188
triton::arch::x86::x86Cpu::tsc
triton::uint8 tsc[triton::size::qword]
Concrete value of the TSC Register.
Definition x86Cpu.hpp:212
triton::arch::x86::x86Cpu::gprSize
TRITON_EXPORT triton::uint32 gprSize(void) const
Returns the bit in byte of the General Purpose Registers.
Definition x86Cpu.cpp:317
triton::arch::x86::x86Cpu::gs
triton::uint8 gs[triton::size::dword]
Concrete value of GS.
Definition x86Cpu.hpp:174
triton::arch::x86::x86Cpu::isRegister
TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const
Returns true if the register ID is a register.
Definition x86Cpu.cpp:229
triton::arch::x86::x86Cpu::setConcreteRegisterValue
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register &reg, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
Definition x86Cpu.cpp:840
triton::arch::x86::x86Cpu::isSTX
TRITON_EXPORT bool isSTX(triton::arch::register_e regId) const
Returns true if regId is a STX register.
Definition x86Cpu.cpp:262
triton::arch::x86::x86Cpu::dr3
triton::uint8 dr3[triton::size::dword]
Condete value of dr3.
Definition x86Cpu.hpp:184
triton::arch::x86::x86Cpu::getConcreteMemoryAreaValue
TRITON_EXPORT std::vector< triton::uint8 > getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
Returns the concrete value of a memory area.
Definition x86Cpu.cpp:579
triton::arch::x86::x86Cpu::disassembly
TRITON_EXPORT void disassembly(triton::arch::Instruction &inst)
Disassembles the instruction according to the architecture.
Definition x86Cpu.cpp:432
triton::arch::x86::x86Cpu::~x86Cpu
virtual TRITON_EXPORT ~x86Cpu()
Destructor.
Definition x86Cpu.cpp:40
triton::arch::x86::x86Cpu::cr9
triton::uint8 cr9[triton::size::dword]
Concrete value of cr9.
Definition x86Cpu.hpp:152
triton::arch::x86::x86Cpu::mxcsr
triton::uint8 mxcsr[triton::size::dword]
Concrete value of the SSE Register State.
Definition x86Cpu.hpp:208
triton::arch::x86::x86Cpu::st7
triton::uint8 st7[triton::size::fword]
Concrete value of st7.
Definition x86Cpu.hpp:116
triton::arch::x86::x86Cpu::fds
triton::uint8 fds[triton::size::word]
Concrete value of the x87 FPU Instruction Operand Pointer Selector.
Definition x86Cpu.hpp:204
triton::arch::x86::x86Cpu::ebx
triton::uint8 ebx[triton::size::dword]
Concrete value of ebx.
Definition x86Cpu.hpp:84
triton::arch::x86::x86Cpu::fdp
triton::uint8 fdp[triton::size::qword]
Concrete value of the x87 FPU Instruction Operand Pointer Offset.
Definition x86Cpu.hpp:202
triton::arch::x86::x86Cpu::st6
triton::uint8 st6[triton::size::fword]
Concrete value of st6.
Definition x86Cpu.hpp:114
triton::arch::x86::x86Cpu::isSegment
TRITON_EXPORT bool isSegment(triton::arch::register_e regId) const
Returns true if regId is a Segment.
Definition x86Cpu.cpp:307
triton::arch::x86::x86Cpu::x86Cpu
TRITON_EXPORT x86Cpu(triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
Definition x86Cpu.cpp:26
triton::arch::x86::x86Cpu::isEFER
TRITON_EXPORT bool isEFER(triton::arch::register_e regId) const
Returns true if regId is an EFER register.
Definition x86Cpu.cpp:282
triton::arch::x86::x86Cpu::st4
triton::uint8 st4[triton::size::fword]
Concrete value of st4.
Definition x86Cpu.hpp:110
triton::arch::x86::x86Cpu::gprBitSize
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
Definition x86Cpu.cpp:322
triton::arch::x86::x86Cpu::getEndianness
TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const
Returns the kind of endianness as triton::arch::endianness_e.
Definition x86Cpu.cpp:214
triton::arch::x86::x86Cpu::setMemoryExclusiveTag
TRITON_EXPORT void setMemoryExclusiveTag(const triton::arch::MemoryAccess &mem, bool tag)
Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
Definition x86Cpu.cpp:1487
triton::arch::x86::x86Cpu::fop
triton::uint8 fop[triton::size::word]
Concrete value of the x87 FPU Opcode.
Definition x86Cpu.hpp:196
triton::arch::x86::x86Cpu::cr7
triton::uint8 cr7[triton::size::dword]
Concrete value of cr7.
Definition x86Cpu.hpp:148
triton::arch::x86::x86Cpu::ebp
triton::uint8 ebp[triton::size::dword]
Concrete value of ebp.
Definition x86Cpu.hpp:94
triton::arch::x86::x86Cpu::isAVX256
TRITON_EXPORT bool isAVX256(triton::arch::register_e regId) const
Returns true if regId is a AVX-256 (YMM) register.
Definition x86Cpu.cpp:292
triton::arch::x86::x86Cpu::ymm3
triton::uint8 ymm3[triton::size::qqword]
Concrete value of ymm3.
Definition x86Cpu.hpp:124
triton::arch::x86::x86Cpu::cr13
triton::uint8 cr13[triton::size::dword]
Concrete value of cr13.
Definition x86Cpu.hpp:160
triton::arch::x86::x86Cpu::getProgramCounter
TRITON_EXPORT const triton::arch::Register & getProgramCounter(void) const
Returns the program counter register.
Definition x86Cpu.cpp:422
triton::arch::x86::x86Cpu::isControl
TRITON_EXPORT bool isControl(triton::arch::register_e regId) const
Returns true if regId is a control (cr) register.
Definition x86Cpu.cpp:297
triton::arch::x86::x86Cpu::numberOfRegisters
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
Definition x86Cpu.cpp:312
triton::arch::x86::x86Cpu::ftw
triton::uint8 ftw[triton::size::word]
Concrete value of the x87 FPU Tag Word.
Definition x86Cpu.hpp:194
triton::arch::x86::x86Cpu::fcw
triton::uint8 fcw[triton::size::word]
Concrete value of the x87 FPU Control Word.
Definition x86Cpu.hpp:190
triton::arch::x86::x86Cpu::isSSE
TRITON_EXPORT bool isSSE(triton::arch::register_e regId) const
Returns true if regId is a SSE register.
Definition x86Cpu.cpp:267
triton::arch::x86::x86Cpu::st5
triton::uint8 st5[triton::size::fword]
Concrete value of st5.
Definition x86Cpu.hpp:112
triton::arch::x86::x86Cpu::fsw
triton::uint8 fsw[triton::size::word]
Concrete value of the x87 FPU Status Word.
Definition x86Cpu.hpp:192
triton::arch::x86::x86Cpu::isGPR
TRITON_EXPORT bool isGPR(triton::arch::register_e regId) const
Returns true if regId is a GRP.
Definition x86Cpu.cpp:252
triton::arch::x86::x86Cpu::ymm4
triton::uint8 ymm4[triton::size::qqword]
Concrete value of ymm4.
Definition x86Cpu.hpp:126
triton::arch::x86::x86Cpu::ymm7
triton::uint8 ymm7[triton::size::qqword]
Concrete value of ymm7.
Definition x86Cpu.hpp:132
triton::arch::x86::x86Cpu::cs
triton::uint8 cs[triton::size::dword]
Concrete value of CS.
Definition x86Cpu.hpp:166
triton::arch::x86::x86Cpu::operator=
TRITON_EXPORT x86Cpu & operator=(const x86Cpu &other)
Copies a x86Cpu class.
Definition x86Cpu.cpp:208
triton::arch::x86::x86Cpu::esi
triton::uint8 esi[triton::size::dword]
Concrete value of esi.
Definition x86Cpu.hpp:92
triton::arch::x86::x86Cpu::ds
triton::uint8 ds[triton::size::dword]
Concrete value of DS.
Definition x86Cpu.hpp:168
triton::arch::x86::x86Cpu::isTSC
TRITON_EXPORT bool isTSC(triton::arch::register_e regId) const
Returns true if regId is an TSC register.
Definition x86Cpu.cpp:287
triton::arch::x86::x86Cpu::mxcsr_mask
triton::uint8 mxcsr_mask[triton::size::dword]
Concrete value of the SSE Register State Mask.
Definition x86Cpu.hpp:210
triton::arch::x86::x86Cpu::setConcreteMemoryValue
TRITON_EXPORT void setConcreteMemoryValue(const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of memory cells.
Definition x86Cpu.cpp:803
triton::arch::x86::x86Cpu::getParentRegisters
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters(void) const
Returns all parent registers.
Definition x86Cpu.cpp:337
triton::arch::x86::x86Cpu::clearConcreteMemoryValue
TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess &mem)
Clears concrete values assigned to the memory cells.
Definition x86Cpu.cpp:1507
triton::arch::x86::x86Cpu::ymm0
triton::uint8 ymm0[triton::size::qqword]
Concrete value of ymm0.
Definition x86Cpu.hpp:118
triton::arch::x86::x86Cpu::edi
triton::uint8 edi[triton::size::dword]
Concrete value of edi.
Definition x86Cpu.hpp:90
triton::arch::x86::x86Cpu::cr4
triton::uint8 cr4[triton::size::dword]
Concrete value of cr4.
Definition x86Cpu.hpp:142
triton::arch::x86::x86Cpu::setThumb
TRITON_EXPORT void setThumb(bool state)
Sets CPU state to Thumb mode.
Definition x86Cpu.cpp:1476
triton::arch::x86::x86Cpu::fcs
triton::uint8 fcs[triton::size::word]
Concrete value of the x87 FPU Instruction Pointer Selector.
Definition x86Cpu.hpp:200
triton::arch::x86::x86Cpu::getConcreteMemoryValue
TRITON_EXPORT triton::uint512 getConcreteMemoryValue(const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const
Returns the concrete value of memory cells.
Definition x86Cpu.cpp:558
triton::arch::x86::x86Cpu::ss
triton::uint8 ss[triton::size::dword]
Concrete value of SS.
Definition x86Cpu.hpp:176
triton::arch::x86::x86Cpu::getParentRegister
TRITON_EXPORT const triton::arch::Register & getParentRegister(const triton::arch::Register &reg) const
Returns parent register from a given one.
Definition x86Cpu.cpp:412
triton::arch::x86::x86Cpu::es
triton::uint8 es[triton::size::dword]
Concrete value of ES.
Definition x86Cpu.hpp:170
triton::arch::x86::x86Cpu::st2
triton::uint8 st2[triton::size::fword]
Concrete value of st2.
Definition x86Cpu.hpp:106
triton::arch::x86::x86Cpu::eax
triton::uint8 eax[triton::size::dword]
Concrete value of eax.
Definition x86Cpu.hpp:82
triton::arch::x86::x86Cpu::memory
std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > memory
map of address -> concrete value
Definition x86Cpu.hpp:79
triton::arch::x86::x86Cpu::dr0
triton::uint8 dr0[triton::size::dword]
Concrete value of dr0.
Definition x86Cpu.hpp:178
triton::arch::x86::x86Cpu::getConcreteRegisterValue
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register &reg, bool execCallbacks=true) const
Returns the concrete value of a register.
Definition x86Cpu.cpp:589
triton::arch::x86::x86Cpu::isSSECTL
TRITON_EXPORT bool isSSECTL(triton::arch::register_e regId) const
Returns true if regId is a SSE Contol register.
Definition x86Cpu.cpp:272
triton::arch::x86::x86Cpu::isMemoryExclusive
TRITON_EXPORT bool isMemoryExclusive(const triton::arch::MemoryAccess &mem) const
Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
Definition x86Cpu.cpp:1481
triton::arch::x86::x86Cpu::getRegister
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
Definition x86Cpu.cpp:392
triton::arch::x86::x86Cpu::isThumb
TRITON_EXPORT bool isThumb(void) const
Returns true if the execution mode is Thumb. Only useful for Arm32.
Definition x86Cpu.cpp:1470
triton::arch::x86::x86Cpu::esp
triton::uint8 esp[triton::size::dword]
Concrete value of esp.
Definition x86Cpu.hpp:96
triton::arch::x86::x86Cpu::st3
triton::uint8 st3[triton::size::fword]
Concrete value of st3.
Definition x86Cpu.hpp:108
triton::arch::x86::x86Cpu::st0
triton::uint8 st0[triton::size::fword]
Concrete value of st0.
Definition x86Cpu.hpp:102
triton::arch::x86::x86Cpu::clear
TRITON_EXPORT void clear(void)
Clears the architecture states (registers and memory).
Definition x86Cpu.cpp:134
triton::arch::x86::x86Cpu::ymm5
triton::uint8 ymm5[triton::size::qqword]
Concrete value of ymm5.
Definition x86Cpu.hpp:128
triton::arch::x86::x86Cpu::cr1
triton::uint8 cr1[triton::size::dword]
Concrete value of cr1.
Definition x86Cpu.hpp:136
triton::arch::x86::x86Cpu::isConcreteMemoryValueDefined
TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess &mem) const
Returns true if memory cells have a defined concrete value.
Definition x86Cpu.cpp:1492
triton::arch::x86::x86Cpu::setConcreteMemoryAreaValue
TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory area.
Definition x86Cpu.cpp:824
triton::arch::x86::x86Cpu::ymm6
triton::uint8 ymm6[triton::size::qqword]
Concrete value of ymm6.
Definition x86Cpu.hpp:130
triton::arch::x86::x86Cpu::eip
triton::uint8 eip[triton::size::dword]
Concrete value of eip.
Definition x86Cpu.hpp:98
triton::arch::x86::x86Cpu::ecx
triton::uint8 ecx[triton::size::dword]
Concrete value of ecx.
Definition x86Cpu.hpp:86
triton::arch::x86::x86Cpu::dr6
triton::uint8 dr6[triton::size::dword]
Condete value of dr6.
Definition x86Cpu.hpp:186
triton::arch::x86::x86Cpu::cr15
triton::uint8 cr15[triton::size::dword]
Concrete value of cr15.
Definition x86Cpu.hpp:164
triton::arch::x86::x86Cpu::cr11
triton::uint8 cr11[triton::size::dword]
Concrete value of cr11.
Definition x86Cpu.hpp:156
triton::arch::x86::x86Cpu::fs
triton::uint8 fs[triton::size::dword]
Concrete value of FS.
Definition x86Cpu.hpp:172
triton::arch::x86::x86Cpu::ymm1
triton::uint8 ymm1[triton::size::qqword]
Concrete value of ymm1.
Definition x86Cpu.hpp:120
triton::arch::x86::x86Cpu::getAllRegisters
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters(void) const
Returns all registers.
Definition x86Cpu.cpp:328
triton::arch::x86::x86Cpu::cr2
triton::uint8 cr2[triton::size::dword]
Concrete value of cr2.
Definition x86Cpu.hpp:138
triton::arch::x86::x86Cpu::isFPU
TRITON_EXPORT bool isFPU(triton::arch::register_e regId) const
Returns true if regId is a FPU register.
Definition x86Cpu.cpp:277
triton::arch::x86::x86Cpu::cr8
triton::uint8 cr8[triton::size::dword]
Concrete value of cr8.
Definition x86Cpu.hpp:150
triton::arch::x86::x86Cpu::isDebug
TRITON_EXPORT bool isDebug(triton::arch::register_e regId) const
Returns true if regId is a debug (dr) register.
Definition x86Cpu.cpp:302
triton::arch::x86::x86Cpu::getStackPointer
TRITON_EXPORT const triton::arch::Register & getStackPointer(void) const
Returns the stack pointer register.
Definition x86Cpu.cpp:427
triton::arch::x86::x86Cpu::fip
triton::uint8 fip[triton::size::qword]
Concrete value of the x87 FPU Instruction Pointer Offset.
Definition x86Cpu.hpp:198
triton::arch::x86::x86Cpu::getConcreteMemory
TRITON_EXPORT const std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > & getConcreteMemory(void) const
Return all memory.
Definition x86Cpu.cpp:332
triton::arch::x86::x86Cpu::isMMX
TRITON_EXPORT bool isMMX(triton::arch::register_e regId) const
Returns true if regId is a MMX register.
Definition x86Cpu.cpp:257
triton::arch::x86::x86Cpu::cr10
triton::uint8 cr10[triton::size::dword]
Concrete value of cr10.
Definition x86Cpu.hpp:154
triton::arch::x86::x86Cpu::ymm2
triton::uint8 ymm2[triton::size::qqword]
Concrete value of ymm2.
Definition x86Cpu.hpp:122
triton::arch::x86::x86Cpu::isRegisterValid
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is valid.
Definition x86Cpu.cpp:247
triton::arch::x86::x86Cpu::isFlag
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
Definition x86Cpu.cpp:219
triton::arch::x86::x86Cpu::cr14
triton::uint8 cr14[triton::size::dword]
Concrete value of cr14.
Definition x86Cpu.hpp:162
triton::arch::x86::x86Cpu::cr12
triton::uint8 cr12[triton::size::dword]
Concrete value of cr12.
Definition x86Cpu.hpp:158
triton::arch::x86::x86Cpu::cr0
triton::uint8 cr0[triton::size::dword]
Concrete value of cr0.
Definition x86Cpu.hpp:134
triton::arch::x86::x86Cpu::cr6
triton::uint8 cr6[triton::size::dword]
Concrete value of cr6.
Definition x86Cpu.hpp:146
triton::arch::x86::x86Cpu::cr3
triton::uint8 cr3[triton::size::dword]
Concrete value of cr3.
Definition x86Cpu.hpp:140
triton::arch::x86::x86Cpu::eflags
triton::uint8 eflags[triton::size::dword]
Concrete value of eflags.
Definition x86Cpu.hpp:100
triton::arch::x86::x86Cpu::edx
triton::uint8 edx[triton::size::dword]
Concrete value of edx.
Definition x86Cpu.hpp:88
triton::arch::x86::x86Specifications
The x86Specifications class defines specifications about the x86 and x86_64 CPU.
Definition x86Specifications.hpp:46
triton::arch::x86::x86Specifications::capstoneRegisterToTritonRegister
TRITON_EXPORT triton::arch::register_e capstoneRegisterToTritonRegister(triton::uint32 id) const
Converts a capstone's register id to a triton's register id.
Definition x86Specifications.cpp:63
triton::arch::x86::x86Specifications::id2reg
std::unordered_map< triton::arch::register_e, const triton::arch::Register > id2reg
List of registers specification available for this architecture.
Definition x86Specifications.hpp:49
triton::arch::x86::x86Specifications::capstonePrefixToTritonPrefix
TRITON_EXPORT triton::arch::x86::prefix_e capstonePrefixToTritonPrefix(triton::uint32 id) const
Converts a capstone's prefix id to a triton's prefix id.
Definition x86Specifications.cpp:5277
triton::arch::x86::x86Specifications::capstoneInstructionToTritonInstruction
TRITON_EXPORT triton::uint32 capstoneInstructionToTritonInstruction(triton::uint32 id) const
Converts a capstone's instruction id to a triton's instruction id.
Definition x86Specifications.cpp:85
triton::callbacks::Callbacks
The callbacks class.
Definition callbacks.hpp:79
triton::callbacks::Callbacks::processCallbacks
TRITON_EXPORT triton::ast::SharedAbstractNode processCallbacks(triton::callbacks::callback_e kind, triton::ast::SharedAbstractNode node)
Processes callbacks according to the kind and the C++ polymorphism.
Definition callbacks.cpp:193
triton::exceptions::Cpu
The exception class used by all CPUs.
Definition exceptions.hpp:317
triton::exceptions::Disassembly
The exception class used by the disassembler.
Definition exceptions.hpp:365
triton::exceptions::Register
The exception class used by register operands.
Definition exceptions.hpp:257
triton::arch::register_e
register_e
Types of register.
Definition archEnums.hpp:68
triton::arch::endianness_e
endianness_e
Definition archEnums.hpp:45
triton::arch::ARCH_X86
@ ARCH_X86
Definition archEnums.hpp:40
triton::arch::ID_REG_LAST_ITEM
@ ID_REG_LAST_ITEM
must be the last item
Definition archEnums.hpp:100
triton::arch::LE_ENDIANNESS
@ LE_ENDIANNESS
Definition archEnums.hpp:46
triton::bitsize::byte
constexpr triton::uint32 byte
byte size in bit
Definition cpuSize.hpp:60
triton::bitsize::dword
constexpr triton::uint32 dword
dword size in bit
Definition cpuSize.hpp:64
triton::callbacks::GET_CONCRETE_REGISTER_VALUE
@ GET_CONCRETE_REGISTER_VALUE
Definition callbacksEnums.hpp:31
triton::callbacks::GET_CONCRETE_MEMORY_VALUE
@ GET_CONCRETE_MEMORY_VALUE
Definition callbacksEnums.hpp:30
triton::callbacks::SET_CONCRETE_MEMORY_VALUE
@ SET_CONCRETE_MEMORY_VALUE
Definition callbacksEnums.hpp:32
triton::callbacks::SET_CONCRETE_REGISTER_VALUE
@ SET_CONCRETE_REGISTER_VALUE
Definition callbacksEnums.hpp:33
triton::size::dword
constexpr triton::uint32 dword
dword size in byte
Definition cpuSize.hpp:34
triton::size::dqqword
constexpr triton::uint32 dqqword
dqqword size in byte
Definition cpuSize.hpp:44
triton::size::word
constexpr triton::uint32 word
word size in byte
Definition cpuSize.hpp:32
triton::size::byte
constexpr triton::uint32 byte
byte size in byte
Definition cpuSize.hpp:30
triton::size::qword
constexpr triton::uint32 qword
qword size in byte
Definition cpuSize.hpp:36
triton::sint32
std::int32_t sint32
signed 32-bits
Definition tritonTypes.hpp:79
triton::uint16
std::uint16_t uint16
unisgned 16-bits
Definition tritonTypes.hpp:36
triton::usize
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
Definition tritonTypes.hpp:106
triton::uint64
std::uint64_t uint64
unisgned 64-bits
Definition tritonTypes.hpp:42
triton::uint32
std::uint32_t uint32
unisgned 32-bits
Definition tritonTypes.hpp:39
triton::uint8
std::uint8_t uint8
unisgned 8-bits
Definition tritonTypes.hpp:33
triton::utils::fromUintToBuffer
TRITON_EXPORT void fromUintToBuffer(triton::uint80 value, triton::uint8 *buffer)
Inject the value into the buffer. Make sure that the buffer contains at least 10 allocated bytes.
Definition coreUtils.cpp:16
triton
The Triton namespace.
Definition architecture.cpp:27
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