28 this->callbacks = callbacks;
44 triton::extlibs::capstone::cs_close(&this->handle);
49 void AArch64Cpu::disassInit(
void) {
51 triton::extlibs::capstone::cs_close(&this->handle);
54 if (triton::extlibs::capstone::cs_open(triton::extlibs::capstone::CS_ARCH_ARM64, triton::extlibs::capstone::CS_MODE_ARM, &this->handle) != triton::extlibs::capstone::CS_ERR_OK)
57 triton::extlibs::capstone::cs_option(this->handle, triton::extlibs::capstone::CS_OPT_DETAIL, triton::extlibs::capstone::CS_OPT_ON);
61 void AArch64Cpu::copy(
const AArch64Cpu& other) {
62 this->callbacks = other.callbacks;
63 this->exclusiveMemoryTags = other.exclusiveMemoryTags;
64 this->
memory = other.memory;
66 std::memcpy(this->
x0, other.x0,
sizeof(this->x0));
67 std::memcpy(this->
x1, other.x1,
sizeof(this->x1));
68 std::memcpy(this->
x2, other.x2,
sizeof(this->x2));
69 std::memcpy(this->
x3, other.x3,
sizeof(this->x3));
70 std::memcpy(this->
x4, other.x4,
sizeof(this->x4));
71 std::memcpy(this->
x5, other.x5,
sizeof(this->x5));
72 std::memcpy(this->
x6, other.x6,
sizeof(this->x6));
73 std::memcpy(this->
x7, other.x7,
sizeof(this->x7));
74 std::memcpy(this->
x8, other.x8,
sizeof(this->x8));
75 std::memcpy(this->
x9, other.x9,
sizeof(this->x9));
76 std::memcpy(this->
x10, other.x10,
sizeof(this->x10));
77 std::memcpy(this->
x11, other.x11,
sizeof(this->x11));
78 std::memcpy(this->
x12, other.x12,
sizeof(this->x12));
79 std::memcpy(this->
x13, other.x13,
sizeof(this->x13));
80 std::memcpy(this->
x14, other.x14,
sizeof(this->x14));
81 std::memcpy(this->
x15, other.x15,
sizeof(this->x15));
82 std::memcpy(this->
x16, other.x16,
sizeof(this->x16));
83 std::memcpy(this->
x17, other.x17,
sizeof(this->x17));
84 std::memcpy(this->
x18, other.x18,
sizeof(this->x18));
85 std::memcpy(this->
x19, other.x19,
sizeof(this->x19));
86 std::memcpy(this->
x20, other.x20,
sizeof(this->x20));
87 std::memcpy(this->
x21, other.x21,
sizeof(this->x21));
88 std::memcpy(this->
x22, other.x22,
sizeof(this->x22));
89 std::memcpy(this->
x23, other.x23,
sizeof(this->x23));
90 std::memcpy(this->
x24, other.x24,
sizeof(this->x24));
91 std::memcpy(this->
x25, other.x25,
sizeof(this->x25));
92 std::memcpy(this->
x26, other.x26,
sizeof(this->x26));
93 std::memcpy(this->
x27, other.x27,
sizeof(this->x27));
94 std::memcpy(this->
x28, other.x28,
sizeof(this->x28));
95 std::memcpy(this->
x29, other.x29,
sizeof(this->x29));
96 std::memcpy(this->
x30, other.x30,
sizeof(this->x30));
97 std::memcpy(this->
q0, other.q0,
sizeof(this->q0));
98 std::memcpy(this->
q1, other.q1,
sizeof(this->q1));
99 std::memcpy(this->
q2, other.q2,
sizeof(this->q2));
100 std::memcpy(this->
q3, other.q3,
sizeof(this->q3));
101 std::memcpy(this->
q4, other.q4,
sizeof(this->q4));
102 std::memcpy(this->
q5, other.q5,
sizeof(this->q5));
103 std::memcpy(this->
q6, other.q6,
sizeof(this->q6));
104 std::memcpy(this->
q7, other.q7,
sizeof(this->q7));
105 std::memcpy(this->
q8, other.q8,
sizeof(this->q8));
106 std::memcpy(this->
q9, other.q9,
sizeof(this->q9));
107 std::memcpy(this->
q10, other.q10,
sizeof(this->q10));
108 std::memcpy(this->
q11, other.q11,
sizeof(this->q11));
109 std::memcpy(this->
q12, other.q12,
sizeof(this->q12));
110 std::memcpy(this->
q13, other.q13,
sizeof(this->q13));
111 std::memcpy(this->
q14, other.q14,
sizeof(this->q14));
112 std::memcpy(this->
q15, other.q15,
sizeof(this->q15));
113 std::memcpy(this->
q16, other.q16,
sizeof(this->q16));
114 std::memcpy(this->
q17, other.q17,
sizeof(this->q17));
115 std::memcpy(this->
q18, other.q18,
sizeof(this->q18));
116 std::memcpy(this->
q19, other.q19,
sizeof(this->q19));
117 std::memcpy(this->
q20, other.q20,
sizeof(this->q20));
118 std::memcpy(this->
q21, other.q21,
sizeof(this->q21));
119 std::memcpy(this->
q22, other.q22,
sizeof(this->q22));
120 std::memcpy(this->
q23, other.q23,
sizeof(this->q23));
121 std::memcpy(this->
q24, other.q24,
sizeof(this->q24));
122 std::memcpy(this->
q25, other.q25,
sizeof(this->q25));
123 std::memcpy(this->
q26, other.q26,
sizeof(this->q26));
124 std::memcpy(this->
q27, other.q27,
sizeof(this->q27));
125 std::memcpy(this->
q28, other.q28,
sizeof(this->q28));
126 std::memcpy(this->
q29, other.q29,
sizeof(this->q29));
127 std::memcpy(this->
q30, other.q30,
sizeof(this->q30));
128 std::memcpy(this->
q31, other.q31,
sizeof(this->q31));
129 std::memcpy(this->
sp, other.sp,
sizeof(this->sp));
130 std::memcpy(this->
pc, other.pc,
sizeof(this->pc));
131 std::memcpy(this->
spsr, other.spsr,
sizeof(this->spsr));
134 #define SYS_REG_SPEC(_, LOWER_NAME, _2, _3, _4, _5) \
135 std::memcpy(this->LOWER_NAME, other.LOWER_NAME, sizeof(this->LOWER_NAME));
136 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
137 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
138 #include "triton/aarch64.spec"
147 std::memset(this->
x0, 0x00,
sizeof(this->
x0));
148 std::memset(this->
x1, 0x00,
sizeof(this->
x1));
149 std::memset(this->
x2, 0x00,
sizeof(this->
x2));
150 std::memset(this->
x3, 0x00,
sizeof(this->
x3));
151 std::memset(this->
x4, 0x00,
sizeof(this->
x4));
152 std::memset(this->
x5, 0x00,
sizeof(this->
x5));
153 std::memset(this->
x6, 0x00,
sizeof(this->
x6));
154 std::memset(this->
x7, 0x00,
sizeof(this->
x7));
155 std::memset(this->
x8, 0x00,
sizeof(this->
x8));
156 std::memset(this->
x9, 0x00,
sizeof(this->
x9));
157 std::memset(this->
x10, 0x00,
sizeof(this->
x10));
158 std::memset(this->
x11, 0x00,
sizeof(this->
x11));
159 std::memset(this->
x12, 0x00,
sizeof(this->
x12));
160 std::memset(this->
x13, 0x00,
sizeof(this->
x13));
161 std::memset(this->
x14, 0x00,
sizeof(this->
x14));
162 std::memset(this->
x15, 0x00,
sizeof(this->
x15));
163 std::memset(this->
x16, 0x00,
sizeof(this->
x16));
164 std::memset(this->
x17, 0x00,
sizeof(this->
x17));
165 std::memset(this->
x18, 0x00,
sizeof(this->
x18));
166 std::memset(this->
x19, 0x00,
sizeof(this->
x19));
167 std::memset(this->
x20, 0x00,
sizeof(this->
x20));
168 std::memset(this->
x21, 0x00,
sizeof(this->
x21));
169 std::memset(this->
x22, 0x00,
sizeof(this->
x22));
170 std::memset(this->
x23, 0x00,
sizeof(this->
x23));
171 std::memset(this->
x24, 0x00,
sizeof(this->
x24));
172 std::memset(this->
x25, 0x00,
sizeof(this->
x25));
173 std::memset(this->
x26, 0x00,
sizeof(this->
x26));
174 std::memset(this->
x27, 0x00,
sizeof(this->
x27));
175 std::memset(this->
x28, 0x00,
sizeof(this->
x28));
176 std::memset(this->
x29, 0x00,
sizeof(this->
x29));
177 std::memset(this->
x30, 0x00,
sizeof(this->
x30));
178 std::memset(this->
q0, 0x00,
sizeof(this->
q0));
179 std::memset(this->
q1, 0x00,
sizeof(this->
q1));
180 std::memset(this->
q2, 0x00,
sizeof(this->
q2));
181 std::memset(this->
q3, 0x00,
sizeof(this->
q3));
182 std::memset(this->
q4, 0x00,
sizeof(this->
q4));
183 std::memset(this->
q5, 0x00,
sizeof(this->
q5));
184 std::memset(this->
q6, 0x00,
sizeof(this->
q6));
185 std::memset(this->
q7, 0x00,
sizeof(this->
q7));
186 std::memset(this->
q8, 0x00,
sizeof(this->
q8));
187 std::memset(this->
q9, 0x00,
sizeof(this->
q9));
188 std::memset(this->
q10, 0x00,
sizeof(this->
q10));
189 std::memset(this->
q11, 0x00,
sizeof(this->
q11));
190 std::memset(this->
q12, 0x00,
sizeof(this->
q12));
191 std::memset(this->
q13, 0x00,
sizeof(this->
q13));
192 std::memset(this->
q14, 0x00,
sizeof(this->
q14));
193 std::memset(this->
q15, 0x00,
sizeof(this->
q15));
194 std::memset(this->
q16, 0x00,
sizeof(this->
q16));
195 std::memset(this->
q17, 0x00,
sizeof(this->
q17));
196 std::memset(this->
q18, 0x00,
sizeof(this->
q18));
197 std::memset(this->
q19, 0x00,
sizeof(this->
q19));
198 std::memset(this->
q20, 0x00,
sizeof(this->
q20));
199 std::memset(this->
q21, 0x00,
sizeof(this->
q21));
200 std::memset(this->
q22, 0x00,
sizeof(this->
q22));
201 std::memset(this->
q23, 0x00,
sizeof(this->
q23));
202 std::memset(this->
q24, 0x00,
sizeof(this->
q24));
203 std::memset(this->
q25, 0x00,
sizeof(this->
q25));
204 std::memset(this->
q26, 0x00,
sizeof(this->
q26));
205 std::memset(this->
q27, 0x00,
sizeof(this->
q27));
206 std::memset(this->
q28, 0x00,
sizeof(this->
q28));
207 std::memset(this->
q29, 0x00,
sizeof(this->
q29));
208 std::memset(this->
q30, 0x00,
sizeof(this->
q30));
209 std::memset(this->
q31, 0x00,
sizeof(this->
q31));
210 std::memset(this->
sp, 0x00,
sizeof(this->
sp));
211 std::memset(this->
pc, 0x00,
sizeof(this->
pc));
212 std::memset(this->
spsr, 0x00,
sizeof(this->
spsr));
215 #define SYS_REG_SPEC(_, LOWER_NAME, _2, _3, _4, _5) \
216 std::memset(this->LOWER_NAME, 0x00, sizeof(this->LOWER_NAME));
217 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
218 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
219 #include "triton/aarch64.spec"
235 return ((regId >= triton::arch::ID_REG_AARCH64_C && regId <= triton::arch::ID_REG_AARCH64_Z) ?
true :
false);
250 return ((regId >= triton::arch::ID_REG_AARCH64_X0 && regId <= triton::arch::ID_REG_AARCH64_WZR) ?
true :
false);
255 return ((regId >= triton::arch::ID_REG_AARCH64_Q0 && regId <= triton::arch::ID_REG_AARCH64_B31) ?
true :
false);
260 return ((regId >= triton::arch::ID_REG_AARCH64_V0 && regId <= triton::arch::ID_REG_AARCH64_V31) ?
true :
false);
265 return ((regId >= triton::arch::ID_REG_AARCH64_ACTLR_EL1 && regId <= triton::arch::ID_REG_AARCH64_ZCR_EL3) ?
true :
false);
290 std::set<const triton::arch::Register*> ret;
292 for (
const auto& kv: this->
id2reg) {
293 auto regId = kv.first;
294 const auto& reg = kv.second;
301 if (reg.getSize() == this->gprSize())
309 else if (this->
isFlag(regId))
319 return this->
id2reg.at(
id);
320 }
catch (
const std::out_of_range&) {
327 std::string lower = name;
328 std::transform(lower.begin(), lower.end(), lower.begin(), [](
unsigned char c){ return std::tolower(c); });
331 }
catch (
const std::out_of_range&) {
358 triton::extlibs::capstone::cs_insn* insn;
378 triton::extlibs::capstone::cs_detail* detail = insn->detail;
381 std::stringstream str;
383 str << insn[0].mnemonic;
384 if (detail->arm64.op_count)
385 str <<
" " << insn[0].op_str;
409 triton::extlibs::capstone::cs_arm64_op* op = &(detail->arm64.operands[n]);
412 case triton::extlibs::capstone::ARM64_OP_IMM: {
433 case triton::extlibs::capstone::ARM64_OP_MEM: {
452 if (base.
getId() == this->pcId) {
462 if (op->ext != triton::extlibs::capstone::ARM64_EXT_INVALID) {
480 case triton::extlibs::capstone::ARM64_OP_REG: {
489 if (op->ext != triton::extlibs::capstone::ARM64_EXT_INVALID) {
509 case triton::extlibs::capstone::ARM64_OP_SYS: {
529 if (insn[0].
id == triton::extlibs::capstone::ARM64_INS_RET)
533 if (detail->groups_count > 0) {
535 if (detail->groups[n] == triton::extlibs::capstone::ARM64_GRP_JUMP) {
543 triton::extlibs::capstone::cs_free(insn, count);
551 if (execCallbacks && this->callbacks)
554 auto it = this->
memory.find(addr);
555 if (it == this->
memory.end())
567 if (execCallbacks && this->callbacks)
584 std::vector<triton::uint8> area;
587 area.push_back(this->getConcreteMemoryValue(baseAddr+index, execCallbacks));
596 if (execCallbacks && this->callbacks)
599 switch (reg.
getId()) {
600 case triton::arch::ID_REG_AARCH64_X0:
return (*((
triton::uint64*)(this->
x0)));
601 case triton::arch::ID_REG_AARCH64_W0:
return (*((
triton::uint32*)(this->
x0)));
602 case triton::arch::ID_REG_AARCH64_X1:
return (*((
triton::uint64*)(this->
x1)));
603 case triton::arch::ID_REG_AARCH64_W1:
return (*((
triton::uint32*)(this->
x1)));
604 case triton::arch::ID_REG_AARCH64_X2:
return (*((
triton::uint64*)(this->
x2)));
605 case triton::arch::ID_REG_AARCH64_W2:
return (*((
triton::uint32*)(this->
x2)));
606 case triton::arch::ID_REG_AARCH64_X3:
return (*((
triton::uint64*)(this->
x3)));
607 case triton::arch::ID_REG_AARCH64_W3:
return (*((
triton::uint32*)(this->
x3)));
608 case triton::arch::ID_REG_AARCH64_X4:
return (*((
triton::uint64*)(this->
x4)));
609 case triton::arch::ID_REG_AARCH64_W4:
return (*((
triton::uint32*)(this->
x4)));
610 case triton::arch::ID_REG_AARCH64_X5:
return (*((
triton::uint64*)(this->
x5)));
611 case triton::arch::ID_REG_AARCH64_W5:
return (*((
triton::uint32*)(this->
x5)));
612 case triton::arch::ID_REG_AARCH64_X6:
return (*((
triton::uint64*)(this->
x6)));
613 case triton::arch::ID_REG_AARCH64_W6:
return (*((
triton::uint32*)(this->
x6)));
614 case triton::arch::ID_REG_AARCH64_X7:
return (*((
triton::uint64*)(this->
x7)));
615 case triton::arch::ID_REG_AARCH64_W7:
return (*((
triton::uint32*)(this->
x7)));
616 case triton::arch::ID_REG_AARCH64_X8:
return (*((
triton::uint64*)(this->
x8)));
617 case triton::arch::ID_REG_AARCH64_W8:
return (*((
triton::uint32*)(this->
x8)));
618 case triton::arch::ID_REG_AARCH64_X9:
return (*((
triton::uint64*)(this->
x9)));
619 case triton::arch::ID_REG_AARCH64_W9:
return (*((
triton::uint32*)(this->
x9)));
662 case triton::arch::ID_REG_AARCH64_SP:
return (*((
triton::uint64*)(this->
sp)));
663 case triton::arch::ID_REG_AARCH64_WSP:
return (*((
triton::uint32*)(this->
sp)));
664 case triton::arch::ID_REG_AARCH64_PC:
return (*((
triton::uint64*)(this->
pc)));
665 case triton::arch::ID_REG_AARCH64_XZR:
return 0;
666 case triton::arch::ID_REG_AARCH64_WZR:
return 0;
668 case triton::arch::ID_REG_AARCH64_N:
return (((*((
triton::uint32*)(this->
spsr))) >> 31) & 1);
669 case triton::arch::ID_REG_AARCH64_Z:
return (((*((
triton::uint32*)(this->
spsr))) >> 30) & 1);
670 case triton::arch::ID_REG_AARCH64_C:
return (((*((
triton::uint32*)(this->
spsr))) >> 29) & 1);
671 case triton::arch::ID_REG_AARCH64_V:
return (((*((
triton::uint32*)(this->
spsr))) >> 28) & 1);
672 case triton::arch::ID_REG_AARCH64_Q0:
return triton::utils::cast<triton::uint128>(this->
q0);
673 case triton::arch::ID_REG_AARCH64_D0:
return (*((
triton::uint64*)(this->
q0)));
674 case triton::arch::ID_REG_AARCH64_S0:
return (*((
triton::uint32*)(this->
q0)));
675 case triton::arch::ID_REG_AARCH64_H0:
return (*((
triton::uint16*)(this->
q0)));
676 case triton::arch::ID_REG_AARCH64_B0:
return (*((
triton::uint8*)(this->
q0)));
677 case triton::arch::ID_REG_AARCH64_Q1:
return triton::utils::cast<triton::uint128>(this->
q1);
678 case triton::arch::ID_REG_AARCH64_D1:
return (*((
triton::uint64*)(this->
q1)));
679 case triton::arch::ID_REG_AARCH64_S1:
return (*((
triton::uint32*)(this->
q1)));
680 case triton::arch::ID_REG_AARCH64_H1:
return (*((
triton::uint16*)(this->
q1)));
681 case triton::arch::ID_REG_AARCH64_B1:
return (*((
triton::uint8*)(this->
q1)));
682 case triton::arch::ID_REG_AARCH64_Q2:
return triton::utils::cast<triton::uint128>(this->
q2);
683 case triton::arch::ID_REG_AARCH64_D2:
return (*((
triton::uint64*)(this->
q2)));
684 case triton::arch::ID_REG_AARCH64_S2:
return (*((
triton::uint32*)(this->
q2)));
685 case triton::arch::ID_REG_AARCH64_H2:
return (*((
triton::uint16*)(this->
q2)));
686 case triton::arch::ID_REG_AARCH64_B2:
return (*((
triton::uint8*)(this->
q2)));
687 case triton::arch::ID_REG_AARCH64_Q3:
return triton::utils::cast<triton::uint128>(this->
q3);
688 case triton::arch::ID_REG_AARCH64_D3:
return (*((
triton::uint64*)(this->
q3)));
689 case triton::arch::ID_REG_AARCH64_S3:
return (*((
triton::uint32*)(this->
q3)));
690 case triton::arch::ID_REG_AARCH64_H3:
return (*((
triton::uint16*)(this->
q3)));
691 case triton::arch::ID_REG_AARCH64_B3:
return (*((
triton::uint8*)(this->
q3)));
692 case triton::arch::ID_REG_AARCH64_Q4:
return triton::utils::cast<triton::uint128>(this->
q4);
693 case triton::arch::ID_REG_AARCH64_D4:
return (*((
triton::uint64*)(this->
q4)));
694 case triton::arch::ID_REG_AARCH64_S4:
return (*((
triton::uint32*)(this->
q4)));
695 case triton::arch::ID_REG_AARCH64_H4:
return (*((
triton::uint16*)(this->
q4)));
696 case triton::arch::ID_REG_AARCH64_B4:
return (*((
triton::uint8*)(this->
q4)));
697 case triton::arch::ID_REG_AARCH64_Q5:
return triton::utils::cast<triton::uint128>(this->
q5);
698 case triton::arch::ID_REG_AARCH64_D5:
return (*((
triton::uint64*)(this->
q5)));
699 case triton::arch::ID_REG_AARCH64_S5:
return (*((
triton::uint32*)(this->
q5)));
700 case triton::arch::ID_REG_AARCH64_H5:
return (*((
triton::uint16*)(this->
q5)));
701 case triton::arch::ID_REG_AARCH64_B5:
return (*((
triton::uint8*)(this->
q5)));
702 case triton::arch::ID_REG_AARCH64_Q6:
return triton::utils::cast<triton::uint128>(this->
q6);
703 case triton::arch::ID_REG_AARCH64_D6:
return (*((
triton::uint64*)(this->
q6)));
704 case triton::arch::ID_REG_AARCH64_S6:
return (*((
triton::uint32*)(this->
q6)));
705 case triton::arch::ID_REG_AARCH64_H6:
return (*((
triton::uint16*)(this->
q6)));
706 case triton::arch::ID_REG_AARCH64_B6:
return (*((
triton::uint8*)(this->
q6)));
707 case triton::arch::ID_REG_AARCH64_Q7:
return triton::utils::cast<triton::uint128>(this->
q7);
708 case triton::arch::ID_REG_AARCH64_D7:
return (*((
triton::uint64*)(this->
q7)));
709 case triton::arch::ID_REG_AARCH64_S7:
return (*((
triton::uint32*)(this->
q7)));
710 case triton::arch::ID_REG_AARCH64_H7:
return (*((
triton::uint16*)(this->
q7)));
711 case triton::arch::ID_REG_AARCH64_B7:
return (*((
triton::uint8*)(this->
q7)));
712 case triton::arch::ID_REG_AARCH64_Q8:
return triton::utils::cast<triton::uint128>(this->
q8);
713 case triton::arch::ID_REG_AARCH64_D8:
return (*((
triton::uint64*)(this->
q8)));
714 case triton::arch::ID_REG_AARCH64_S8:
return (*((
triton::uint32*)(this->
q8)));
715 case triton::arch::ID_REG_AARCH64_H8:
return (*((
triton::uint16*)(this->
q8)));
716 case triton::arch::ID_REG_AARCH64_B8:
return (*((
triton::uint8*)(this->
q8)));
717 case triton::arch::ID_REG_AARCH64_Q9:
return triton::utils::cast<triton::uint128>(this->
q9);
718 case triton::arch::ID_REG_AARCH64_D9:
return (*((
triton::uint64*)(this->
q9)));
719 case triton::arch::ID_REG_AARCH64_S9:
return (*((
triton::uint32*)(this->
q9)));
720 case triton::arch::ID_REG_AARCH64_H9:
return (*((
triton::uint16*)(this->
q9)));
721 case triton::arch::ID_REG_AARCH64_B9:
return (*((
triton::uint8*)(this->
q9)));
722 case triton::arch::ID_REG_AARCH64_Q10:
return triton::utils::cast<triton::uint128>(this->
q10);
726 case triton::arch::ID_REG_AARCH64_B10:
return (*((
triton::uint8*)(this->
q10)));
727 case triton::arch::ID_REG_AARCH64_Q11:
return triton::utils::cast<triton::uint128>(this->
q11);
731 case triton::arch::ID_REG_AARCH64_B11:
return (*((
triton::uint8*)(this->
q11)));
732 case triton::arch::ID_REG_AARCH64_Q12:
return triton::utils::cast<triton::uint128>(this->
q12);
736 case triton::arch::ID_REG_AARCH64_B12:
return (*((
triton::uint8*)(this->
q12)));
737 case triton::arch::ID_REG_AARCH64_Q13:
return triton::utils::cast<triton::uint128>(this->
q13);
741 case triton::arch::ID_REG_AARCH64_B13:
return (*((
triton::uint8*)(this->
q13)));
742 case triton::arch::ID_REG_AARCH64_Q14:
return triton::utils::cast<triton::uint128>(this->
q14);
746 case triton::arch::ID_REG_AARCH64_B14:
return (*((
triton::uint8*)(this->
q14)));
747 case triton::arch::ID_REG_AARCH64_Q15:
return triton::utils::cast<triton::uint128>(this->
q15);
751 case triton::arch::ID_REG_AARCH64_B15:
return (*((
triton::uint8*)(this->
q15)));
752 case triton::arch::ID_REG_AARCH64_Q16:
return triton::utils::cast<triton::uint128>(this->
q16);
756 case triton::arch::ID_REG_AARCH64_B16:
return (*((
triton::uint8*)(this->
q16)));
757 case triton::arch::ID_REG_AARCH64_Q17:
return triton::utils::cast<triton::uint128>(this->
q17);
761 case triton::arch::ID_REG_AARCH64_B17:
return (*((
triton::uint8*)(this->
q17)));
762 case triton::arch::ID_REG_AARCH64_Q18:
return triton::utils::cast<triton::uint128>(this->
q18);
766 case triton::arch::ID_REG_AARCH64_B18:
return (*((
triton::uint8*)(this->
q18)));
767 case triton::arch::ID_REG_AARCH64_Q19:
return triton::utils::cast<triton::uint128>(this->
q19);
771 case triton::arch::ID_REG_AARCH64_B19:
return (*((
triton::uint8*)(this->
q19)));
772 case triton::arch::ID_REG_AARCH64_Q20:
return triton::utils::cast<triton::uint128>(this->
q20);
776 case triton::arch::ID_REG_AARCH64_B20:
return (*((
triton::uint8*)(this->
q20)));
777 case triton::arch::ID_REG_AARCH64_Q21:
return triton::utils::cast<triton::uint128>(this->
q21);
781 case triton::arch::ID_REG_AARCH64_B21:
return (*((
triton::uint8*)(this->
q21)));
782 case triton::arch::ID_REG_AARCH64_Q22:
return triton::utils::cast<triton::uint128>(this->
q22);
786 case triton::arch::ID_REG_AARCH64_B22:
return (*((
triton::uint8*)(this->
q22)));
787 case triton::arch::ID_REG_AARCH64_Q23:
return triton::utils::cast<triton::uint128>(this->
q23);
791 case triton::arch::ID_REG_AARCH64_B23:
return (*((
triton::uint8*)(this->
q23)));
792 case triton::arch::ID_REG_AARCH64_Q24:
return triton::utils::cast<triton::uint128>(this->
q24);
796 case triton::arch::ID_REG_AARCH64_B24:
return (*((
triton::uint8*)(this->
q24)));
797 case triton::arch::ID_REG_AARCH64_Q25:
return triton::utils::cast<triton::uint128>(this->
q25);
801 case triton::arch::ID_REG_AARCH64_B25:
return (*((
triton::uint8*)(this->
q25)));
802 case triton::arch::ID_REG_AARCH64_Q26:
return triton::utils::cast<triton::uint128>(this->
q26);
806 case triton::arch::ID_REG_AARCH64_B26:
return (*((
triton::uint8*)(this->
q26)));
807 case triton::arch::ID_REG_AARCH64_Q27:
return triton::utils::cast<triton::uint128>(this->
q27);
811 case triton::arch::ID_REG_AARCH64_B27:
return (*((
triton::uint8*)(this->
q27)));
812 case triton::arch::ID_REG_AARCH64_Q28:
return triton::utils::cast<triton::uint128>(this->
q28);
816 case triton::arch::ID_REG_AARCH64_B28:
return (*((
triton::uint8*)(this->
q28)));
817 case triton::arch::ID_REG_AARCH64_Q29:
return triton::utils::cast<triton::uint128>(this->
q29);
821 case triton::arch::ID_REG_AARCH64_B29:
return (*((
triton::uint8*)(this->
q29)));
822 case triton::arch::ID_REG_AARCH64_Q30:
return triton::utils::cast<triton::uint128>(this->
q30);
826 case triton::arch::ID_REG_AARCH64_B30:
return (*((
triton::uint8*)(this->
q30)));
827 case triton::arch::ID_REG_AARCH64_Q31:
return triton::utils::cast<triton::uint128>(this->
q31);
831 case triton::arch::ID_REG_AARCH64_B31:
return (*((
triton::uint8*)(this->
q31)));
832 case triton::arch::ID_REG_AARCH64_V0:
return triton::utils::cast<triton::uint128>(this->
q0);
833 case triton::arch::ID_REG_AARCH64_V1:
return triton::utils::cast<triton::uint128>(this->
q1);
834 case triton::arch::ID_REG_AARCH64_V2:
return triton::utils::cast<triton::uint128>(this->
q2);
835 case triton::arch::ID_REG_AARCH64_V3:
return triton::utils::cast<triton::uint128>(this->
q3);
836 case triton::arch::ID_REG_AARCH64_V4:
return triton::utils::cast<triton::uint128>(this->
q4);
837 case triton::arch::ID_REG_AARCH64_V5:
return triton::utils::cast<triton::uint128>(this->
q5);
838 case triton::arch::ID_REG_AARCH64_V6:
return triton::utils::cast<triton::uint128>(this->
q6);
839 case triton::arch::ID_REG_AARCH64_V7:
return triton::utils::cast<triton::uint128>(this->
q7);
840 case triton::arch::ID_REG_AARCH64_V8:
return triton::utils::cast<triton::uint128>(this->
q8);
841 case triton::arch::ID_REG_AARCH64_V9:
return triton::utils::cast<triton::uint128>(this->
q9);
842 case triton::arch::ID_REG_AARCH64_V10:
return triton::utils::cast<triton::uint128>(this->
q10);
843 case triton::arch::ID_REG_AARCH64_V11:
return triton::utils::cast<triton::uint128>(this->
q11);
844 case triton::arch::ID_REG_AARCH64_V12:
return triton::utils::cast<triton::uint128>(this->
q12);
845 case triton::arch::ID_REG_AARCH64_V13:
return triton::utils::cast<triton::uint128>(this->
q13);
846 case triton::arch::ID_REG_AARCH64_V14:
return triton::utils::cast<triton::uint128>(this->
q14);
847 case triton::arch::ID_REG_AARCH64_V15:
return triton::utils::cast<triton::uint128>(this->
q15);
848 case triton::arch::ID_REG_AARCH64_V16:
return triton::utils::cast<triton::uint128>(this->
q16);
849 case triton::arch::ID_REG_AARCH64_V17:
return triton::utils::cast<triton::uint128>(this->
q17);
850 case triton::arch::ID_REG_AARCH64_V18:
return triton::utils::cast<triton::uint128>(this->
q18);
851 case triton::arch::ID_REG_AARCH64_V19:
return triton::utils::cast<triton::uint128>(this->
q19);
852 case triton::arch::ID_REG_AARCH64_V20:
return triton::utils::cast<triton::uint128>(this->
q20);
853 case triton::arch::ID_REG_AARCH64_V21:
return triton::utils::cast<triton::uint128>(this->
q21);
854 case triton::arch::ID_REG_AARCH64_V22:
return triton::utils::cast<triton::uint128>(this->
q22);
855 case triton::arch::ID_REG_AARCH64_V23:
return triton::utils::cast<triton::uint128>(this->
q23);
856 case triton::arch::ID_REG_AARCH64_V24:
return triton::utils::cast<triton::uint128>(this->
q24);
857 case triton::arch::ID_REG_AARCH64_V25:
return triton::utils::cast<triton::uint128>(this->
q25);
858 case triton::arch::ID_REG_AARCH64_V26:
return triton::utils::cast<triton::uint128>(this->
q26);
859 case triton::arch::ID_REG_AARCH64_V27:
return triton::utils::cast<triton::uint128>(this->
q27);
860 case triton::arch::ID_REG_AARCH64_V28:
return triton::utils::cast<triton::uint128>(this->
q28);
861 case triton::arch::ID_REG_AARCH64_V29:
return triton::utils::cast<triton::uint128>(this->
q29);
862 case triton::arch::ID_REG_AARCH64_V30:
return triton::utils::cast<triton::uint128>(this->
q30);
863 case triton::arch::ID_REG_AARCH64_V31:
return triton::utils::cast<triton::uint128>(this->
q31);
866 #define SYS_REG_SPEC(UPPER_NAME, LOWER_NAME, _2, _3, _4, _5) \
867 case triton::arch::ID_REG_AARCH64_##UPPER_NAME: return (*((triton::uint64*)(this->LOWER_NAME)));
868 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
869 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
870 #include "triton/aarch64.spec"
881 if (execCallbacks && this->callbacks)
883 this->
memory[addr] = value;
893 throw triton::exceptions::Register(
"AArch64Cpu::setConcreteMemoryValue(): You cannot set this concrete value (too big) to this memory access.");
898 if (execCallbacks && this->callbacks)
909 this->
memory.reserve(values.size() + this->memory.size());
910 for (
triton::usize index = 0; index < values.size(); index++) {
926 throw triton::exceptions::Register(
"AArch64Cpu::setConcreteRegisterValue(): You cannot set this concrete value (too big) to this register.");
928 if (execCallbacks && this->callbacks)
931 switch (reg.
getId()) {
999 case triton::arch::ID_REG_AARCH64_XZR:
break;
1000 case triton::arch::ID_REG_AARCH64_WZR:
break;
1002 case triton::arch::ID_REG_AARCH64_N: {
1004 (*((
triton::uint32*)(this->
spsr))) = !value.is_zero() ? b | (1 << 31) : b & ~(1 << 31);
1007 case triton::arch::ID_REG_AARCH64_Z: {
1009 (*((
triton::uint32*)(this->
spsr))) = !value.is_zero() ? b | (1 << 30) : b & ~(1 << 30);
1012 case triton::arch::ID_REG_AARCH64_C: {
1014 (*((
triton::uint32*)(this->
spsr))) = !value.is_zero() ? b | (1 << 29) : b & ~(1 << 29);
1017 case triton::arch::ID_REG_AARCH64_V: {
1019 (*((
triton::uint32*)(this->
spsr))) = !value.is_zero() ? b | (1 << 28) : b & ~(1 << 28);
1221 #define SYS_REG_SPEC(UPPER_NAME, LOWER_NAME, _2, _3, _4, _5) \
1222 case triton::arch::ID_REG_AARCH64_##UPPER_NAME: (*((triton::uint64*)(this->LOWER_NAME))) = static_cast<triton::uint64>(value); break;
1223 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
1224 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
1225 #include "triton/aarch64.spec"
1248 if (this->exclusiveMemoryTags.find(base + index) != this->exclusiveMemoryTags.end()) {
1262 this->exclusiveMemoryTags.insert(base + index);
1265 this->exclusiveMemoryTags.erase(base + index);
1278 if (this->
memory.find(baseAddr + index) == this->memory.end())
1292 if (this->
memory.find(baseAddr + index) != this->memory.end()) {
1293 this->
memory.erase(baseAddr + index);
TRITON_EXPORT triton::uint512 getMaxValue(void) const
Returns the max possible value of the bitvector.
TRITON_EXPORT void setBits(triton::uint32 high, triton::uint32 low)
Sets the bits (high, low) position.
This class is used to represent an instruction.
TRITON_EXPORT void setUpdateFlag(bool state)
Sets the updateFlag of the instruction.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size of the instruction.
TRITON_EXPORT void setDisassembly(const std::string &str)
Sets the disassembly of the instruction.
TRITON_EXPORT const triton::uint8 * getOpcode(void) const
Returns the opcode of the instruction.
TRITON_EXPORT void setType(triton::uint32 type)
Sets the type of the instruction.
TRITON_EXPORT void setAddress(triton::uint64 addr)
Sets the address of the instruction.
TRITON_EXPORT triton::uint32 getType(void) const
Returns the type of the instruction.
TRITON_EXPORT void setArchitecture(triton::arch::architecture_e arch)
Sets the instruction's architecture.
TRITON_EXPORT void setWriteBack(bool state)
Sets the writeBack flag of the instruction.
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the instruction.
TRITON_EXPORT void setBranch(bool flag)
Sets flag to define this instruction as branch or not.
TRITON_EXPORT void setSize(triton::uint32 size)
Sets the size of the instruction.
TRITON_EXPORT void setCodeCondition(triton::arch::arm::condition_e codeCondition)
Sets the code condition of the instruction (mainly for AArch64).
std::vector< triton::arch::OperandWrapper > operands
A list of operands.
TRITON_EXPORT void setControlFlow(bool flag)
Sets flag to define this instruction changes the control flow or not.
TRITON_EXPORT triton::uint64 getNextAddress(void) const
Returns the next address of the instruction.
This class is used to represent a memory access.
TRITON_EXPORT void setDisplacement(const triton::arch::Immediate &displacement)
LEA - Sets the displacement operand.
TRITON_EXPORT void setScale(const triton::arch::Immediate &scale)
LEA - Sets the scale operand.
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the memory.
TRITON_EXPORT void setPcRelative(triton::uint64 addr)
LEA - Sets pc relative.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the memory vector.
TRITON_EXPORT void setIndexRegister(const triton::arch::Register &index)
LEA - Sets the index register operand.
TRITON_EXPORT void setBaseRegister(const triton::arch::Register &base)
LEA - Sets the base register operand.
This class is used as operand wrapper.
This class is used when an instruction has a register operand.
TRITON_EXPORT triton::uint32 getBitSize(void) const
Returns the size (in bits) of the register.
TRITON_EXPORT triton::arch::register_e getParent(void) const
Returns the parent id of the register.
TRITON_EXPORT triton::arch::register_e getId(void) const
Returns the id of the register.
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the register.
TRITON_EXPORT void setVectorIndex(triton::sint32 index)
Sets the vector index.
TRITON_EXPORT void setVASType(triton::arch::arm::vas_e type)
Sets the type of vector arrangement specifier.
TRITON_EXPORT void setShiftType(triton::arch::arm::shift_e type)
Sets the type of the shift.
TRITON_EXPORT void setExtendedSize(triton::uint32 dstSize)
Sets the extended size (in bits) after extension.
TRITON_EXPORT void setExtendType(triton::arch::arm::extend_e type)
Sets the type of the extend.
TRITON_EXPORT void setShiftValue(triton::uint32 imm)
Sets the value of the shift immediate.
This class is used to describe the ARM (64-bits) spec.
triton::uint8 q30[triton::size::dqword]
Concrete value of q30.
triton::uint8 q9[triton::size::dqword]
Concrete value of q9.
TRITON_EXPORT std::vector< triton::uint8 > getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
Returns the concrete value of a memory area.
triton::uint8 x11[triton::size::qword]
Concrete value of x11.
TRITON_EXPORT void clear(void)
Clears the architecture states (registers and memory).
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register ®, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
triton::uint8 x28[triton::size::qword]
Concrete value of x28.
triton::uint8 x23[triton::size::qword]
Concrete value of x23.
TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess &mem)
Clears concrete values assigned to the memory cells.
triton::uint8 x3[triton::size::qword]
Concrete value of x3.
TRITON_EXPORT bool isVectorRegister(triton::arch::register_e regId) const
Returns true if regId is a vector register.
triton::uint8 x29[triton::size::qword]
Concrete value of x29.
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
triton::uint8 x2[triton::size::qword]
Concrete value of x2.
triton::uint8 q4[triton::size::dqword]
Concrete value of q4.
triton::uint8 x20[triton::size::qword]
Concrete value of x20.
triton::uint8 x18[triton::size::qword]
Concrete value of x18.
triton::uint8 q29[triton::size::dqword]
Concrete value of q29.
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is valid.
triton::uint8 x8[triton::size::qword]
Concrete value of x8.
TRITON_EXPORT const triton::arch::Register & getStackPointer(void) const
Returns the stack pointer register.
triton::uint8 q14[triton::size::dqword]
Concrete value of q14.
triton::uint8 x10[triton::size::qword]
Concrete value of x10.
TRITON_EXPORT AArch64Cpu & operator=(const AArch64Cpu &other)
Copies a AArch64Cpu class.
triton::uint8 x27[triton::size::qword]
Concrete value of x27.
triton::uint8 q12[triton::size::dqword]
Concrete value of q12.
TRITON_EXPORT bool isSystemRegister(triton::arch::register_e regId) const
Returns true if regId is a system register.
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters(void) const
Returns all registers.
TRITON_EXPORT triton::uint512 getConcreteMemoryValue(const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const
Returns the concrete value of memory cells.
triton::uint8 q27[triton::size::dqword]
Concrete value of q27.
TRITON_EXPORT const triton::arch::Register & getProgramCounter(void) const
Returns the program counter register.
triton::uint8 x30[triton::size::qword]
Concrete value of x30.
triton::uint8 q28[triton::size::dqword]
Concrete value of q28.
TRITON_EXPORT bool isMemoryExclusive(const triton::arch::MemoryAccess &mem) const
Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
triton::uint8 q1[triton::size::dqword]
Concrete value of q1.
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters(void) const
Returns all parent registers.
triton::uint8 x1[triton::size::qword]
Concrete value of x1.
TRITON_EXPORT bool isGPR(triton::arch::register_e regId) const
Returns true if regId is a GRP.
TRITON_EXPORT AArch64Cpu(triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
triton::uint8 q20[triton::size::dqword]
Concrete value of q20.
triton::uint8 x5[triton::size::qword]
Concrete value of x5.
TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory area.
TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const
Returns true if the register ID is a register.
triton::uint8 q18[triton::size::dqword]
Concrete value of q18.
triton::uint8 q15[triton::size::dqword]
Concrete value of q15.
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
triton::uint8 q10[triton::size::dqword]
Concrete value of q10.
TRITON_EXPORT bool isThumb(void) const
Returns true if the execution mode is Thumb. Only useful for Arm32.
triton::uint8 x0[triton::size::qword]
Concrete value of x0.
triton::uint8 q31[triton::size::dqword]
Concrete value of q31.
triton::uint8 q7[triton::size::dqword]
Concrete value of q7.
TRITON_EXPORT void setThumb(bool state)
Sets CPU state to Thumb mode.
TRITON_EXPORT const triton::arch::Register & getParentRegister(const triton::arch::Register ®) const
Returns parent register from a given one.
std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > memory
map of address -> concrete value
TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess &mem) const
Returns true if memory cells have a defined concrete value.
triton::uint8 q22[triton::size::dqword]
Concrete value of q22.
triton::uint8 x6[triton::size::qword]
Concrete value of x6.
triton::uint8 spsr[triton::size::dword]
Concrete value of spsr.
triton::uint8 sp[triton::size::qword]
Concrete value of sp.
TRITON_EXPORT void disassembly(triton::arch::Instruction &inst)
Disassembles the instruction according to the architecture.
triton::uint8 x12[triton::size::qword]
Concrete value of x12.
triton::uint8 x15[triton::size::qword]
Concrete value of x15.
virtual TRITON_EXPORT ~AArch64Cpu()
Destructor.
triton::uint8 q25[triton::size::dqword]
Concrete value of q25.
triton::uint8 x7[triton::size::qword]
Concrete value of x7.
TRITON_EXPORT triton::uint32 gprSize(void) const
Returns the bit in byte of the General Purpose Registers.
triton::uint8 q0[triton::size::dqword]
Concrete value of q0.
TRITON_EXPORT bool isScalarRegister(triton::arch::register_e regId) const
Returns true if regId is a scalar register.
triton::uint8 q26[triton::size::dqword]
Concrete value of q26.
TRITON_EXPORT void setConcreteMemoryValue(const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of memory cells.
triton::uint8 q17[triton::size::dqword]
Concrete value of q17.
triton::uint8 x26[triton::size::qword]
Concrete value of x26.
triton::uint8 x22[triton::size::qword]
Concrete value of x22.
triton::uint8 q8[triton::size::dqword]
Concrete value of q8.
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
triton::uint8 x24[triton::size::qword]
Concrete value of x24.
TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const
Returns the kind of endianness as triton::arch::endianness_e.
triton::uint8 q23[triton::size::dqword]
Concrete value of q23.
triton::uint8 q6[triton::size::dqword]
Concrete value of q6.
triton::uint8 x19[triton::size::qword]
Concrete value of x19.
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register ®, bool execCallbacks=true) const
Returns the concrete value of a register.
triton::uint8 q13[triton::size::dqword]
Concrete value of q13.
triton::uint8 q2[triton::size::dqword]
Concrete value of q2.
triton::uint8 x17[triton::size::qword]
Concrete value of x17.
TRITON_EXPORT void setMemoryExclusiveTag(const triton::arch::MemoryAccess &mem, bool tag)
Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
triton::uint8 q21[triton::size::dqword]
Concrete value of q21.
triton::uint8 x9[triton::size::qword]
Concrete value of x9.
triton::uint8 q11[triton::size::dqword]
Concrete value of q11.
triton::uint8 x13[triton::size::qword]
Concrete value of x13.
triton::uint8 x21[triton::size::qword]
Concrete value of x21.
triton::uint8 q3[triton::size::dqword]
Concrete value of q3.
triton::uint8 q5[triton::size::dqword]
Concrete value of q5.
triton::uint8 q19[triton::size::dqword]
Concrete value of q19.
triton::uint8 x14[triton::size::qword]
Concrete value of x14.
triton::uint8 x4[triton::size::qword]
Concrete value of x4.
triton::uint8 x25[triton::size::qword]
Concrete value of x25.
triton::uint8 x16[triton::size::qword]
Concrete value of x16.
triton::uint8 q24[triton::size::dqword]
Concrete value of q24.
triton::uint8 q16[triton::size::dqword]
Concrete value of q16.
triton::uint8 pc[triton::size::qword]
Concrete value of pc.
The AArch64Specifications class defines specifications about the AArch64 CPU.
TRITON_EXPORT triton::uint32 getMemoryOperandSpecialSize(triton::uint32 id) const
Returns memory access size if it is specified by instruction.
TRITON_EXPORT triton::arch::arm::vas_e capstoneVASToTritonVAS(triton::uint32 id) const
Converts a capstone's vas id to a triton's vas id.
TRITON_EXPORT triton::arch::arm::condition_e capstoneConditionToTritonCondition(triton::uint32 id) const
Converts a capstone's condition id to a triton's condition id.
TRITON_EXPORT triton::arch::arm::shift_e capstoneShiftToTritonShift(triton::uint32 id) const
Converts a capstone's shift id to a triton's shift id.
TRITON_EXPORT triton::arch::register_e capstoneRegisterToTritonRegister(triton::uint32 id) const
Converts a capstone's register id to a triton's register id.
TRITON_EXPORT triton::arch::arm::extend_e capstoneExtendToTritonExtend(triton::uint32 id) const
Converts a capstone's extend id to a triton's extend id.
TRITON_EXPORT triton::uint32 capstoneInstructionToTritonInstruction(triton::uint32 id) const
Converts a capstone's instruction id to a triton's instruction id.
std::unordered_map< triton::arch::register_e, const triton::arch::Register > id2reg
List of registers specification available for this architecture.
TRITON_EXPORT triton::ast::SharedAbstractNode processCallbacks(triton::callbacks::callback_e kind, triton::ast::SharedAbstractNode node)
Processes callbacks according to the kind and the C++ polymorphism.
The exception class used by all CPUs.
The exception class used by the disassembler.
The exception class used by register operands.
register_e
Types of register.
@ ID_REG_LAST_ITEM
must be the last item
constexpr triton::uint32 byte
byte size in bit
constexpr triton::uint32 qword
qword size in bit
constexpr triton::uint32 dqword
dqword size in bit
@ GET_CONCRETE_REGISTER_VALUE
@ GET_CONCRETE_MEMORY_VALUE
@ SET_CONCRETE_MEMORY_VALUE
@ SET_CONCRETE_REGISTER_VALUE
constexpr triton::uint32 dqqword
dqqword size in byte
constexpr triton::uint32 byte
byte size in byte
constexpr triton::uint32 qword
qword size in byte
std::int32_t sint32
signed 32-bits
std::uint16_t uint16
unisgned 16-bits
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
std::uint64_t uint64
unisgned 64-bits
std::uint32_t uint32
unisgned 32-bits
std::uint8_t uint8
unisgned 8-bits
TRITON_EXPORT void fromUintToBuffer(triton::uint80 value, triton::uint8 *buffer)
Inject the value into the buffer. Make sure that the buffer contains at least 10 allocated bytes.