libTriton version 1.0 build 1592
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aarch64Cpu.cpp
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1
2/*
3** Copyright (C) - Triton
4**
5** This program is under the terms of the Apache License 2.0.
6*/
7
8#include <algorithm>
9#include <cctype>
10#include <cstring>
11
12#include <triton/aarch64Cpu.hpp>
13#include <triton/architecture.hpp>
14#include <triton/coreUtils.hpp>
15#include <triton/cpuSize.hpp>
16#include <triton/exceptions.hpp>
17#include <triton/externalLibs.hpp>
18#include <triton/immediate.hpp>
19
20
21
22namespace triton {
23 namespace arch {
24 namespace arm {
25 namespace aarch64 {
26
27 AArch64Cpu::AArch64Cpu(triton::callbacks::Callbacks* callbacks) : AArch64Specifications(ARCH_AARCH64) {
28 this->callbacks = callbacks;
29 this->handle = 0;
30
31 this->clear();
32 this->disassInit();
33 }
34
35
36 AArch64Cpu::AArch64Cpu(const AArch64Cpu& other) : AArch64Specifications(ARCH_AARCH64) {
37 this->copy(other);
38 }
39
40
41 AArch64Cpu::~AArch64Cpu() {
42 this->memory.clear();
43 if (this->handle) {
44 triton::extlibs::capstone::cs_close(&this->handle);
45 }
46 }
47
48
49 void AArch64Cpu::disassInit(void) {
50 if (this->handle) {
51 triton::extlibs::capstone::cs_close(&this->handle);
52 }
53
54 if (triton::extlibs::capstone::cs_open(triton::extlibs::capstone::CS_ARCH_ARM64, triton::extlibs::capstone::CS_MODE_ARM, &this->handle) != triton::extlibs::capstone::CS_ERR_OK)
55 throw triton::exceptions::Disassembly("AArch64Cpu::disassInit(): Cannot open capstone.");
56
57 triton::extlibs::capstone::cs_option(this->handle, triton::extlibs::capstone::CS_OPT_DETAIL, triton::extlibs::capstone::CS_OPT_ON);
58 }
59
60
61 void AArch64Cpu::copy(const AArch64Cpu& other) {
62 this->callbacks = other.callbacks;
63 this->exclusiveMemoryTags = other.exclusiveMemoryTags;
64 this->memory = other.memory;
65
66 std::memcpy(this->x0, other.x0, sizeof(this->x0));
67 std::memcpy(this->x1, other.x1, sizeof(this->x1));
68 std::memcpy(this->x2, other.x2, sizeof(this->x2));
69 std::memcpy(this->x3, other.x3, sizeof(this->x3));
70 std::memcpy(this->x4, other.x4, sizeof(this->x4));
71 std::memcpy(this->x5, other.x5, sizeof(this->x5));
72 std::memcpy(this->x6, other.x6, sizeof(this->x6));
73 std::memcpy(this->x7, other.x7, sizeof(this->x7));
74 std::memcpy(this->x8, other.x8, sizeof(this->x8));
75 std::memcpy(this->x9, other.x9, sizeof(this->x9));
76 std::memcpy(this->x10, other.x10, sizeof(this->x10));
77 std::memcpy(this->x11, other.x11, sizeof(this->x11));
78 std::memcpy(this->x12, other.x12, sizeof(this->x12));
79 std::memcpy(this->x13, other.x13, sizeof(this->x13));
80 std::memcpy(this->x14, other.x14, sizeof(this->x14));
81 std::memcpy(this->x15, other.x15, sizeof(this->x15));
82 std::memcpy(this->x16, other.x16, sizeof(this->x16));
83 std::memcpy(this->x17, other.x17, sizeof(this->x17));
84 std::memcpy(this->x18, other.x18, sizeof(this->x18));
85 std::memcpy(this->x19, other.x19, sizeof(this->x19));
86 std::memcpy(this->x20, other.x20, sizeof(this->x20));
87 std::memcpy(this->x21, other.x21, sizeof(this->x21));
88 std::memcpy(this->x22, other.x22, sizeof(this->x22));
89 std::memcpy(this->x23, other.x23, sizeof(this->x23));
90 std::memcpy(this->x24, other.x24, sizeof(this->x24));
91 std::memcpy(this->x25, other.x25, sizeof(this->x25));
92 std::memcpy(this->x26, other.x26, sizeof(this->x26));
93 std::memcpy(this->x27, other.x27, sizeof(this->x27));
94 std::memcpy(this->x28, other.x28, sizeof(this->x28));
95 std::memcpy(this->x29, other.x29, sizeof(this->x29));
96 std::memcpy(this->x30, other.x30, sizeof(this->x30));
97 std::memcpy(this->q0, other.q0, sizeof(this->q0));
98 std::memcpy(this->q1, other.q1, sizeof(this->q1));
99 std::memcpy(this->q2, other.q2, sizeof(this->q2));
100 std::memcpy(this->q3, other.q3, sizeof(this->q3));
101 std::memcpy(this->q4, other.q4, sizeof(this->q4));
102 std::memcpy(this->q5, other.q5, sizeof(this->q5));
103 std::memcpy(this->q6, other.q6, sizeof(this->q6));
104 std::memcpy(this->q7, other.q7, sizeof(this->q7));
105 std::memcpy(this->q8, other.q8, sizeof(this->q8));
106 std::memcpy(this->q9, other.q9, sizeof(this->q9));
107 std::memcpy(this->q10, other.q10, sizeof(this->q10));
108 std::memcpy(this->q11, other.q11, sizeof(this->q11));
109 std::memcpy(this->q12, other.q12, sizeof(this->q12));
110 std::memcpy(this->q13, other.q13, sizeof(this->q13));
111 std::memcpy(this->q14, other.q14, sizeof(this->q14));
112 std::memcpy(this->q15, other.q15, sizeof(this->q15));
113 std::memcpy(this->q16, other.q16, sizeof(this->q16));
114 std::memcpy(this->q17, other.q17, sizeof(this->q17));
115 std::memcpy(this->q18, other.q18, sizeof(this->q18));
116 std::memcpy(this->q19, other.q19, sizeof(this->q19));
117 std::memcpy(this->q20, other.q20, sizeof(this->q20));
118 std::memcpy(this->q21, other.q21, sizeof(this->q21));
119 std::memcpy(this->q22, other.q22, sizeof(this->q22));
120 std::memcpy(this->q23, other.q23, sizeof(this->q23));
121 std::memcpy(this->q24, other.q24, sizeof(this->q24));
122 std::memcpy(this->q25, other.q25, sizeof(this->q25));
123 std::memcpy(this->q26, other.q26, sizeof(this->q26));
124 std::memcpy(this->q27, other.q27, sizeof(this->q27));
125 std::memcpy(this->q28, other.q28, sizeof(this->q28));
126 std::memcpy(this->q29, other.q29, sizeof(this->q29));
127 std::memcpy(this->q30, other.q30, sizeof(this->q30));
128 std::memcpy(this->q31, other.q31, sizeof(this->q31));
129 std::memcpy(this->sp, other.sp, sizeof(this->sp));
130 std::memcpy(this->pc, other.pc, sizeof(this->pc));
131 std::memcpy(this->spsr, other.spsr, sizeof(this->spsr));
132
134 #define SYS_REG_SPEC(_, LOWER_NAME, _2, _3, _4, _5) \
135 std::memcpy(this->LOWER_NAME, other.LOWER_NAME, sizeof(this->LOWER_NAME));
136 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
137 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
138 #include "triton/aarch64.spec"
139 }
140
141
142 void AArch64Cpu::clear(void) {
143 /* Clear memory */
144 this->memory.clear();
145
146 /* Clear registers */
147 std::memset(this->x0, 0x00, sizeof(this->x0));
148 std::memset(this->x1, 0x00, sizeof(this->x1));
149 std::memset(this->x2, 0x00, sizeof(this->x2));
150 std::memset(this->x3, 0x00, sizeof(this->x3));
151 std::memset(this->x4, 0x00, sizeof(this->x4));
152 std::memset(this->x5, 0x00, sizeof(this->x5));
153 std::memset(this->x6, 0x00, sizeof(this->x6));
154 std::memset(this->x7, 0x00, sizeof(this->x7));
155 std::memset(this->x8, 0x00, sizeof(this->x8));
156 std::memset(this->x9, 0x00, sizeof(this->x9));
157 std::memset(this->x10, 0x00, sizeof(this->x10));
158 std::memset(this->x11, 0x00, sizeof(this->x11));
159 std::memset(this->x12, 0x00, sizeof(this->x12));
160 std::memset(this->x13, 0x00, sizeof(this->x13));
161 std::memset(this->x14, 0x00, sizeof(this->x14));
162 std::memset(this->x15, 0x00, sizeof(this->x15));
163 std::memset(this->x16, 0x00, sizeof(this->x16));
164 std::memset(this->x17, 0x00, sizeof(this->x17));
165 std::memset(this->x18, 0x00, sizeof(this->x18));
166 std::memset(this->x19, 0x00, sizeof(this->x19));
167 std::memset(this->x20, 0x00, sizeof(this->x20));
168 std::memset(this->x21, 0x00, sizeof(this->x21));
169 std::memset(this->x22, 0x00, sizeof(this->x22));
170 std::memset(this->x23, 0x00, sizeof(this->x23));
171 std::memset(this->x24, 0x00, sizeof(this->x24));
172 std::memset(this->x25, 0x00, sizeof(this->x25));
173 std::memset(this->x26, 0x00, sizeof(this->x26));
174 std::memset(this->x27, 0x00, sizeof(this->x27));
175 std::memset(this->x28, 0x00, sizeof(this->x28));
176 std::memset(this->x29, 0x00, sizeof(this->x29));
177 std::memset(this->x30, 0x00, sizeof(this->x30));
178 std::memset(this->q0, 0x00, sizeof(this->q0));
179 std::memset(this->q1, 0x00, sizeof(this->q1));
180 std::memset(this->q2, 0x00, sizeof(this->q2));
181 std::memset(this->q3, 0x00, sizeof(this->q3));
182 std::memset(this->q4, 0x00, sizeof(this->q4));
183 std::memset(this->q5, 0x00, sizeof(this->q5));
184 std::memset(this->q6, 0x00, sizeof(this->q6));
185 std::memset(this->q7, 0x00, sizeof(this->q7));
186 std::memset(this->q8, 0x00, sizeof(this->q8));
187 std::memset(this->q9, 0x00, sizeof(this->q9));
188 std::memset(this->q10, 0x00, sizeof(this->q10));
189 std::memset(this->q11, 0x00, sizeof(this->q11));
190 std::memset(this->q12, 0x00, sizeof(this->q12));
191 std::memset(this->q13, 0x00, sizeof(this->q13));
192 std::memset(this->q14, 0x00, sizeof(this->q14));
193 std::memset(this->q15, 0x00, sizeof(this->q15));
194 std::memset(this->q16, 0x00, sizeof(this->q16));
195 std::memset(this->q17, 0x00, sizeof(this->q17));
196 std::memset(this->q18, 0x00, sizeof(this->q18));
197 std::memset(this->q19, 0x00, sizeof(this->q19));
198 std::memset(this->q20, 0x00, sizeof(this->q20));
199 std::memset(this->q21, 0x00, sizeof(this->q21));
200 std::memset(this->q22, 0x00, sizeof(this->q22));
201 std::memset(this->q23, 0x00, sizeof(this->q23));
202 std::memset(this->q24, 0x00, sizeof(this->q24));
203 std::memset(this->q25, 0x00, sizeof(this->q25));
204 std::memset(this->q26, 0x00, sizeof(this->q26));
205 std::memset(this->q27, 0x00, sizeof(this->q27));
206 std::memset(this->q28, 0x00, sizeof(this->q28));
207 std::memset(this->q29, 0x00, sizeof(this->q29));
208 std::memset(this->q30, 0x00, sizeof(this->q30));
209 std::memset(this->q31, 0x00, sizeof(this->q31));
210 std::memset(this->sp, 0x00, sizeof(this->sp));
211 std::memset(this->pc, 0x00, sizeof(this->pc));
212 std::memset(this->spsr, 0x00, sizeof(this->spsr));
213
215 #define SYS_REG_SPEC(_, LOWER_NAME, _2, _3, _4, _5) \
216 std::memset(this->LOWER_NAME, 0x00, sizeof(this->LOWER_NAME));
217 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
218 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
219 #include "triton/aarch64.spec"
220 }
221
222
223 AArch64Cpu& AArch64Cpu::operator=(const AArch64Cpu& other) {
224 this->copy(other);
225 return *this;
226 }
227
228
232
233
234 bool AArch64Cpu::isFlag(triton::arch::register_e regId) const {
235 return ((regId >= triton::arch::ID_REG_AARCH64_C && regId <= triton::arch::ID_REG_AARCH64_Z) ? true : false);
236 }
237
238
239 bool AArch64Cpu::isRegister(triton::arch::register_e regId) const {
240 return (this->isGPR(regId) || this->isScalarRegister(regId) || this->isVectorRegister(regId) || this->isSystemRegister(regId));
241 }
242
243
244 bool AArch64Cpu::isRegisterValid(triton::arch::register_e regId) const {
245 return (this->isFlag(regId) || this->isRegister(regId));
246 }
247
248
249 bool AArch64Cpu::isGPR(triton::arch::register_e regId) const {
250 return ((regId >= triton::arch::ID_REG_AARCH64_X0 && regId <= triton::arch::ID_REG_AARCH64_WZR) ? true : false);
251 }
252
253
254 bool AArch64Cpu::isScalarRegister(triton::arch::register_e regId) const {
255 return ((regId >= triton::arch::ID_REG_AARCH64_Q0 && regId <= triton::arch::ID_REG_AARCH64_B31) ? true : false);
256 }
257
258
259 bool AArch64Cpu::isVectorRegister(triton::arch::register_e regId) const {
260 return ((regId >= triton::arch::ID_REG_AARCH64_V0 && regId <= triton::arch::ID_REG_AARCH64_V31) ? true : false);
261 }
262
263
264 bool AArch64Cpu::isSystemRegister(triton::arch::register_e regId) const {
265 return ((regId >= triton::arch::ID_REG_AARCH64_ACTLR_EL1 && regId <= triton::arch::ID_REG_AARCH64_ZCR_EL3) ? true : false);
266 }
267
268
272
273
277
278
282
283
284 const std::unordered_map<triton::arch::register_e, const triton::arch::Register>& AArch64Cpu::getAllRegisters(void) const {
285 return this->id2reg;
286 }
287
288 const std::unordered_map<triton::uint64, triton::uint8, IdentityHash<triton::uint64>>& AArch64Cpu::getConcreteMemory(void) const {
289 return this->memory;
290 }
291
292
293 std::set<const triton::arch::Register*> AArch64Cpu::getParentRegisters(void) const {
294 std::set<const triton::arch::Register*> ret;
295
296 for (const auto& kv: this->id2reg) {
297 auto regId = kv.first;
298 const auto& reg = kv.second;
299
300 /* Skip Vector registers */
301 if (this->isVectorRegister(regId))
302 continue;
303
304 /* Add GPR */
305 else if (this->isGPR(regId) && reg.getSize() == this->gprSize())
306 ret.insert(&reg);
307
308 /* Add SPSR */
309 else if (regId == ID_REG_AARCH64_SPSR)
310 ret.insert(&reg);
311
312 /* Add scalar register */
313 else if (this->isScalarRegister(regId) && reg.getBitSize() == triton::bitsize::dqword)
314 ret.insert(&reg);
315
316 /* Add Flags */
317 else if (this->isFlag(regId))
318 ret.insert(&reg);
319
320 /* Add System Registers */
321 else if (this->isSystemRegister(regId))
322 ret.insert(&reg);
323 }
324
325 return ret;
326 }
327
328
329 const triton::arch::Register& AArch64Cpu::getRegister(triton::arch::register_e id) const {
330 try {
331 return this->id2reg.at(id);
332 } catch (const std::out_of_range&) {
333 throw triton::exceptions::Cpu("AArch64Cpu::getRegister(): Invalid register for this architecture.");
334 }
335 }
336
337
338 const triton::arch::Register& AArch64Cpu::getRegister(const std::string& name) const {
339 std::string lower = name;
340 std::transform(lower.begin(), lower.end(), lower.begin(), [](unsigned char c){ return std::tolower(c); });
341 try {
342 return this->getRegister(this->name2id.at(lower));
343 } catch (const std::out_of_range&) {
344 throw triton::exceptions::Cpu("AArch64Cpu::getRegister(): Invalid register for this architecture.");
345 }
346 }
347
348
352
353
357
358
359 const triton::arch::Register& AArch64Cpu::getProgramCounter(void) const {
360 return this->getRegister(this->pcId);
361 }
362
363
364 const triton::arch::Register& AArch64Cpu::getStackPointer(void) const {
365 return this->getRegister(this->spId);
366 }
367
368
369 void AArch64Cpu::disassembly(triton::arch::Instruction& inst) {
370 triton::extlibs::capstone::cs_insn* insn;
371 triton::usize count = 0;
372 triton::uint32 size = 0;
373
374 /* Check if the opcode and opcode' size are defined */
375 if (inst.getOpcode() == nullptr || inst.getSize() == 0)
376 throw triton::exceptions::Disassembly("AArch64Cpu::disassembly(): Opcode and opcodeSize must be definied.");
377
378 /* Clear instructicon's operands if alredy defined */
379 inst.operands.clear();
380
381 /* Update instruction address if undefined */
382 if (!inst.getAddress()) {
383 inst.setAddress(static_cast<triton::uint64>(this->getConcreteRegisterValue(this->getProgramCounter())));
384 }
385
386 /* Let's disass and build our operands */
387 count = triton::extlibs::capstone::cs_disasm(this->handle, inst.getOpcode(), inst.getSize(), inst.getAddress(), 0, &insn);
388 if (count > 0) {
389 /* Detail information */
390 triton::extlibs::capstone::cs_detail* detail = insn->detail;
391
392 /* Init the disassembly */
393 std::stringstream str;
394
395 str << insn[0].mnemonic;
396 if (detail->arm64.op_count)
397 str << " " << insn[0].op_str;
398
399 inst.setDisassembly(str.str());
400
401 /* Refine the size */
402 inst.setSize(insn[0].size);
403
404 /* Init the instruction's type */
405 inst.setType(this->capstoneInstructionToTritonInstruction(insn[0].id));
406
407 /* Init the instruction's code codition */
408 inst.setCodeCondition(this->capstoneConditionToTritonCondition(detail->arm64.cc));
409
410 /* Init the instruction's write back flag */
411 inst.setWriteBack(detail->arm64.writeback);
412
413 /* Set True if the instruction udpate flags */
414 inst.setUpdateFlag(detail->arm64.update_flags);
415
416 /* Set architecture */
417 inst.setArchitecture(triton::arch::ARCH_AARCH64);
418
419 /* Init operands */
420 for (triton::uint32 n = 0; n < detail->arm64.op_count; n++) {
421 triton::extlibs::capstone::cs_arm64_op* op = &(detail->arm64.operands[n]);
422 switch(op->type) {
423
424 case triton::extlibs::capstone::ARM64_OP_IMM: {
425 triton::arch::Immediate imm(op->imm, size ? size : triton::size::qword);
426
427 /*
428 * Instruction such that CBZ, CBNZ or TBZ may imply a wrong size.
429 * So, if Triton truncates the value by setting a size less than
430 * the original one, we redefine the size automatically.
431 */
432 if (static_cast<triton::uint64>(op->imm) > imm.getValue()) {
433 imm = Immediate();
434 imm.setValue(op->imm, 0); /* By setting 0 as size, we automatically identify the size of the value */
435 }
436
437 /* Set Shift type and value */
438 imm.setShiftType(this->capstoneShiftToTritonShift(op->shift.type));
439 imm.setShiftValue(op->shift.value);
440
441 inst.operands.push_back(triton::arch::OperandWrapper(imm));
442 break;
443 }
444
445 case triton::extlibs::capstone::ARM64_OP_MEM: {
446 triton::arch::MemoryAccess mem;
447
448 /* Set the size of the memory access */
449 mem.setBits(size ? ((size * triton::bitsize::byte) - 1) : triton::bitsize::qword - 1, 0);
450
451 /* LEA if exists */
452 triton::arch::Register base(*this, this->capstoneRegisterToTritonRegister(op->mem.base));
453 triton::arch::Register index(*this, this->capstoneRegisterToTritonRegister(op->mem.index));
454
455 triton::uint32 immsize = (
456 this->isRegisterValid(base.getId()) ? base.getSize() :
457 this->isRegisterValid(index.getId()) ? index.getSize() :
458 this->gprSize()
459 );
460
461 triton::arch::Immediate disp(op->mem.disp, immsize);
462
463 /* Specify that LEA contains a PC relative */
464 if (base.getId() == this->pcId) {
465 mem.setPcRelative(inst.getNextAddress());
466 }
467
468 /* Set Shift type and value */
469 index.setShiftType(this->capstoneShiftToTritonShift(op->shift.type));
470 index.setShiftValue(op->shift.value);
471
472 /* Set extend type and size */
473 index.setExtendType(this->capstoneExtendToTritonExtend(op->ext));
474 if (op->ext != triton::extlibs::capstone::ARM64_EXT_INVALID) {
475 index.setExtendedSize(base.getBitSize());
476 }
477
478 /* Note that in ARM64 there is no segment register and scale value */
479 mem.setBaseRegister(base);
480 mem.setIndexRegister(index);
481 mem.setDisplacement(disp);
482
483 /* If there is an index register available, set scale to 1 to perform this following computation (base) + (index * scale) */
484 if (this->isRegisterValid(index.getId())) {
485 mem.setScale(triton::arch::Immediate(1, immsize));
486 }
487
488 inst.operands.push_back(triton::arch::OperandWrapper(mem));
489 break;
490 }
491
492 case triton::extlibs::capstone::ARM64_OP_REG: {
493 triton::arch::Register reg(*this, this->capstoneRegisterToTritonRegister(op->reg));
494
495 /* Set Shift type and value */
496 reg.setShiftType(this->capstoneShiftToTritonShift(op->shift.type));
497 reg.setShiftValue(op->shift.value);
498
499 /* Set extend type and size */
500 reg.setExtendType(this->capstoneExtendToTritonExtend(op->ext));
501 if (op->ext != triton::extlibs::capstone::ARM64_EXT_INVALID) {
502 reg.setExtendedSize(size * triton::bitsize::byte);
503 }
504
505 /* Init the vector arrangement specifier */
506 reg.setVASType(this->capstoneVASToTritonVAS(op->vas));
507
508 /* Init the vector index (-1 if irrelevant) */
509 reg.setVectorIndex(op->vector_index);
510
511 /* Define a base address for next operand */
512 size = this->getMemoryOperandSpecialSize(inst.getType());
513 if (!size) {
514 size = reg.getSize();
515 }
516
517 inst.operands.push_back(triton::arch::OperandWrapper(reg));
518 break;
519 }
520
521 case triton::extlibs::capstone::ARM64_OP_SYS: {
522 triton::arch::Register reg(*this, this->capstoneRegisterToTritonRegister(op->reg));
523
524 /* Define a base address for next operand */
525 size = this->getMemoryOperandSpecialSize(inst.getType());
526 if (!size) {
527 size = reg.getSize();
528 }
529
530 inst.operands.push_back(triton::arch::OperandWrapper(reg));
531 break;
532 }
533
534 default:
535 /* NOTE: FP, CIMM, and missing one are not supported yet. */
536 throw triton::exceptions::Disassembly("AArch64Cpu::disassembly(): Invalid operand.");
537 } // switch
538 } // for operand
539
540 /* Set control flow */
541 if (insn[0].id == triton::extlibs::capstone::ARM64_INS_RET)
542 inst.setControlFlow(true);
543
544 /* Set branch */
545 if (detail->groups_count > 0) {
546 for (triton::uint32 n = 0; n < detail->groups_count; n++) {
547 if (detail->groups[n] == triton::extlibs::capstone::ARM64_GRP_JUMP) {
548 inst.setBranch(true);
549 inst.setControlFlow(true);
550 }
551 }
552 }
553
554 /* Free capstone stuffs */
555 triton::extlibs::capstone::cs_free(insn, count);
556 }
557 else
558 throw triton::exceptions::Disassembly("AArch64Cpu::disassembly(): Failed to disassemble the given code.");
559 }
560
561
562 triton::uint8 AArch64Cpu::getConcreteMemoryValue(triton::uint64 addr, bool execCallbacks) const {
563 if (execCallbacks && this->callbacks)
564 this->callbacks->processCallbacks(triton::callbacks::GET_CONCRETE_MEMORY_VALUE, MemoryAccess(addr, triton::size::byte));
565
566 auto it = this->memory.find(addr);
567 if (it == this->memory.end())
568 return 0x00;
569
570 return it->second;
571 }
572
573
574 triton::uint512 AArch64Cpu::getConcreteMemoryValue(const triton::arch::MemoryAccess& mem, bool execCallbacks) const {
575 triton::uint512 ret = 0;
576 triton::uint64 addr = 0;
577 triton::uint32 size = 0;
578
579 if (execCallbacks && this->callbacks)
580 this->callbacks->processCallbacks(triton::callbacks::GET_CONCRETE_MEMORY_VALUE, mem);
581
582 addr = mem.getAddress();
583 size = mem.getSize();
584
585 if (size == 0 || size > triton::size::dqqword)
586 throw triton::exceptions::Cpu("AArch64Cpu::getConcreteMemoryValue(): Invalid size memory.");
587
588 for (triton::sint32 i = size-1; i >= 0; i--)
589 ret = ((ret << triton::bitsize::byte) | this->getConcreteMemoryValue(addr+i, false));
590
591 return ret;
592 }
593
594
595 std::vector<triton::uint8> AArch64Cpu::getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks) const {
596 std::vector<triton::uint8> area;
597
598 for (triton::usize index = 0; index < size; index++)
599 area.push_back(this->getConcreteMemoryValue(baseAddr+index, execCallbacks));
600
601 return area;
602 }
603
604
605 triton::uint512 AArch64Cpu::getConcreteRegisterValue(const triton::arch::Register& reg, bool execCallbacks) const {
606 triton::uint512 value = 0;
607
608 if (execCallbacks && this->callbacks)
609 this->callbacks->processCallbacks(triton::callbacks::GET_CONCRETE_REGISTER_VALUE, reg);
610
611 switch (reg.getId()) {
612 case triton::arch::ID_REG_AARCH64_X0: return (*((triton::uint64*)(this->x0)));
613 case triton::arch::ID_REG_AARCH64_W0: return (*((triton::uint32*)(this->x0)));
614 case triton::arch::ID_REG_AARCH64_X1: return (*((triton::uint64*)(this->x1)));
615 case triton::arch::ID_REG_AARCH64_W1: return (*((triton::uint32*)(this->x1)));
616 case triton::arch::ID_REG_AARCH64_X2: return (*((triton::uint64*)(this->x2)));
617 case triton::arch::ID_REG_AARCH64_W2: return (*((triton::uint32*)(this->x2)));
618 case triton::arch::ID_REG_AARCH64_X3: return (*((triton::uint64*)(this->x3)));
619 case triton::arch::ID_REG_AARCH64_W3: return (*((triton::uint32*)(this->x3)));
620 case triton::arch::ID_REG_AARCH64_X4: return (*((triton::uint64*)(this->x4)));
621 case triton::arch::ID_REG_AARCH64_W4: return (*((triton::uint32*)(this->x4)));
622 case triton::arch::ID_REG_AARCH64_X5: return (*((triton::uint64*)(this->x5)));
623 case triton::arch::ID_REG_AARCH64_W5: return (*((triton::uint32*)(this->x5)));
624 case triton::arch::ID_REG_AARCH64_X6: return (*((triton::uint64*)(this->x6)));
625 case triton::arch::ID_REG_AARCH64_W6: return (*((triton::uint32*)(this->x6)));
626 case triton::arch::ID_REG_AARCH64_X7: return (*((triton::uint64*)(this->x7)));
627 case triton::arch::ID_REG_AARCH64_W7: return (*((triton::uint32*)(this->x7)));
628 case triton::arch::ID_REG_AARCH64_X8: return (*((triton::uint64*)(this->x8)));
629 case triton::arch::ID_REG_AARCH64_W8: return (*((triton::uint32*)(this->x8)));
630 case triton::arch::ID_REG_AARCH64_X9: return (*((triton::uint64*)(this->x9)));
631 case triton::arch::ID_REG_AARCH64_W9: return (*((triton::uint32*)(this->x9)));
632 case triton::arch::ID_REG_AARCH64_X10: return (*((triton::uint64*)(this->x10)));
633 case triton::arch::ID_REG_AARCH64_W10: return (*((triton::uint32*)(this->x10)));
634 case triton::arch::ID_REG_AARCH64_X11: return (*((triton::uint64*)(this->x11)));
635 case triton::arch::ID_REG_AARCH64_W11: return (*((triton::uint32*)(this->x11)));
636 case triton::arch::ID_REG_AARCH64_X12: return (*((triton::uint64*)(this->x12)));
637 case triton::arch::ID_REG_AARCH64_W12: return (*((triton::uint32*)(this->x12)));
638 case triton::arch::ID_REG_AARCH64_X13: return (*((triton::uint64*)(this->x13)));
639 case triton::arch::ID_REG_AARCH64_W13: return (*((triton::uint32*)(this->x13)));
640 case triton::arch::ID_REG_AARCH64_X14: return (*((triton::uint64*)(this->x14)));
641 case triton::arch::ID_REG_AARCH64_W14: return (*((triton::uint32*)(this->x14)));
642 case triton::arch::ID_REG_AARCH64_X15: return (*((triton::uint64*)(this->x15)));
643 case triton::arch::ID_REG_AARCH64_W15: return (*((triton::uint32*)(this->x15)));
644 case triton::arch::ID_REG_AARCH64_X16: return (*((triton::uint64*)(this->x16)));
645 case triton::arch::ID_REG_AARCH64_W16: return (*((triton::uint32*)(this->x16)));
646 case triton::arch::ID_REG_AARCH64_X17: return (*((triton::uint64*)(this->x17)));
647 case triton::arch::ID_REG_AARCH64_W17: return (*((triton::uint32*)(this->x17)));
648 case triton::arch::ID_REG_AARCH64_X18: return (*((triton::uint64*)(this->x18)));
649 case triton::arch::ID_REG_AARCH64_W18: return (*((triton::uint32*)(this->x18)));
650 case triton::arch::ID_REG_AARCH64_X19: return (*((triton::uint64*)(this->x19)));
651 case triton::arch::ID_REG_AARCH64_W19: return (*((triton::uint32*)(this->x19)));
652 case triton::arch::ID_REG_AARCH64_X20: return (*((triton::uint64*)(this->x20)));
653 case triton::arch::ID_REG_AARCH64_W20: return (*((triton::uint32*)(this->x20)));
654 case triton::arch::ID_REG_AARCH64_X21: return (*((triton::uint64*)(this->x21)));
655 case triton::arch::ID_REG_AARCH64_W21: return (*((triton::uint32*)(this->x21)));
656 case triton::arch::ID_REG_AARCH64_X22: return (*((triton::uint64*)(this->x22)));
657 case triton::arch::ID_REG_AARCH64_W22: return (*((triton::uint32*)(this->x22)));
658 case triton::arch::ID_REG_AARCH64_X23: return (*((triton::uint64*)(this->x23)));
659 case triton::arch::ID_REG_AARCH64_W23: return (*((triton::uint32*)(this->x23)));
660 case triton::arch::ID_REG_AARCH64_X24: return (*((triton::uint64*)(this->x24)));
661 case triton::arch::ID_REG_AARCH64_W24: return (*((triton::uint32*)(this->x24)));
662 case triton::arch::ID_REG_AARCH64_X25: return (*((triton::uint64*)(this->x25)));
663 case triton::arch::ID_REG_AARCH64_W25: return (*((triton::uint32*)(this->x25)));
664 case triton::arch::ID_REG_AARCH64_X26: return (*((triton::uint64*)(this->x26)));
665 case triton::arch::ID_REG_AARCH64_W26: return (*((triton::uint32*)(this->x26)));
666 case triton::arch::ID_REG_AARCH64_X27: return (*((triton::uint64*)(this->x27)));
667 case triton::arch::ID_REG_AARCH64_W27: return (*((triton::uint32*)(this->x27)));
668 case triton::arch::ID_REG_AARCH64_X28: return (*((triton::uint64*)(this->x28)));
669 case triton::arch::ID_REG_AARCH64_W28: return (*((triton::uint32*)(this->x28)));
670 case triton::arch::ID_REG_AARCH64_X29: return (*((triton::uint64*)(this->x29)));
671 case triton::arch::ID_REG_AARCH64_W29: return (*((triton::uint32*)(this->x29)));
672 case triton::arch::ID_REG_AARCH64_X30: return (*((triton::uint64*)(this->x30)));
673 case triton::arch::ID_REG_AARCH64_W30: return (*((triton::uint32*)(this->x30)));
674 case triton::arch::ID_REG_AARCH64_SP: return (*((triton::uint64*)(this->sp)));
675 case triton::arch::ID_REG_AARCH64_WSP: return (*((triton::uint32*)(this->sp)));
676 case triton::arch::ID_REG_AARCH64_PC: return (*((triton::uint64*)(this->pc)));
677 case triton::arch::ID_REG_AARCH64_XZR: return 0;
678 case triton::arch::ID_REG_AARCH64_WZR: return 0;
679 case triton::arch::ID_REG_AARCH64_SPSR: return (*((triton::uint32*)(this->spsr)));
680 case triton::arch::ID_REG_AARCH64_N: return (((*((triton::uint32*)(this->spsr))) >> 31) & 1);
681 case triton::arch::ID_REG_AARCH64_Z: return (((*((triton::uint32*)(this->spsr))) >> 30) & 1);
682 case triton::arch::ID_REG_AARCH64_C: return (((*((triton::uint32*)(this->spsr))) >> 29) & 1);
683 case triton::arch::ID_REG_AARCH64_V: return (((*((triton::uint32*)(this->spsr))) >> 28) & 1);
684 case triton::arch::ID_REG_AARCH64_Q0: return triton::utils::cast<triton::uint128>(this->q0);
685 case triton::arch::ID_REG_AARCH64_D0: return (*((triton::uint64*)(this->q0)));
686 case triton::arch::ID_REG_AARCH64_S0: return (*((triton::uint32*)(this->q0)));
687 case triton::arch::ID_REG_AARCH64_H0: return (*((triton::uint16*)(this->q0)));
688 case triton::arch::ID_REG_AARCH64_B0: return (*((triton::uint8*)(this->q0)));
689 case triton::arch::ID_REG_AARCH64_Q1: return triton::utils::cast<triton::uint128>(this->q1);
690 case triton::arch::ID_REG_AARCH64_D1: return (*((triton::uint64*)(this->q1)));
691 case triton::arch::ID_REG_AARCH64_S1: return (*((triton::uint32*)(this->q1)));
692 case triton::arch::ID_REG_AARCH64_H1: return (*((triton::uint16*)(this->q1)));
693 case triton::arch::ID_REG_AARCH64_B1: return (*((triton::uint8*)(this->q1)));
694 case triton::arch::ID_REG_AARCH64_Q2: return triton::utils::cast<triton::uint128>(this->q2);
695 case triton::arch::ID_REG_AARCH64_D2: return (*((triton::uint64*)(this->q2)));
696 case triton::arch::ID_REG_AARCH64_S2: return (*((triton::uint32*)(this->q2)));
697 case triton::arch::ID_REG_AARCH64_H2: return (*((triton::uint16*)(this->q2)));
698 case triton::arch::ID_REG_AARCH64_B2: return (*((triton::uint8*)(this->q2)));
699 case triton::arch::ID_REG_AARCH64_Q3: return triton::utils::cast<triton::uint128>(this->q3);
700 case triton::arch::ID_REG_AARCH64_D3: return (*((triton::uint64*)(this->q3)));
701 case triton::arch::ID_REG_AARCH64_S3: return (*((triton::uint32*)(this->q3)));
702 case triton::arch::ID_REG_AARCH64_H3: return (*((triton::uint16*)(this->q3)));
703 case triton::arch::ID_REG_AARCH64_B3: return (*((triton::uint8*)(this->q3)));
704 case triton::arch::ID_REG_AARCH64_Q4: return triton::utils::cast<triton::uint128>(this->q4);
705 case triton::arch::ID_REG_AARCH64_D4: return (*((triton::uint64*)(this->q4)));
706 case triton::arch::ID_REG_AARCH64_S4: return (*((triton::uint32*)(this->q4)));
707 case triton::arch::ID_REG_AARCH64_H4: return (*((triton::uint16*)(this->q4)));
708 case triton::arch::ID_REG_AARCH64_B4: return (*((triton::uint8*)(this->q4)));
709 case triton::arch::ID_REG_AARCH64_Q5: return triton::utils::cast<triton::uint128>(this->q5);
710 case triton::arch::ID_REG_AARCH64_D5: return (*((triton::uint64*)(this->q5)));
711 case triton::arch::ID_REG_AARCH64_S5: return (*((triton::uint32*)(this->q5)));
712 case triton::arch::ID_REG_AARCH64_H5: return (*((triton::uint16*)(this->q5)));
713 case triton::arch::ID_REG_AARCH64_B5: return (*((triton::uint8*)(this->q5)));
714 case triton::arch::ID_REG_AARCH64_Q6: return triton::utils::cast<triton::uint128>(this->q6);
715 case triton::arch::ID_REG_AARCH64_D6: return (*((triton::uint64*)(this->q6)));
716 case triton::arch::ID_REG_AARCH64_S6: return (*((triton::uint32*)(this->q6)));
717 case triton::arch::ID_REG_AARCH64_H6: return (*((triton::uint16*)(this->q6)));
718 case triton::arch::ID_REG_AARCH64_B6: return (*((triton::uint8*)(this->q6)));
719 case triton::arch::ID_REG_AARCH64_Q7: return triton::utils::cast<triton::uint128>(this->q7);
720 case triton::arch::ID_REG_AARCH64_D7: return (*((triton::uint64*)(this->q7)));
721 case triton::arch::ID_REG_AARCH64_S7: return (*((triton::uint32*)(this->q7)));
722 case triton::arch::ID_REG_AARCH64_H7: return (*((triton::uint16*)(this->q7)));
723 case triton::arch::ID_REG_AARCH64_B7: return (*((triton::uint8*)(this->q7)));
724 case triton::arch::ID_REG_AARCH64_Q8: return triton::utils::cast<triton::uint128>(this->q8);
725 case triton::arch::ID_REG_AARCH64_D8: return (*((triton::uint64*)(this->q8)));
726 case triton::arch::ID_REG_AARCH64_S8: return (*((triton::uint32*)(this->q8)));
727 case triton::arch::ID_REG_AARCH64_H8: return (*((triton::uint16*)(this->q8)));
728 case triton::arch::ID_REG_AARCH64_B8: return (*((triton::uint8*)(this->q8)));
729 case triton::arch::ID_REG_AARCH64_Q9: return triton::utils::cast<triton::uint128>(this->q9);
730 case triton::arch::ID_REG_AARCH64_D9: return (*((triton::uint64*)(this->q9)));
731 case triton::arch::ID_REG_AARCH64_S9: return (*((triton::uint32*)(this->q9)));
732 case triton::arch::ID_REG_AARCH64_H9: return (*((triton::uint16*)(this->q9)));
733 case triton::arch::ID_REG_AARCH64_B9: return (*((triton::uint8*)(this->q9)));
734 case triton::arch::ID_REG_AARCH64_Q10: return triton::utils::cast<triton::uint128>(this->q10);
735 case triton::arch::ID_REG_AARCH64_D10: return (*((triton::uint64*)(this->q10)));
736 case triton::arch::ID_REG_AARCH64_S10: return (*((triton::uint32*)(this->q10)));
737 case triton::arch::ID_REG_AARCH64_H10: return (*((triton::uint16*)(this->q10)));
738 case triton::arch::ID_REG_AARCH64_B10: return (*((triton::uint8*)(this->q10)));
739 case triton::arch::ID_REG_AARCH64_Q11: return triton::utils::cast<triton::uint128>(this->q11);
740 case triton::arch::ID_REG_AARCH64_D11: return (*((triton::uint64*)(this->q11)));
741 case triton::arch::ID_REG_AARCH64_S11: return (*((triton::uint32*)(this->q11)));
742 case triton::arch::ID_REG_AARCH64_H11: return (*((triton::uint16*)(this->q11)));
743 case triton::arch::ID_REG_AARCH64_B11: return (*((triton::uint8*)(this->q11)));
744 case triton::arch::ID_REG_AARCH64_Q12: return triton::utils::cast<triton::uint128>(this->q12);
745 case triton::arch::ID_REG_AARCH64_D12: return (*((triton::uint64*)(this->q12)));
746 case triton::arch::ID_REG_AARCH64_S12: return (*((triton::uint32*)(this->q12)));
747 case triton::arch::ID_REG_AARCH64_H12: return (*((triton::uint16*)(this->q12)));
748 case triton::arch::ID_REG_AARCH64_B12: return (*((triton::uint8*)(this->q12)));
749 case triton::arch::ID_REG_AARCH64_Q13: return triton::utils::cast<triton::uint128>(this->q13);
750 case triton::arch::ID_REG_AARCH64_D13: return (*((triton::uint64*)(this->q13)));
751 case triton::arch::ID_REG_AARCH64_S13: return (*((triton::uint32*)(this->q13)));
752 case triton::arch::ID_REG_AARCH64_H13: return (*((triton::uint16*)(this->q13)));
753 case triton::arch::ID_REG_AARCH64_B13: return (*((triton::uint8*)(this->q13)));
754 case triton::arch::ID_REG_AARCH64_Q14: return triton::utils::cast<triton::uint128>(this->q14);
755 case triton::arch::ID_REG_AARCH64_D14: return (*((triton::uint64*)(this->q14)));
756 case triton::arch::ID_REG_AARCH64_S14: return (*((triton::uint32*)(this->q14)));
757 case triton::arch::ID_REG_AARCH64_H14: return (*((triton::uint16*)(this->q14)));
758 case triton::arch::ID_REG_AARCH64_B14: return (*((triton::uint8*)(this->q14)));
759 case triton::arch::ID_REG_AARCH64_Q15: return triton::utils::cast<triton::uint128>(this->q15);
760 case triton::arch::ID_REG_AARCH64_D15: return (*((triton::uint64*)(this->q15)));
761 case triton::arch::ID_REG_AARCH64_S15: return (*((triton::uint32*)(this->q15)));
762 case triton::arch::ID_REG_AARCH64_H15: return (*((triton::uint16*)(this->q15)));
763 case triton::arch::ID_REG_AARCH64_B15: return (*((triton::uint8*)(this->q15)));
764 case triton::arch::ID_REG_AARCH64_Q16: return triton::utils::cast<triton::uint128>(this->q16);
765 case triton::arch::ID_REG_AARCH64_D16: return (*((triton::uint64*)(this->q16)));
766 case triton::arch::ID_REG_AARCH64_S16: return (*((triton::uint32*)(this->q16)));
767 case triton::arch::ID_REG_AARCH64_H16: return (*((triton::uint16*)(this->q16)));
768 case triton::arch::ID_REG_AARCH64_B16: return (*((triton::uint8*)(this->q16)));
769 case triton::arch::ID_REG_AARCH64_Q17: return triton::utils::cast<triton::uint128>(this->q17);
770 case triton::arch::ID_REG_AARCH64_D17: return (*((triton::uint64*)(this->q17)));
771 case triton::arch::ID_REG_AARCH64_S17: return (*((triton::uint32*)(this->q17)));
772 case triton::arch::ID_REG_AARCH64_H17: return (*((triton::uint16*)(this->q17)));
773 case triton::arch::ID_REG_AARCH64_B17: return (*((triton::uint8*)(this->q17)));
774 case triton::arch::ID_REG_AARCH64_Q18: return triton::utils::cast<triton::uint128>(this->q18);
775 case triton::arch::ID_REG_AARCH64_D18: return (*((triton::uint64*)(this->q18)));
776 case triton::arch::ID_REG_AARCH64_S18: return (*((triton::uint32*)(this->q18)));
777 case triton::arch::ID_REG_AARCH64_H18: return (*((triton::uint16*)(this->q18)));
778 case triton::arch::ID_REG_AARCH64_B18: return (*((triton::uint8*)(this->q18)));
779 case triton::arch::ID_REG_AARCH64_Q19: return triton::utils::cast<triton::uint128>(this->q19);
780 case triton::arch::ID_REG_AARCH64_D19: return (*((triton::uint64*)(this->q19)));
781 case triton::arch::ID_REG_AARCH64_S19: return (*((triton::uint32*)(this->q19)));
782 case triton::arch::ID_REG_AARCH64_H19: return (*((triton::uint16*)(this->q19)));
783 case triton::arch::ID_REG_AARCH64_B19: return (*((triton::uint8*)(this->q19)));
784 case triton::arch::ID_REG_AARCH64_Q20: return triton::utils::cast<triton::uint128>(this->q20);
785 case triton::arch::ID_REG_AARCH64_D20: return (*((triton::uint64*)(this->q20)));
786 case triton::arch::ID_REG_AARCH64_S20: return (*((triton::uint32*)(this->q20)));
787 case triton::arch::ID_REG_AARCH64_H20: return (*((triton::uint16*)(this->q20)));
788 case triton::arch::ID_REG_AARCH64_B20: return (*((triton::uint8*)(this->q20)));
789 case triton::arch::ID_REG_AARCH64_Q21: return triton::utils::cast<triton::uint128>(this->q21);
790 case triton::arch::ID_REG_AARCH64_D21: return (*((triton::uint64*)(this->q21)));
791 case triton::arch::ID_REG_AARCH64_S21: return (*((triton::uint32*)(this->q21)));
792 case triton::arch::ID_REG_AARCH64_H21: return (*((triton::uint16*)(this->q21)));
793 case triton::arch::ID_REG_AARCH64_B21: return (*((triton::uint8*)(this->q21)));
794 case triton::arch::ID_REG_AARCH64_Q22: return triton::utils::cast<triton::uint128>(this->q22);
795 case triton::arch::ID_REG_AARCH64_D22: return (*((triton::uint64*)(this->q22)));
796 case triton::arch::ID_REG_AARCH64_S22: return (*((triton::uint32*)(this->q22)));
797 case triton::arch::ID_REG_AARCH64_H22: return (*((triton::uint16*)(this->q22)));
798 case triton::arch::ID_REG_AARCH64_B22: return (*((triton::uint8*)(this->q22)));
799 case triton::arch::ID_REG_AARCH64_Q23: return triton::utils::cast<triton::uint128>(this->q23);
800 case triton::arch::ID_REG_AARCH64_D23: return (*((triton::uint64*)(this->q23)));
801 case triton::arch::ID_REG_AARCH64_S23: return (*((triton::uint32*)(this->q23)));
802 case triton::arch::ID_REG_AARCH64_H23: return (*((triton::uint16*)(this->q23)));
803 case triton::arch::ID_REG_AARCH64_B23: return (*((triton::uint8*)(this->q23)));
804 case triton::arch::ID_REG_AARCH64_Q24: return triton::utils::cast<triton::uint128>(this->q24);
805 case triton::arch::ID_REG_AARCH64_D24: return (*((triton::uint64*)(this->q24)));
806 case triton::arch::ID_REG_AARCH64_S24: return (*((triton::uint32*)(this->q24)));
807 case triton::arch::ID_REG_AARCH64_H24: return (*((triton::uint16*)(this->q24)));
808 case triton::arch::ID_REG_AARCH64_B24: return (*((triton::uint8*)(this->q24)));
809 case triton::arch::ID_REG_AARCH64_Q25: return triton::utils::cast<triton::uint128>(this->q25);
810 case triton::arch::ID_REG_AARCH64_D25: return (*((triton::uint64*)(this->q25)));
811 case triton::arch::ID_REG_AARCH64_S25: return (*((triton::uint32*)(this->q25)));
812 case triton::arch::ID_REG_AARCH64_H25: return (*((triton::uint16*)(this->q25)));
813 case triton::arch::ID_REG_AARCH64_B25: return (*((triton::uint8*)(this->q25)));
814 case triton::arch::ID_REG_AARCH64_Q26: return triton::utils::cast<triton::uint128>(this->q26);
815 case triton::arch::ID_REG_AARCH64_D26: return (*((triton::uint64*)(this->q26)));
816 case triton::arch::ID_REG_AARCH64_S26: return (*((triton::uint32*)(this->q26)));
817 case triton::arch::ID_REG_AARCH64_H26: return (*((triton::uint16*)(this->q26)));
818 case triton::arch::ID_REG_AARCH64_B26: return (*((triton::uint8*)(this->q26)));
819 case triton::arch::ID_REG_AARCH64_Q27: return triton::utils::cast<triton::uint128>(this->q27);
820 case triton::arch::ID_REG_AARCH64_D27: return (*((triton::uint64*)(this->q27)));
821 case triton::arch::ID_REG_AARCH64_S27: return (*((triton::uint32*)(this->q27)));
822 case triton::arch::ID_REG_AARCH64_H27: return (*((triton::uint16*)(this->q27)));
823 case triton::arch::ID_REG_AARCH64_B27: return (*((triton::uint8*)(this->q27)));
824 case triton::arch::ID_REG_AARCH64_Q28: return triton::utils::cast<triton::uint128>(this->q28);
825 case triton::arch::ID_REG_AARCH64_D28: return (*((triton::uint64*)(this->q28)));
826 case triton::arch::ID_REG_AARCH64_S28: return (*((triton::uint32*)(this->q28)));
827 case triton::arch::ID_REG_AARCH64_H28: return (*((triton::uint16*)(this->q28)));
828 case triton::arch::ID_REG_AARCH64_B28: return (*((triton::uint8*)(this->q28)));
829 case triton::arch::ID_REG_AARCH64_Q29: return triton::utils::cast<triton::uint128>(this->q29);
830 case triton::arch::ID_REG_AARCH64_D29: return (*((triton::uint64*)(this->q29)));
831 case triton::arch::ID_REG_AARCH64_S29: return (*((triton::uint32*)(this->q29)));
832 case triton::arch::ID_REG_AARCH64_H29: return (*((triton::uint16*)(this->q29)));
833 case triton::arch::ID_REG_AARCH64_B29: return (*((triton::uint8*)(this->q29)));
834 case triton::arch::ID_REG_AARCH64_Q30: return triton::utils::cast<triton::uint128>(this->q30);
835 case triton::arch::ID_REG_AARCH64_D30: return (*((triton::uint64*)(this->q30)));
836 case triton::arch::ID_REG_AARCH64_S30: return (*((triton::uint32*)(this->q30)));
837 case triton::arch::ID_REG_AARCH64_H30: return (*((triton::uint16*)(this->q30)));
838 case triton::arch::ID_REG_AARCH64_B30: return (*((triton::uint8*)(this->q30)));
839 case triton::arch::ID_REG_AARCH64_Q31: return triton::utils::cast<triton::uint128>(this->q31);
840 case triton::arch::ID_REG_AARCH64_D31: return (*((triton::uint64*)(this->q31)));
841 case triton::arch::ID_REG_AARCH64_S31: return (*((triton::uint32*)(this->q31)));
842 case triton::arch::ID_REG_AARCH64_H31: return (*((triton::uint16*)(this->q31)));
843 case triton::arch::ID_REG_AARCH64_B31: return (*((triton::uint8*)(this->q31)));
844 case triton::arch::ID_REG_AARCH64_V0: return triton::utils::cast<triton::uint128>(this->q0);
845 case triton::arch::ID_REG_AARCH64_V1: return triton::utils::cast<triton::uint128>(this->q1);
846 case triton::arch::ID_REG_AARCH64_V2: return triton::utils::cast<triton::uint128>(this->q2);
847 case triton::arch::ID_REG_AARCH64_V3: return triton::utils::cast<triton::uint128>(this->q3);
848 case triton::arch::ID_REG_AARCH64_V4: return triton::utils::cast<triton::uint128>(this->q4);
849 case triton::arch::ID_REG_AARCH64_V5: return triton::utils::cast<triton::uint128>(this->q5);
850 case triton::arch::ID_REG_AARCH64_V6: return triton::utils::cast<triton::uint128>(this->q6);
851 case triton::arch::ID_REG_AARCH64_V7: return triton::utils::cast<triton::uint128>(this->q7);
852 case triton::arch::ID_REG_AARCH64_V8: return triton::utils::cast<triton::uint128>(this->q8);
853 case triton::arch::ID_REG_AARCH64_V9: return triton::utils::cast<triton::uint128>(this->q9);
854 case triton::arch::ID_REG_AARCH64_V10: return triton::utils::cast<triton::uint128>(this->q10);
855 case triton::arch::ID_REG_AARCH64_V11: return triton::utils::cast<triton::uint128>(this->q11);
856 case triton::arch::ID_REG_AARCH64_V12: return triton::utils::cast<triton::uint128>(this->q12);
857 case triton::arch::ID_REG_AARCH64_V13: return triton::utils::cast<triton::uint128>(this->q13);
858 case triton::arch::ID_REG_AARCH64_V14: return triton::utils::cast<triton::uint128>(this->q14);
859 case triton::arch::ID_REG_AARCH64_V15: return triton::utils::cast<triton::uint128>(this->q15);
860 case triton::arch::ID_REG_AARCH64_V16: return triton::utils::cast<triton::uint128>(this->q16);
861 case triton::arch::ID_REG_AARCH64_V17: return triton::utils::cast<triton::uint128>(this->q17);
862 case triton::arch::ID_REG_AARCH64_V18: return triton::utils::cast<triton::uint128>(this->q18);
863 case triton::arch::ID_REG_AARCH64_V19: return triton::utils::cast<triton::uint128>(this->q19);
864 case triton::arch::ID_REG_AARCH64_V20: return triton::utils::cast<triton::uint128>(this->q20);
865 case triton::arch::ID_REG_AARCH64_V21: return triton::utils::cast<triton::uint128>(this->q21);
866 case triton::arch::ID_REG_AARCH64_V22: return triton::utils::cast<triton::uint128>(this->q22);
867 case triton::arch::ID_REG_AARCH64_V23: return triton::utils::cast<triton::uint128>(this->q23);
868 case triton::arch::ID_REG_AARCH64_V24: return triton::utils::cast<triton::uint128>(this->q24);
869 case triton::arch::ID_REG_AARCH64_V25: return triton::utils::cast<triton::uint128>(this->q25);
870 case triton::arch::ID_REG_AARCH64_V26: return triton::utils::cast<triton::uint128>(this->q26);
871 case triton::arch::ID_REG_AARCH64_V27: return triton::utils::cast<triton::uint128>(this->q27);
872 case triton::arch::ID_REG_AARCH64_V28: return triton::utils::cast<triton::uint128>(this->q28);
873 case triton::arch::ID_REG_AARCH64_V29: return triton::utils::cast<triton::uint128>(this->q29);
874 case triton::arch::ID_REG_AARCH64_V30: return triton::utils::cast<triton::uint128>(this->q30);
875 case triton::arch::ID_REG_AARCH64_V31: return triton::utils::cast<triton::uint128>(this->q31);
876
878 #define SYS_REG_SPEC(UPPER_NAME, LOWER_NAME, _2, _3, _4, _5) \
879 case triton::arch::ID_REG_AARCH64_##UPPER_NAME: return (*((triton::uint64*)(this->LOWER_NAME)));
880 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
881 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
882 #include "triton/aarch64.spec"
883
884 default:
885 throw triton::exceptions::Cpu("AArch64Cpu::getConcreteRegisterValue(): Invalid register.");
886 }
887
888 return value;
889 }
890
891
892 void AArch64Cpu::setConcreteMemoryValue(triton::uint64 addr, triton::uint8 value, bool execCallbacks) {
893 if (execCallbacks && this->callbacks)
894 this->callbacks->processCallbacks(triton::callbacks::SET_CONCRETE_MEMORY_VALUE, MemoryAccess(addr, triton::size::byte), value);
895 this->memory[addr] = value;
896 }
897
898
899 void AArch64Cpu::setConcreteMemoryValue(const triton::arch::MemoryAccess& mem, const triton::uint512& value, bool execCallbacks) {
900 triton::uint64 addr = mem.getAddress();
901 triton::uint32 size = mem.getSize();
902 triton::uint512 cv = value;
903
904 if (cv > mem.getMaxValue())
905 throw triton::exceptions::Register("AArch64Cpu::setConcreteMemoryValue(): You cannot set this concrete value (too big) to this memory access.");
906
907 if (size == 0 || size > triton::size::dqqword)
908 throw triton::exceptions::Cpu("AArch64Cpu::setConcreteMemoryValue(): Invalid size memory.");
909
910 if (execCallbacks && this->callbacks)
911 this->callbacks->processCallbacks(triton::callbacks::SET_CONCRETE_MEMORY_VALUE, mem, value);
912
913 for (triton::uint32 i = 0; i < size; i++) {
914 this->memory[addr+i] = static_cast<triton::uint8>((cv & 0xff));
915 cv >>= 8;
916 }
917 }
918
919
920 void AArch64Cpu::setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector<triton::uint8>& values, bool execCallbacks) {
921 this->memory.reserve(values.size() + this->memory.size());
922 for (triton::usize index = 0; index < values.size(); index++) {
923 this->setConcreteMemoryValue(baseAddr+index, values[index], execCallbacks);
924 }
925 }
926
927
928 void AArch64Cpu::setConcreteMemoryAreaValue(triton::uint64 baseAddr, const void* area, triton::usize size, bool execCallbacks) {
929 this->memory.reserve(size + this->memory.size());
930 for (triton::usize index = 0; index < size; index++) {
931 this->setConcreteMemoryValue(baseAddr+index, reinterpret_cast<const triton::uint8*>(area)[index], execCallbacks);
932 }
933 }
934
935
936 void AArch64Cpu::setConcreteRegisterValue(const triton::arch::Register& reg, const triton::uint512& value, bool execCallbacks) {
937 if (value > reg.getMaxValue())
938 throw triton::exceptions::Register("AArch64Cpu::setConcreteRegisterValue(): You cannot set this concrete value (too big) to this register.");
939
940 if (execCallbacks && this->callbacks)
941 this->callbacks->processCallbacks(triton::callbacks::SET_CONCRETE_REGISTER_VALUE, reg, value);
942
943 switch (reg.getId()) {
944 case triton::arch::ID_REG_AARCH64_X0: (*((triton::uint64*)(this->x0))) = static_cast<triton::uint64>(value); break;
945 case triton::arch::ID_REG_AARCH64_W0: (*((triton::uint32*)(this->x0))) = static_cast<triton::uint32>(value); break;
946 case triton::arch::ID_REG_AARCH64_X1: (*((triton::uint64*)(this->x1))) = static_cast<triton::uint64>(value); break;
947 case triton::arch::ID_REG_AARCH64_W1: (*((triton::uint32*)(this->x1))) = static_cast<triton::uint32>(value); break;
948 case triton::arch::ID_REG_AARCH64_X2: (*((triton::uint64*)(this->x2))) = static_cast<triton::uint64>(value); break;
949 case triton::arch::ID_REG_AARCH64_W2: (*((triton::uint32*)(this->x2))) = static_cast<triton::uint32>(value); break;
950 case triton::arch::ID_REG_AARCH64_X3: (*((triton::uint64*)(this->x3))) = static_cast<triton::uint64>(value); break;
951 case triton::arch::ID_REG_AARCH64_W3: (*((triton::uint32*)(this->x3))) = static_cast<triton::uint32>(value); break;
952 case triton::arch::ID_REG_AARCH64_X4: (*((triton::uint64*)(this->x4))) = static_cast<triton::uint64>(value); break;
953 case triton::arch::ID_REG_AARCH64_W4: (*((triton::uint32*)(this->x4))) = static_cast<triton::uint32>(value); break;
954 case triton::arch::ID_REG_AARCH64_X5: (*((triton::uint64*)(this->x5))) = static_cast<triton::uint64>(value); break;
955 case triton::arch::ID_REG_AARCH64_W5: (*((triton::uint32*)(this->x5))) = static_cast<triton::uint32>(value); break;
956 case triton::arch::ID_REG_AARCH64_X6: (*((triton::uint64*)(this->x6))) = static_cast<triton::uint64>(value); break;
957 case triton::arch::ID_REG_AARCH64_W6: (*((triton::uint32*)(this->x6))) = static_cast<triton::uint32>(value); break;
958 case triton::arch::ID_REG_AARCH64_X7: (*((triton::uint64*)(this->x7))) = static_cast<triton::uint64>(value); break;
959 case triton::arch::ID_REG_AARCH64_W7: (*((triton::uint32*)(this->x7))) = static_cast<triton::uint32>(value); break;
960 case triton::arch::ID_REG_AARCH64_X8: (*((triton::uint64*)(this->x8))) = static_cast<triton::uint64>(value); break;
961 case triton::arch::ID_REG_AARCH64_W8: (*((triton::uint32*)(this->x8))) = static_cast<triton::uint32>(value); break;
962 case triton::arch::ID_REG_AARCH64_X9: (*((triton::uint64*)(this->x9))) = static_cast<triton::uint64>(value); break;
963 case triton::arch::ID_REG_AARCH64_W9: (*((triton::uint32*)(this->x9))) = static_cast<triton::uint32>(value); break;
964 case triton::arch::ID_REG_AARCH64_X10: (*((triton::uint64*)(this->x10))) = static_cast<triton::uint64>(value); break;
965 case triton::arch::ID_REG_AARCH64_W10: (*((triton::uint32*)(this->x10))) = static_cast<triton::uint32>(value); break;
966 case triton::arch::ID_REG_AARCH64_X11: (*((triton::uint64*)(this->x11))) = static_cast<triton::uint64>(value); break;
967 case triton::arch::ID_REG_AARCH64_W11: (*((triton::uint32*)(this->x11))) = static_cast<triton::uint32>(value); break;
968 case triton::arch::ID_REG_AARCH64_X12: (*((triton::uint64*)(this->x12))) = static_cast<triton::uint64>(value); break;
969 case triton::arch::ID_REG_AARCH64_W12: (*((triton::uint32*)(this->x12))) = static_cast<triton::uint32>(value); break;
970 case triton::arch::ID_REG_AARCH64_X13: (*((triton::uint64*)(this->x13))) = static_cast<triton::uint64>(value); break;
971 case triton::arch::ID_REG_AARCH64_W13: (*((triton::uint32*)(this->x13))) = static_cast<triton::uint32>(value); break;
972 case triton::arch::ID_REG_AARCH64_X14: (*((triton::uint64*)(this->x14))) = static_cast<triton::uint64>(value); break;
973 case triton::arch::ID_REG_AARCH64_W14: (*((triton::uint32*)(this->x14))) = static_cast<triton::uint32>(value); break;
974 case triton::arch::ID_REG_AARCH64_X15: (*((triton::uint64*)(this->x15))) = static_cast<triton::uint64>(value); break;
975 case triton::arch::ID_REG_AARCH64_W15: (*((triton::uint32*)(this->x15))) = static_cast<triton::uint32>(value); break;
976 case triton::arch::ID_REG_AARCH64_X16: (*((triton::uint64*)(this->x16))) = static_cast<triton::uint64>(value); break;
977 case triton::arch::ID_REG_AARCH64_W16: (*((triton::uint32*)(this->x16))) = static_cast<triton::uint32>(value); break;
978 case triton::arch::ID_REG_AARCH64_X17: (*((triton::uint64*)(this->x17))) = static_cast<triton::uint64>(value); break;
979 case triton::arch::ID_REG_AARCH64_W17: (*((triton::uint32*)(this->x17))) = static_cast<triton::uint32>(value); break;
980 case triton::arch::ID_REG_AARCH64_X18: (*((triton::uint64*)(this->x18))) = static_cast<triton::uint64>(value); break;
981 case triton::arch::ID_REG_AARCH64_W18: (*((triton::uint32*)(this->x18))) = static_cast<triton::uint32>(value); break;
982 case triton::arch::ID_REG_AARCH64_X19: (*((triton::uint64*)(this->x19))) = static_cast<triton::uint64>(value); break;
983 case triton::arch::ID_REG_AARCH64_W19: (*((triton::uint32*)(this->x19))) = static_cast<triton::uint32>(value); break;
984 case triton::arch::ID_REG_AARCH64_X20: (*((triton::uint64*)(this->x20))) = static_cast<triton::uint64>(value); break;
985 case triton::arch::ID_REG_AARCH64_W20: (*((triton::uint32*)(this->x20))) = static_cast<triton::uint32>(value); break;
986 case triton::arch::ID_REG_AARCH64_X21: (*((triton::uint64*)(this->x21))) = static_cast<triton::uint64>(value); break;
987 case triton::arch::ID_REG_AARCH64_W21: (*((triton::uint32*)(this->x21))) = static_cast<triton::uint32>(value); break;
988 case triton::arch::ID_REG_AARCH64_X22: (*((triton::uint64*)(this->x22))) = static_cast<triton::uint64>(value); break;
989 case triton::arch::ID_REG_AARCH64_W22: (*((triton::uint32*)(this->x22))) = static_cast<triton::uint32>(value); break;
990 case triton::arch::ID_REG_AARCH64_X23: (*((triton::uint64*)(this->x23))) = static_cast<triton::uint64>(value); break;
991 case triton::arch::ID_REG_AARCH64_W23: (*((triton::uint32*)(this->x23))) = static_cast<triton::uint32>(value); break;
992 case triton::arch::ID_REG_AARCH64_X24: (*((triton::uint64*)(this->x24))) = static_cast<triton::uint64>(value); break;
993 case triton::arch::ID_REG_AARCH64_W24: (*((triton::uint32*)(this->x24))) = static_cast<triton::uint32>(value); break;
994 case triton::arch::ID_REG_AARCH64_X25: (*((triton::uint64*)(this->x25))) = static_cast<triton::uint64>(value); break;
995 case triton::arch::ID_REG_AARCH64_W25: (*((triton::uint32*)(this->x25))) = static_cast<triton::uint32>(value); break;
996 case triton::arch::ID_REG_AARCH64_X26: (*((triton::uint64*)(this->x26))) = static_cast<triton::uint64>(value); break;
997 case triton::arch::ID_REG_AARCH64_W26: (*((triton::uint32*)(this->x26))) = static_cast<triton::uint32>(value); break;
998 case triton::arch::ID_REG_AARCH64_X27: (*((triton::uint64*)(this->x27))) = static_cast<triton::uint64>(value); break;
999 case triton::arch::ID_REG_AARCH64_W27: (*((triton::uint32*)(this->x27))) = static_cast<triton::uint32>(value); break;
1000 case triton::arch::ID_REG_AARCH64_X28: (*((triton::uint64*)(this->x28))) = static_cast<triton::uint64>(value); break;
1001 case triton::arch::ID_REG_AARCH64_W28: (*((triton::uint32*)(this->x28))) = static_cast<triton::uint32>(value); break;
1002 case triton::arch::ID_REG_AARCH64_X29: (*((triton::uint64*)(this->x29))) = static_cast<triton::uint64>(value); break;
1003 case triton::arch::ID_REG_AARCH64_W29: (*((triton::uint32*)(this->x29))) = static_cast<triton::uint32>(value); break;
1004 case triton::arch::ID_REG_AARCH64_X30: (*((triton::uint64*)(this->x30))) = static_cast<triton::uint64>(value); break;
1005 case triton::arch::ID_REG_AARCH64_W30: (*((triton::uint32*)(this->x30))) = static_cast<triton::uint32>(value); break;
1006 case triton::arch::ID_REG_AARCH64_SP: (*((triton::uint64*)(this->sp))) = static_cast<triton::uint64>(value); break;
1007 case triton::arch::ID_REG_AARCH64_WSP: (*((triton::uint32*)(this->sp))) = static_cast<triton::uint32>(value); break;
1008 case triton::arch::ID_REG_AARCH64_PC: (*((triton::uint64*)(this->pc))) = static_cast<triton::uint64>(value); break;
1009 case triton::arch::ID_REG_AARCH64_SPSR: (*((triton::uint32*)(this->spsr))) = static_cast<triton::uint32>(value); break;
1010
1011 case triton::arch::ID_REG_AARCH64_XZR: break; // Just do nothing
1012 case triton::arch::ID_REG_AARCH64_WZR: break; // Just do nothing
1013
1014 case triton::arch::ID_REG_AARCH64_N: {
1015 triton::uint32 b = (*((triton::uint32*)(this->spsr)));
1016 (*((triton::uint32*)(this->spsr))) = !value.is_zero() ? b | (1 << 31) : b & ~(1 << 31);
1017 break;
1018 }
1019 case triton::arch::ID_REG_AARCH64_Z: {
1020 triton::uint32 b = (*((triton::uint32*)(this->spsr)));
1021 (*((triton::uint32*)(this->spsr))) = !value.is_zero() ? b | (1 << 30) : b & ~(1 << 30);
1022 break;
1023 }
1024 case triton::arch::ID_REG_AARCH64_C: {
1025 triton::uint32 b = (*((triton::uint32*)(this->spsr)));
1026 (*((triton::uint32*)(this->spsr))) = !value.is_zero() ? b | (1 << 29) : b & ~(1 << 29);
1027 break;
1028 }
1029 case triton::arch::ID_REG_AARCH64_V: {
1030 triton::uint32 b = (*((triton::uint32*)(this->spsr)));
1031 (*((triton::uint32*)(this->spsr))) = !value.is_zero() ? b | (1 << 28) : b & ~(1 << 28);
1032 break;
1033 }
1034 case triton::arch::ID_REG_AARCH64_Q0: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q0); break;
1035 case triton::arch::ID_REG_AARCH64_Q1: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q1); break;
1036 case triton::arch::ID_REG_AARCH64_Q2: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q2); break;
1037 case triton::arch::ID_REG_AARCH64_Q3: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q3); break;
1038 case triton::arch::ID_REG_AARCH64_Q4: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q4); break;
1039 case triton::arch::ID_REG_AARCH64_Q5: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q5); break;
1040 case triton::arch::ID_REG_AARCH64_Q6: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q6); break;
1041 case triton::arch::ID_REG_AARCH64_Q7: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q7); break;
1042 case triton::arch::ID_REG_AARCH64_Q8: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q8); break;
1043 case triton::arch::ID_REG_AARCH64_Q9: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q9); break;
1044 case triton::arch::ID_REG_AARCH64_Q10: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q10); break;
1045 case triton::arch::ID_REG_AARCH64_Q11: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q11); break;
1046 case triton::arch::ID_REG_AARCH64_Q12: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q12); break;
1047 case triton::arch::ID_REG_AARCH64_Q13: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q13); break;
1048 case triton::arch::ID_REG_AARCH64_Q14: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q14); break;
1049 case triton::arch::ID_REG_AARCH64_Q15: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q15); break;
1050 case triton::arch::ID_REG_AARCH64_Q16: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q16); break;
1051 case triton::arch::ID_REG_AARCH64_Q17: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q17); break;
1052 case triton::arch::ID_REG_AARCH64_Q18: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q18); break;
1053 case triton::arch::ID_REG_AARCH64_Q19: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q19); break;
1054 case triton::arch::ID_REG_AARCH64_Q20: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q20); break;
1055 case triton::arch::ID_REG_AARCH64_Q21: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q21); break;
1056 case triton::arch::ID_REG_AARCH64_Q22: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q22); break;
1057 case triton::arch::ID_REG_AARCH64_Q23: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q23); break;
1058 case triton::arch::ID_REG_AARCH64_Q24: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q24); break;
1059 case triton::arch::ID_REG_AARCH64_Q25: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q25); break;
1060 case triton::arch::ID_REG_AARCH64_Q26: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q26); break;
1061 case triton::arch::ID_REG_AARCH64_Q27: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q27); break;
1062 case triton::arch::ID_REG_AARCH64_Q28: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q28); break;
1063 case triton::arch::ID_REG_AARCH64_Q29: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q29); break;
1064 case triton::arch::ID_REG_AARCH64_Q30: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q30); break;
1065 case triton::arch::ID_REG_AARCH64_Q31: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q31); break;
1066
1067 case triton::arch::ID_REG_AARCH64_V0: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q0); break;
1068 case triton::arch::ID_REG_AARCH64_V1: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q1); break;
1069 case triton::arch::ID_REG_AARCH64_V2: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q2); break;
1070 case triton::arch::ID_REG_AARCH64_V3: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q3); break;
1071 case triton::arch::ID_REG_AARCH64_V4: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q4); break;
1072 case triton::arch::ID_REG_AARCH64_V5: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q5); break;
1073 case triton::arch::ID_REG_AARCH64_V6: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q6); break;
1074 case triton::arch::ID_REG_AARCH64_V7: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q7); break;
1075 case triton::arch::ID_REG_AARCH64_V8: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q8); break;
1076 case triton::arch::ID_REG_AARCH64_V9: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q9); break;
1077 case triton::arch::ID_REG_AARCH64_V10: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q10); break;
1078 case triton::arch::ID_REG_AARCH64_V11: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q11); break;
1079 case triton::arch::ID_REG_AARCH64_V12: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q12); break;
1080 case triton::arch::ID_REG_AARCH64_V13: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q13); break;
1081 case triton::arch::ID_REG_AARCH64_V14: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q14); break;
1082 case triton::arch::ID_REG_AARCH64_V15: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q15); break;
1083 case triton::arch::ID_REG_AARCH64_V16: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q16); break;
1084 case triton::arch::ID_REG_AARCH64_V17: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q17); break;
1085 case triton::arch::ID_REG_AARCH64_V18: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q18); break;
1086 case triton::arch::ID_REG_AARCH64_V19: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q19); break;
1087 case triton::arch::ID_REG_AARCH64_V20: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q20); break;
1088 case triton::arch::ID_REG_AARCH64_V21: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q21); break;
1089 case triton::arch::ID_REG_AARCH64_V22: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q22); break;
1090 case triton::arch::ID_REG_AARCH64_V23: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q23); break;
1091 case triton::arch::ID_REG_AARCH64_V24: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q24); break;
1092 case triton::arch::ID_REG_AARCH64_V25: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q25); break;
1093 case triton::arch::ID_REG_AARCH64_V26: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q26); break;
1094 case triton::arch::ID_REG_AARCH64_V27: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q27); break;
1095 case triton::arch::ID_REG_AARCH64_V28: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q28); break;
1096 case triton::arch::ID_REG_AARCH64_V29: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q29); break;
1097 case triton::arch::ID_REG_AARCH64_V30: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q30); break;
1098 case triton::arch::ID_REG_AARCH64_V31: triton::utils::fromUintToBuffer(static_cast<triton::uint128>(value), this->q31); break;
1099
1100 case triton::arch::ID_REG_AARCH64_D0: (*((triton::uint64*)(this->q0))) = static_cast<triton::uint64>(value); break;
1101 case triton::arch::ID_REG_AARCH64_D1: (*((triton::uint64*)(this->q1))) = static_cast<triton::uint64>(value); break;
1102 case triton::arch::ID_REG_AARCH64_D2: (*((triton::uint64*)(this->q2))) = static_cast<triton::uint64>(value); break;
1103 case triton::arch::ID_REG_AARCH64_D3: (*((triton::uint64*)(this->q3))) = static_cast<triton::uint64>(value); break;
1104 case triton::arch::ID_REG_AARCH64_D4: (*((triton::uint64*)(this->q4))) = static_cast<triton::uint64>(value); break;
1105 case triton::arch::ID_REG_AARCH64_D5: (*((triton::uint64*)(this->q5))) = static_cast<triton::uint64>(value); break;
1106 case triton::arch::ID_REG_AARCH64_D6: (*((triton::uint64*)(this->q6))) = static_cast<triton::uint64>(value); break;
1107 case triton::arch::ID_REG_AARCH64_D7: (*((triton::uint64*)(this->q7))) = static_cast<triton::uint64>(value); break;
1108 case triton::arch::ID_REG_AARCH64_D8: (*((triton::uint64*)(this->q8))) = static_cast<triton::uint64>(value); break;
1109 case triton::arch::ID_REG_AARCH64_D9: (*((triton::uint64*)(this->q9))) = static_cast<triton::uint64>(value); break;
1110 case triton::arch::ID_REG_AARCH64_D10: (*((triton::uint64*)(this->q10))) = static_cast<triton::uint64>(value); break;
1111 case triton::arch::ID_REG_AARCH64_D11: (*((triton::uint64*)(this->q11))) = static_cast<triton::uint64>(value); break;
1112 case triton::arch::ID_REG_AARCH64_D12: (*((triton::uint64*)(this->q12))) = static_cast<triton::uint64>(value); break;
1113 case triton::arch::ID_REG_AARCH64_D13: (*((triton::uint64*)(this->q13))) = static_cast<triton::uint64>(value); break;
1114 case triton::arch::ID_REG_AARCH64_D14: (*((triton::uint64*)(this->q14))) = static_cast<triton::uint64>(value); break;
1115 case triton::arch::ID_REG_AARCH64_D15: (*((triton::uint64*)(this->q15))) = static_cast<triton::uint64>(value); break;
1116 case triton::arch::ID_REG_AARCH64_D16: (*((triton::uint64*)(this->q16))) = static_cast<triton::uint64>(value); break;
1117 case triton::arch::ID_REG_AARCH64_D17: (*((triton::uint64*)(this->q17))) = static_cast<triton::uint64>(value); break;
1118 case triton::arch::ID_REG_AARCH64_D18: (*((triton::uint64*)(this->q18))) = static_cast<triton::uint64>(value); break;
1119 case triton::arch::ID_REG_AARCH64_D19: (*((triton::uint64*)(this->q19))) = static_cast<triton::uint64>(value); break;
1120 case triton::arch::ID_REG_AARCH64_D20: (*((triton::uint64*)(this->q20))) = static_cast<triton::uint64>(value); break;
1121 case triton::arch::ID_REG_AARCH64_D21: (*((triton::uint64*)(this->q21))) = static_cast<triton::uint64>(value); break;
1122 case triton::arch::ID_REG_AARCH64_D22: (*((triton::uint64*)(this->q22))) = static_cast<triton::uint64>(value); break;
1123 case triton::arch::ID_REG_AARCH64_D23: (*((triton::uint64*)(this->q23))) = static_cast<triton::uint64>(value); break;
1124 case triton::arch::ID_REG_AARCH64_D24: (*((triton::uint64*)(this->q24))) = static_cast<triton::uint64>(value); break;
1125 case triton::arch::ID_REG_AARCH64_D25: (*((triton::uint64*)(this->q25))) = static_cast<triton::uint64>(value); break;
1126 case triton::arch::ID_REG_AARCH64_D26: (*((triton::uint64*)(this->q26))) = static_cast<triton::uint64>(value); break;
1127 case triton::arch::ID_REG_AARCH64_D27: (*((triton::uint64*)(this->q27))) = static_cast<triton::uint64>(value); break;
1128 case triton::arch::ID_REG_AARCH64_D28: (*((triton::uint64*)(this->q28))) = static_cast<triton::uint64>(value); break;
1129 case triton::arch::ID_REG_AARCH64_D29: (*((triton::uint64*)(this->q29))) = static_cast<triton::uint64>(value); break;
1130 case triton::arch::ID_REG_AARCH64_D30: (*((triton::uint64*)(this->q30))) = static_cast<triton::uint64>(value); break;
1131 case triton::arch::ID_REG_AARCH64_D31: (*((triton::uint64*)(this->q31))) = static_cast<triton::uint64>(value); break;
1132
1133 case triton::arch::ID_REG_AARCH64_S0: (*((triton::uint32*)(this->q0))) = static_cast<triton::uint32>(value); break;
1134 case triton::arch::ID_REG_AARCH64_S1: (*((triton::uint32*)(this->q1))) = static_cast<triton::uint32>(value); break;
1135 case triton::arch::ID_REG_AARCH64_S2: (*((triton::uint32*)(this->q2))) = static_cast<triton::uint32>(value); break;
1136 case triton::arch::ID_REG_AARCH64_S3: (*((triton::uint32*)(this->q3))) = static_cast<triton::uint32>(value); break;
1137 case triton::arch::ID_REG_AARCH64_S4: (*((triton::uint32*)(this->q4))) = static_cast<triton::uint32>(value); break;
1138 case triton::arch::ID_REG_AARCH64_S5: (*((triton::uint32*)(this->q5))) = static_cast<triton::uint32>(value); break;
1139 case triton::arch::ID_REG_AARCH64_S6: (*((triton::uint32*)(this->q6))) = static_cast<triton::uint32>(value); break;
1140 case triton::arch::ID_REG_AARCH64_S7: (*((triton::uint32*)(this->q7))) = static_cast<triton::uint32>(value); break;
1141 case triton::arch::ID_REG_AARCH64_S8: (*((triton::uint32*)(this->q8))) = static_cast<triton::uint32>(value); break;
1142 case triton::arch::ID_REG_AARCH64_S9: (*((triton::uint32*)(this->q9))) = static_cast<triton::uint32>(value); break;
1143 case triton::arch::ID_REG_AARCH64_S10: (*((triton::uint32*)(this->q10))) = static_cast<triton::uint32>(value); break;
1144 case triton::arch::ID_REG_AARCH64_S11: (*((triton::uint32*)(this->q11))) = static_cast<triton::uint32>(value); break;
1145 case triton::arch::ID_REG_AARCH64_S12: (*((triton::uint32*)(this->q12))) = static_cast<triton::uint32>(value); break;
1146 case triton::arch::ID_REG_AARCH64_S13: (*((triton::uint32*)(this->q13))) = static_cast<triton::uint32>(value); break;
1147 case triton::arch::ID_REG_AARCH64_S14: (*((triton::uint32*)(this->q14))) = static_cast<triton::uint32>(value); break;
1148 case triton::arch::ID_REG_AARCH64_S15: (*((triton::uint32*)(this->q15))) = static_cast<triton::uint32>(value); break;
1149 case triton::arch::ID_REG_AARCH64_S16: (*((triton::uint32*)(this->q16))) = static_cast<triton::uint32>(value); break;
1150 case triton::arch::ID_REG_AARCH64_S17: (*((triton::uint32*)(this->q17))) = static_cast<triton::uint32>(value); break;
1151 case triton::arch::ID_REG_AARCH64_S18: (*((triton::uint32*)(this->q18))) = static_cast<triton::uint32>(value); break;
1152 case triton::arch::ID_REG_AARCH64_S19: (*((triton::uint32*)(this->q19))) = static_cast<triton::uint32>(value); break;
1153 case triton::arch::ID_REG_AARCH64_S20: (*((triton::uint32*)(this->q20))) = static_cast<triton::uint32>(value); break;
1154 case triton::arch::ID_REG_AARCH64_S21: (*((triton::uint32*)(this->q21))) = static_cast<triton::uint32>(value); break;
1155 case triton::arch::ID_REG_AARCH64_S22: (*((triton::uint32*)(this->q22))) = static_cast<triton::uint32>(value); break;
1156 case triton::arch::ID_REG_AARCH64_S23: (*((triton::uint32*)(this->q23))) = static_cast<triton::uint32>(value); break;
1157 case triton::arch::ID_REG_AARCH64_S24: (*((triton::uint32*)(this->q24))) = static_cast<triton::uint32>(value); break;
1158 case triton::arch::ID_REG_AARCH64_S25: (*((triton::uint32*)(this->q25))) = static_cast<triton::uint32>(value); break;
1159 case triton::arch::ID_REG_AARCH64_S26: (*((triton::uint32*)(this->q26))) = static_cast<triton::uint32>(value); break;
1160 case triton::arch::ID_REG_AARCH64_S27: (*((triton::uint32*)(this->q27))) = static_cast<triton::uint32>(value); break;
1161 case triton::arch::ID_REG_AARCH64_S28: (*((triton::uint32*)(this->q28))) = static_cast<triton::uint32>(value); break;
1162 case triton::arch::ID_REG_AARCH64_S29: (*((triton::uint32*)(this->q29))) = static_cast<triton::uint32>(value); break;
1163 case triton::arch::ID_REG_AARCH64_S30: (*((triton::uint32*)(this->q30))) = static_cast<triton::uint32>(value); break;
1164 case triton::arch::ID_REG_AARCH64_S31: (*((triton::uint32*)(this->q31))) = static_cast<triton::uint32>(value); break;
1165
1166 case triton::arch::ID_REG_AARCH64_H0: (*((triton::uint16*)(this->q0))) = static_cast<triton::uint16>(value); break;
1167 case triton::arch::ID_REG_AARCH64_H1: (*((triton::uint16*)(this->q1))) = static_cast<triton::uint16>(value); break;
1168 case triton::arch::ID_REG_AARCH64_H2: (*((triton::uint16*)(this->q2))) = static_cast<triton::uint16>(value); break;
1169 case triton::arch::ID_REG_AARCH64_H3: (*((triton::uint16*)(this->q3))) = static_cast<triton::uint16>(value); break;
1170 case triton::arch::ID_REG_AARCH64_H4: (*((triton::uint16*)(this->q4))) = static_cast<triton::uint16>(value); break;
1171 case triton::arch::ID_REG_AARCH64_H5: (*((triton::uint16*)(this->q5))) = static_cast<triton::uint16>(value); break;
1172 case triton::arch::ID_REG_AARCH64_H6: (*((triton::uint16*)(this->q6))) = static_cast<triton::uint16>(value); break;
1173 case triton::arch::ID_REG_AARCH64_H7: (*((triton::uint16*)(this->q7))) = static_cast<triton::uint16>(value); break;
1174 case triton::arch::ID_REG_AARCH64_H8: (*((triton::uint16*)(this->q8))) = static_cast<triton::uint16>(value); break;
1175 case triton::arch::ID_REG_AARCH64_H9: (*((triton::uint16*)(this->q9))) = static_cast<triton::uint16>(value); break;
1176 case triton::arch::ID_REG_AARCH64_H10: (*((triton::uint16*)(this->q10))) = static_cast<triton::uint16>(value); break;
1177 case triton::arch::ID_REG_AARCH64_H11: (*((triton::uint16*)(this->q11))) = static_cast<triton::uint16>(value); break;
1178 case triton::arch::ID_REG_AARCH64_H12: (*((triton::uint16*)(this->q12))) = static_cast<triton::uint16>(value); break;
1179 case triton::arch::ID_REG_AARCH64_H13: (*((triton::uint16*)(this->q13))) = static_cast<triton::uint16>(value); break;
1180 case triton::arch::ID_REG_AARCH64_H14: (*((triton::uint16*)(this->q14))) = static_cast<triton::uint16>(value); break;
1181 case triton::arch::ID_REG_AARCH64_H15: (*((triton::uint16*)(this->q15))) = static_cast<triton::uint16>(value); break;
1182 case triton::arch::ID_REG_AARCH64_H16: (*((triton::uint16*)(this->q16))) = static_cast<triton::uint16>(value); break;
1183 case triton::arch::ID_REG_AARCH64_H17: (*((triton::uint16*)(this->q17))) = static_cast<triton::uint16>(value); break;
1184 case triton::arch::ID_REG_AARCH64_H18: (*((triton::uint16*)(this->q18))) = static_cast<triton::uint16>(value); break;
1185 case triton::arch::ID_REG_AARCH64_H19: (*((triton::uint16*)(this->q19))) = static_cast<triton::uint16>(value); break;
1186 case triton::arch::ID_REG_AARCH64_H20: (*((triton::uint16*)(this->q20))) = static_cast<triton::uint16>(value); break;
1187 case triton::arch::ID_REG_AARCH64_H21: (*((triton::uint16*)(this->q21))) = static_cast<triton::uint16>(value); break;
1188 case triton::arch::ID_REG_AARCH64_H22: (*((triton::uint16*)(this->q22))) = static_cast<triton::uint16>(value); break;
1189 case triton::arch::ID_REG_AARCH64_H23: (*((triton::uint16*)(this->q23))) = static_cast<triton::uint16>(value); break;
1190 case triton::arch::ID_REG_AARCH64_H24: (*((triton::uint16*)(this->q24))) = static_cast<triton::uint16>(value); break;
1191 case triton::arch::ID_REG_AARCH64_H25: (*((triton::uint16*)(this->q25))) = static_cast<triton::uint16>(value); break;
1192 case triton::arch::ID_REG_AARCH64_H26: (*((triton::uint16*)(this->q26))) = static_cast<triton::uint16>(value); break;
1193 case triton::arch::ID_REG_AARCH64_H27: (*((triton::uint16*)(this->q27))) = static_cast<triton::uint16>(value); break;
1194 case triton::arch::ID_REG_AARCH64_H28: (*((triton::uint16*)(this->q28))) = static_cast<triton::uint16>(value); break;
1195 case triton::arch::ID_REG_AARCH64_H29: (*((triton::uint16*)(this->q29))) = static_cast<triton::uint16>(value); break;
1196 case triton::arch::ID_REG_AARCH64_H30: (*((triton::uint16*)(this->q30))) = static_cast<triton::uint16>(value); break;
1197 case triton::arch::ID_REG_AARCH64_H31: (*((triton::uint16*)(this->q31))) = static_cast<triton::uint16>(value); break;
1198
1199 case triton::arch::ID_REG_AARCH64_B0: (*((triton::uint8*)(this->q0))) = static_cast<triton::uint8>(value); break;
1200 case triton::arch::ID_REG_AARCH64_B1: (*((triton::uint8*)(this->q1))) = static_cast<triton::uint8>(value); break;
1201 case triton::arch::ID_REG_AARCH64_B2: (*((triton::uint8*)(this->q2))) = static_cast<triton::uint8>(value); break;
1202 case triton::arch::ID_REG_AARCH64_B3: (*((triton::uint8*)(this->q3))) = static_cast<triton::uint8>(value); break;
1203 case triton::arch::ID_REG_AARCH64_B4: (*((triton::uint8*)(this->q4))) = static_cast<triton::uint8>(value); break;
1204 case triton::arch::ID_REG_AARCH64_B5: (*((triton::uint8*)(this->q5))) = static_cast<triton::uint8>(value); break;
1205 case triton::arch::ID_REG_AARCH64_B6: (*((triton::uint8*)(this->q6))) = static_cast<triton::uint8>(value); break;
1206 case triton::arch::ID_REG_AARCH64_B7: (*((triton::uint8*)(this->q7))) = static_cast<triton::uint8>(value); break;
1207 case triton::arch::ID_REG_AARCH64_B8: (*((triton::uint8*)(this->q8))) = static_cast<triton::uint8>(value); break;
1208 case triton::arch::ID_REG_AARCH64_B9: (*((triton::uint8*)(this->q9))) = static_cast<triton::uint8>(value); break;
1209 case triton::arch::ID_REG_AARCH64_B10: (*((triton::uint8*)(this->q10))) = static_cast<triton::uint8>(value); break;
1210 case triton::arch::ID_REG_AARCH64_B11: (*((triton::uint8*)(this->q11))) = static_cast<triton::uint8>(value); break;
1211 case triton::arch::ID_REG_AARCH64_B12: (*((triton::uint8*)(this->q12))) = static_cast<triton::uint8>(value); break;
1212 case triton::arch::ID_REG_AARCH64_B13: (*((triton::uint8*)(this->q13))) = static_cast<triton::uint8>(value); break;
1213 case triton::arch::ID_REG_AARCH64_B14: (*((triton::uint8*)(this->q14))) = static_cast<triton::uint8>(value); break;
1214 case triton::arch::ID_REG_AARCH64_B15: (*((triton::uint8*)(this->q15))) = static_cast<triton::uint8>(value); break;
1215 case triton::arch::ID_REG_AARCH64_B16: (*((triton::uint8*)(this->q16))) = static_cast<triton::uint8>(value); break;
1216 case triton::arch::ID_REG_AARCH64_B17: (*((triton::uint8*)(this->q17))) = static_cast<triton::uint8>(value); break;
1217 case triton::arch::ID_REG_AARCH64_B18: (*((triton::uint8*)(this->q18))) = static_cast<triton::uint8>(value); break;
1218 case triton::arch::ID_REG_AARCH64_B19: (*((triton::uint8*)(this->q19))) = static_cast<triton::uint8>(value); break;
1219 case triton::arch::ID_REG_AARCH64_B20: (*((triton::uint8*)(this->q20))) = static_cast<triton::uint8>(value); break;
1220 case triton::arch::ID_REG_AARCH64_B21: (*((triton::uint8*)(this->q21))) = static_cast<triton::uint8>(value); break;
1221 case triton::arch::ID_REG_AARCH64_B22: (*((triton::uint8*)(this->q22))) = static_cast<triton::uint8>(value); break;
1222 case triton::arch::ID_REG_AARCH64_B23: (*((triton::uint8*)(this->q23))) = static_cast<triton::uint8>(value); break;
1223 case triton::arch::ID_REG_AARCH64_B24: (*((triton::uint8*)(this->q24))) = static_cast<triton::uint8>(value); break;
1224 case triton::arch::ID_REG_AARCH64_B25: (*((triton::uint8*)(this->q25))) = static_cast<triton::uint8>(value); break;
1225 case triton::arch::ID_REG_AARCH64_B26: (*((triton::uint8*)(this->q26))) = static_cast<triton::uint8>(value); break;
1226 case triton::arch::ID_REG_AARCH64_B27: (*((triton::uint8*)(this->q27))) = static_cast<triton::uint8>(value); break;
1227 case triton::arch::ID_REG_AARCH64_B28: (*((triton::uint8*)(this->q28))) = static_cast<triton::uint8>(value); break;
1228 case triton::arch::ID_REG_AARCH64_B29: (*((triton::uint8*)(this->q29))) = static_cast<triton::uint8>(value); break;
1229 case triton::arch::ID_REG_AARCH64_B30: (*((triton::uint8*)(this->q30))) = static_cast<triton::uint8>(value); break;
1230 case triton::arch::ID_REG_AARCH64_B31: (*((triton::uint8*)(this->q31))) = static_cast<triton::uint8>(value); break;
1231
1233 #define SYS_REG_SPEC(UPPER_NAME, LOWER_NAME, _2, _3, _4, _5) \
1234 case triton::arch::ID_REG_AARCH64_##UPPER_NAME: (*((triton::uint64*)(this->LOWER_NAME))) = static_cast<triton::uint64>(value); break;
1235 #define REG_SPEC(_1, _2, _3, _4, _5, _6)
1236 #define REG_SPEC_NO_CAPSTONE(_1, _2, _3, _4, _5, _6)
1237 #include "triton/aarch64.spec"
1238
1239 default:
1240 throw triton::exceptions::Cpu("AArch64Cpu:setConcreteRegisterValue(): Invalid register.");
1241 }
1242 }
1243
1244
1245 bool AArch64Cpu::isThumb(void) const {
1246 /* There is no thumb mode in aarch64 */
1247 return false;
1248 }
1249
1250
1251 void AArch64Cpu::setThumb(bool state) {
1252 /* There is no thumb mode in aarch64 */
1253 }
1254
1255
1256 bool AArch64Cpu::isMemoryExclusive(const triton::arch::MemoryAccess& mem) const {
1257 triton::uint64 base = mem.getAddress();
1258
1259 for (triton::usize index = 0; index < mem.getSize(); index++) {
1260 if (this->exclusiveMemoryTags.find(base + index) != this->exclusiveMemoryTags.end()) {
1261 return true;
1262 }
1263 }
1264
1265 return false;
1266 }
1267
1268
1269 void AArch64Cpu::setMemoryExclusiveTag(const triton::arch::MemoryAccess& mem, bool tag) {
1270 triton::uint64 base = mem.getAddress();
1271
1272 for (triton::usize index = 0; index < mem.getSize(); index++) {
1273 if (tag == true) {
1274 this->exclusiveMemoryTags.insert(base + index);
1275 }
1276 else {
1277 this->exclusiveMemoryTags.erase(base + index);
1278 }
1279 }
1280 }
1281
1282
1286
1287
1288 bool AArch64Cpu::isConcreteMemoryValueDefined(triton::uint64 baseAddr, triton::usize size) const {
1289 for (triton::usize index = 0; index < size; index++) {
1290 if (this->memory.find(baseAddr + index) == this->memory.end())
1291 return false;
1292 }
1293 return true;
1294 }
1295
1296
1300
1301
1302 void AArch64Cpu::clearConcreteMemoryValue(triton::uint64 baseAddr, triton::usize size) {
1303 for (triton::usize index = 0; index < size; index++) {
1304 if (this->memory.find(baseAddr + index) != this->memory.end()) {
1305 this->memory.erase(baseAddr + index);
1306 }
1307 }
1308 }
1309
1310 }; /* aarch64 namespace */
1311 }; /* arm namespace */
1312 }; /* arch namespace */
1313}; /* triton namespace */
math::wide_integer::uintwide_t
Definition uintwide_t.h:1274
triton::arch::BitsVector::getMaxValue
TRITON_EXPORT triton::uint512 getMaxValue(void) const
Returns the max possible value of the bitvector.
Definition bitsVector.cpp:49
triton::arch::BitsVector::setBits
TRITON_EXPORT void setBits(triton::uint32 high, triton::uint32 low)
Sets the bits (high, low) position.
Definition bitsVector.cpp:72
triton::arch::Immediate
This class is used to represent an immediate.
Definition immediate.hpp:37
triton::arch::Instruction
This class is used to represent an instruction.
Definition instruction.hpp:48
triton::arch::Instruction::setUpdateFlag
TRITON_EXPORT void setUpdateFlag(bool state)
Sets the updateFlag of the instruction.
Definition instruction.cpp:322
triton::arch::Instruction::getSize
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size of the instruction.
Definition instruction.cpp:147
triton::arch::Instruction::setDisassembly
TRITON_EXPORT void setDisassembly(const std::string &str)
Sets the disassembly of the instruction.
Definition instruction.cpp:337
triton::arch::Instruction::getOpcode
TRITON_EXPORT const triton::uint8 * getOpcode(void) const
Returns the opcode of the instruction.
Definition instruction.cpp:134
triton::arch::Instruction::setType
TRITON_EXPORT void setType(triton::uint32 type)
Sets the type of the instruction.
Definition instruction.cpp:307
triton::arch::Instruction::setAddress
TRITON_EXPORT void setAddress(triton::uint64 addr)
Sets the address of the instruction.
Definition instruction.cpp:124
triton::arch::Instruction::getType
TRITON_EXPORT triton::uint32 getType(void) const
Returns the type of the instruction.
Definition instruction.cpp:152
triton::arch::Instruction::setArchitecture
TRITON_EXPORT void setArchitecture(triton::arch::architecture_e arch)
Sets the instruction's architecture.
Definition instruction.cpp:297
triton::arch::Instruction::setWriteBack
TRITON_EXPORT void setWriteBack(bool state)
Sets the writeBack flag of the instruction.
Definition instruction.cpp:317
triton::arch::Instruction::getAddress
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the instruction.
Definition instruction.cpp:114
triton::arch::Instruction::setBranch
TRITON_EXPORT void setBranch(bool flag)
Sets flag to define this instruction as branch or not.
Definition instruction.cpp:504
triton::arch::Instruction::setSize
TRITON_EXPORT void setSize(triton::uint32 size)
Sets the size of the instruction.
Definition instruction.cpp:302
triton::arch::Instruction::setCodeCondition
TRITON_EXPORT void setCodeCondition(triton::arch::arm::condition_e codeCondition)
Sets the code condition of the instruction (mainly for AArch64).
Definition instruction.cpp:327
triton::arch::Instruction::operands
std::vector< triton::arch::OperandWrapper > operands
A list of operands.
Definition instruction.hpp:122
triton::arch::Instruction::setControlFlow
TRITON_EXPORT void setControlFlow(bool flag)
Sets flag to define this instruction changes the control flow or not.
Definition instruction.cpp:509
triton::arch::Instruction::getNextAddress
TRITON_EXPORT triton::uint64 getNextAddress(void) const
Returns the next address of the instruction.
Definition instruction.cpp:119
triton::arch::MemoryAccess
This class is used to represent a memory access.
Definition memoryAccess.hpp:40
triton::arch::MemoryAccess::setDisplacement
TRITON_EXPORT void setDisplacement(const triton::arch::Immediate &displacement)
LEA - Sets the displacement operand.
Definition memoryAccess.cpp:163
triton::arch::MemoryAccess::setScale
TRITON_EXPORT void setScale(const triton::arch::Immediate &scale)
LEA - Sets the scale operand.
Definition memoryAccess.cpp:168
triton::arch::MemoryAccess::getAddress
TRITON_EXPORT triton::uint64 getAddress(void) const
Returns the address of the memory.
Definition memoryAccess.cpp:51
triton::arch::MemoryAccess::setPcRelative
TRITON_EXPORT void setPcRelative(triton::uint64 addr)
LEA - Sets pc relative.
Definition memoryAccess.cpp:143
triton::arch::MemoryAccess::getSize
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the memory vector.
Definition memoryAccess.cpp:71
triton::arch::MemoryAccess::setIndexRegister
TRITON_EXPORT void setIndexRegister(const triton::arch::Register &index)
LEA - Sets the index register operand.
Definition memoryAccess.cpp:158
triton::arch::MemoryAccess::setBaseRegister
TRITON_EXPORT void setBaseRegister(const triton::arch::Register &base)
LEA - Sets the base register operand.
Definition memoryAccess.cpp:153
triton::arch::OperandWrapper
This class is used as operand wrapper.
Definition operandWrapper.hpp:38
triton::arch::Register
This class is used when an instruction has a register operand.
Definition register.hpp:44
triton::arch::Register::getBitSize
TRITON_EXPORT triton::uint32 getBitSize(void) const
Returns the size (in bits) of the register.
Definition register.cpp:63
triton::arch::Register::getParent
TRITON_EXPORT triton::arch::register_e getParent(void) const
Returns the parent id of the register.
Definition register.cpp:58
triton::arch::Register::getId
TRITON_EXPORT triton::arch::register_e getId(void) const
Returns the id of the register.
Definition register.cpp:53
triton::arch::Register::getSize
TRITON_EXPORT triton::uint32 getSize(void) const
Returns the size (in bytes) of the register.
Definition register.cpp:68
triton::arch::arm::ArmOperandProperties::setVectorIndex
TRITON_EXPORT void setVectorIndex(triton::sint32 index)
Sets the vector index.
Definition armOperandProperties.cpp:208
triton::arch::arm::ArmOperandProperties::setVASType
TRITON_EXPORT void setVASType(triton::arch::arm::vas_e type)
Sets the type of vector arrangement specifier.
Definition armOperandProperties.cpp:162
triton::arch::arm::ArmOperandProperties::setShiftType
TRITON_EXPORT void setShiftType(triton::arch::arm::shift_e type)
Sets the type of the shift.
Definition armOperandProperties.cpp:148
triton::arch::arm::ArmOperandProperties::setExtendedSize
TRITON_EXPORT void setExtendedSize(triton::uint32 dstSize)
Sets the extended size (in bits) after extension.
Definition armOperandProperties.cpp:169
triton::arch::arm::ArmOperandProperties::setExtendType
TRITON_EXPORT void setExtendType(triton::arch::arm::extend_e type)
Sets the type of the extend.
Definition armOperandProperties.cpp:155
triton::arch::arm::ArmOperandProperties::setShiftValue
TRITON_EXPORT void setShiftValue(triton::uint32 imm)
Sets the value of the shift immediate.
Definition armOperandProperties.cpp:138
triton::arch::arm::aarch64::AArch64Cpu
This class is used to describe the ARM (64-bits) spec.
Definition aarch64Cpu.hpp:61
triton::arch::arm::aarch64::AArch64Cpu::q30
triton::uint8 q30[triton::size::dqword]
Concrete value of q30.
Definition aarch64Cpu.hpp:215
triton::arch::arm::aarch64::AArch64Cpu::q9
triton::uint8 q9[triton::size::dqword]
Concrete value of q9.
Definition aarch64Cpu.hpp:173
triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemoryAreaValue
TRITON_EXPORT std::vector< triton::uint8 > getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
Returns the concrete value of a memory area.
Definition aarch64Cpu.cpp:595
triton::arch::arm::aarch64::AArch64Cpu::x11
triton::uint8 x11[triton::size::qword]
Concrete value of x11.
Definition aarch64Cpu.hpp:115
triton::arch::arm::aarch64::AArch64Cpu::clear
TRITON_EXPORT void clear(void)
Clears the architecture states (registers and memory).
Definition aarch64Cpu.cpp:142
triton::arch::arm::aarch64::AArch64Cpu::setConcreteRegisterValue
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register &reg, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
Definition aarch64Cpu.cpp:936
triton::arch::arm::aarch64::AArch64Cpu::x28
triton::uint8 x28[triton::size::qword]
Concrete value of x28.
Definition aarch64Cpu.hpp:149
triton::arch::arm::aarch64::AArch64Cpu::x23
triton::uint8 x23[triton::size::qword]
Concrete value of x23.
Definition aarch64Cpu.hpp:139
triton::arch::arm::aarch64::AArch64Cpu::clearConcreteMemoryValue
TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess &mem)
Clears concrete values assigned to the memory cells.
Definition aarch64Cpu.cpp:1297
triton::arch::arm::aarch64::AArch64Cpu::x3
triton::uint8 x3[triton::size::qword]
Concrete value of x3.
Definition aarch64Cpu.hpp:99
triton::arch::arm::aarch64::AArch64Cpu::isVectorRegister
TRITON_EXPORT bool isVectorRegister(triton::arch::register_e regId) const
Returns true if regId is a vector register.
Definition aarch64Cpu.cpp:259
triton::arch::arm::aarch64::AArch64Cpu::x29
triton::uint8 x29[triton::size::qword]
Concrete value of x29.
Definition aarch64Cpu.hpp:151
triton::arch::arm::aarch64::AArch64Cpu::numberOfRegisters
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
Definition aarch64Cpu.cpp:269
triton::arch::arm::aarch64::AArch64Cpu::x2
triton::uint8 x2[triton::size::qword]
Concrete value of x2.
Definition aarch64Cpu.hpp:97
triton::arch::arm::aarch64::AArch64Cpu::q4
triton::uint8 q4[triton::size::dqword]
Concrete value of q4.
Definition aarch64Cpu.hpp:163
triton::arch::arm::aarch64::AArch64Cpu::x20
triton::uint8 x20[triton::size::qword]
Concrete value of x20.
Definition aarch64Cpu.hpp:133
triton::arch::arm::aarch64::AArch64Cpu::x18
triton::uint8 x18[triton::size::qword]
Concrete value of x18.
Definition aarch64Cpu.hpp:129
triton::arch::arm::aarch64::AArch64Cpu::q29
triton::uint8 q29[triton::size::dqword]
Concrete value of q29.
Definition aarch64Cpu.hpp:213
triton::arch::arm::aarch64::AArch64Cpu::isRegisterValid
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is valid.
Definition aarch64Cpu.cpp:244
triton::arch::arm::aarch64::AArch64Cpu::x8
triton::uint8 x8[triton::size::qword]
Concrete value of x8.
Definition aarch64Cpu.hpp:109
triton::arch::arm::aarch64::AArch64Cpu::getStackPointer
TRITON_EXPORT const triton::arch::Register & getStackPointer(void) const
Returns the stack pointer register.
Definition aarch64Cpu.cpp:364
triton::arch::arm::aarch64::AArch64Cpu::q14
triton::uint8 q14[triton::size::dqword]
Concrete value of q14.
Definition aarch64Cpu.hpp:183
triton::arch::arm::aarch64::AArch64Cpu::x10
triton::uint8 x10[triton::size::qword]
Concrete value of x10.
Definition aarch64Cpu.hpp:113
triton::arch::arm::aarch64::AArch64Cpu::operator=
TRITON_EXPORT AArch64Cpu & operator=(const AArch64Cpu &other)
Copies a AArch64Cpu class.
Definition aarch64Cpu.cpp:223
triton::arch::arm::aarch64::AArch64Cpu::x27
triton::uint8 x27[triton::size::qword]
Concrete value of x27.
Definition aarch64Cpu.hpp:147
triton::arch::arm::aarch64::AArch64Cpu::q12
triton::uint8 q12[triton::size::dqword]
Concrete value of q12.
Definition aarch64Cpu.hpp:179
triton::arch::arm::aarch64::AArch64Cpu::isSystemRegister
TRITON_EXPORT bool isSystemRegister(triton::arch::register_e regId) const
Returns true if regId is a system register.
Definition aarch64Cpu.cpp:264
triton::arch::arm::aarch64::AArch64Cpu::getAllRegisters
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters(void) const
Returns all registers.
Definition aarch64Cpu.cpp:284
triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemoryValue
TRITON_EXPORT triton::uint512 getConcreteMemoryValue(const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const
Returns the concrete value of memory cells.
Definition aarch64Cpu.cpp:574
triton::arch::arm::aarch64::AArch64Cpu::q27
triton::uint8 q27[triton::size::dqword]
Concrete value of q27.
Definition aarch64Cpu.hpp:209
triton::arch::arm::aarch64::AArch64Cpu::getProgramCounter
TRITON_EXPORT const triton::arch::Register & getProgramCounter(void) const
Returns the program counter register.
Definition aarch64Cpu.cpp:359
triton::arch::arm::aarch64::AArch64Cpu::x30
triton::uint8 x30[triton::size::qword]
Concrete value of x30.
Definition aarch64Cpu.hpp:153
triton::arch::arm::aarch64::AArch64Cpu::q28
triton::uint8 q28[triton::size::dqword]
Concrete value of q28.
Definition aarch64Cpu.hpp:211
triton::arch::arm::aarch64::AArch64Cpu::isMemoryExclusive
TRITON_EXPORT bool isMemoryExclusive(const triton::arch::MemoryAccess &mem) const
Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
Definition aarch64Cpu.cpp:1256
triton::arch::arm::aarch64::AArch64Cpu::q1
triton::uint8 q1[triton::size::dqword]
Concrete value of q1.
Definition aarch64Cpu.hpp:157
triton::arch::arm::aarch64::AArch64Cpu::getParentRegisters
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters(void) const
Returns all parent registers.
Definition aarch64Cpu.cpp:293
triton::arch::arm::aarch64::AArch64Cpu::x1
triton::uint8 x1[triton::size::qword]
Concrete value of x1.
Definition aarch64Cpu.hpp:95
triton::arch::arm::aarch64::AArch64Cpu::isGPR
TRITON_EXPORT bool isGPR(triton::arch::register_e regId) const
Returns true if regId is a GRP.
Definition aarch64Cpu.cpp:249
triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu
TRITON_EXPORT AArch64Cpu(triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
Definition aarch64Cpu.cpp:27
triton::arch::arm::aarch64::AArch64Cpu::q20
triton::uint8 q20[triton::size::dqword]
Concrete value of q20.
Definition aarch64Cpu.hpp:195
triton::arch::arm::aarch64::AArch64Cpu::x5
triton::uint8 x5[triton::size::qword]
Concrete value of x5.
Definition aarch64Cpu.hpp:103
triton::arch::arm::aarch64::AArch64Cpu::setConcreteMemoryAreaValue
TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory area.
Definition aarch64Cpu.cpp:920
triton::arch::arm::aarch64::AArch64Cpu::isRegister
TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const
Returns true if the register ID is a register.
Definition aarch64Cpu.cpp:239
triton::arch::arm::aarch64::AArch64Cpu::q18
triton::uint8 q18[triton::size::dqword]
Concrete value of q18.
Definition aarch64Cpu.hpp:191
triton::arch::arm::aarch64::AArch64Cpu::q15
triton::uint8 q15[triton::size::dqword]
Concrete value of q15.
Definition aarch64Cpu.hpp:185
triton::arch::arm::aarch64::AArch64Cpu::getRegister
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
Definition aarch64Cpu.cpp:329
triton::arch::arm::aarch64::AArch64Cpu::gprBitSize
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
Definition aarch64Cpu.cpp:279
triton::arch::arm::aarch64::AArch64Cpu::q10
triton::uint8 q10[triton::size::dqword]
Concrete value of q10.
Definition aarch64Cpu.hpp:175
triton::arch::arm::aarch64::AArch64Cpu::isThumb
TRITON_EXPORT bool isThumb(void) const
Returns true if the execution mode is Thumb. Only useful for Arm32.
Definition aarch64Cpu.cpp:1245
triton::arch::arm::aarch64::AArch64Cpu::x0
triton::uint8 x0[triton::size::qword]
Concrete value of x0.
Definition aarch64Cpu.hpp:93
triton::arch::arm::aarch64::AArch64Cpu::q31
triton::uint8 q31[triton::size::dqword]
Concrete value of q31.
Definition aarch64Cpu.hpp:217
triton::arch::arm::aarch64::AArch64Cpu::q7
triton::uint8 q7[triton::size::dqword]
Concrete value of q7.
Definition aarch64Cpu.hpp:169
triton::arch::arm::aarch64::AArch64Cpu::setThumb
TRITON_EXPORT void setThumb(bool state)
Sets CPU state to Thumb mode.
Definition aarch64Cpu.cpp:1251
triton::arch::arm::aarch64::AArch64Cpu::getParentRegister
TRITON_EXPORT const triton::arch::Register & getParentRegister(const triton::arch::Register &reg) const
Returns parent register from a given one.
Definition aarch64Cpu.cpp:349
triton::arch::arm::aarch64::AArch64Cpu::memory
std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > memory
map of address -> concrete value
Definition aarch64Cpu.hpp:90
triton::arch::arm::aarch64::AArch64Cpu::isConcreteMemoryValueDefined
TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess &mem) const
Returns true if memory cells have a defined concrete value.
Definition aarch64Cpu.cpp:1283
triton::arch::arm::aarch64::AArch64Cpu::q22
triton::uint8 q22[triton::size::dqword]
Concrete value of q22.
Definition aarch64Cpu.hpp:199
triton::arch::arm::aarch64::AArch64Cpu::x6
triton::uint8 x6[triton::size::qword]
Concrete value of x6.
Definition aarch64Cpu.hpp:105
triton::arch::arm::aarch64::AArch64Cpu::spsr
triton::uint8 spsr[triton::size::dword]
Concrete value of spsr.
Definition aarch64Cpu.hpp:223
triton::arch::arm::aarch64::AArch64Cpu::sp
triton::uint8 sp[triton::size::qword]
Concrete value of sp.
Definition aarch64Cpu.hpp:219
triton::arch::arm::aarch64::AArch64Cpu::disassembly
TRITON_EXPORT void disassembly(triton::arch::Instruction &inst)
Disassembles the instruction according to the architecture.
Definition aarch64Cpu.cpp:369
triton::arch::arm::aarch64::AArch64Cpu::x12
triton::uint8 x12[triton::size::qword]
Concrete value of x12.
Definition aarch64Cpu.hpp:117
triton::arch::arm::aarch64::AArch64Cpu::x15
triton::uint8 x15[triton::size::qword]
Concrete value of x15.
Definition aarch64Cpu.hpp:123
triton::arch::arm::aarch64::AArch64Cpu::~AArch64Cpu
virtual TRITON_EXPORT ~AArch64Cpu()
Destructor.
Definition aarch64Cpu.cpp:41
triton::arch::arm::aarch64::AArch64Cpu::q25
triton::uint8 q25[triton::size::dqword]
Concrete value of q25.
Definition aarch64Cpu.hpp:205
triton::arch::arm::aarch64::AArch64Cpu::x7
triton::uint8 x7[triton::size::qword]
Concrete value of x7.
Definition aarch64Cpu.hpp:107
triton::arch::arm::aarch64::AArch64Cpu::gprSize
TRITON_EXPORT triton::uint32 gprSize(void) const
Returns the bit in byte of the General Purpose Registers.
Definition aarch64Cpu.cpp:274
triton::arch::arm::aarch64::AArch64Cpu::q0
triton::uint8 q0[triton::size::dqword]
Concrete value of q0.
Definition aarch64Cpu.hpp:155
triton::arch::arm::aarch64::AArch64Cpu::isScalarRegister
TRITON_EXPORT bool isScalarRegister(triton::arch::register_e regId) const
Returns true if regId is a scalar register.
Definition aarch64Cpu.cpp:254
triton::arch::arm::aarch64::AArch64Cpu::q26
triton::uint8 q26[triton::size::dqword]
Concrete value of q26.
Definition aarch64Cpu.hpp:207
triton::arch::arm::aarch64::AArch64Cpu::setConcreteMemoryValue
TRITON_EXPORT void setConcreteMemoryValue(const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of memory cells.
Definition aarch64Cpu.cpp:899
triton::arch::arm::aarch64::AArch64Cpu::q17
triton::uint8 q17[triton::size::dqword]
Concrete value of q17.
Definition aarch64Cpu.hpp:189
triton::arch::arm::aarch64::AArch64Cpu::x26
triton::uint8 x26[triton::size::qword]
Concrete value of x26.
Definition aarch64Cpu.hpp:145
triton::arch::arm::aarch64::AArch64Cpu::x22
triton::uint8 x22[triton::size::qword]
Concrete value of x22.
Definition aarch64Cpu.hpp:137
triton::arch::arm::aarch64::AArch64Cpu::q8
triton::uint8 q8[triton::size::dqword]
Concrete value of q8.
Definition aarch64Cpu.hpp:171
triton::arch::arm::aarch64::AArch64Cpu::isFlag
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
Definition aarch64Cpu.cpp:234
triton::arch::arm::aarch64::AArch64Cpu::x24
triton::uint8 x24[triton::size::qword]
Concrete value of x24.
Definition aarch64Cpu.hpp:141
triton::arch::arm::aarch64::AArch64Cpu::getEndianness
TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const
Returns the kind of endianness as triton::arch::endianness_e.
Definition aarch64Cpu.cpp:229
triton::arch::arm::aarch64::AArch64Cpu::q23
triton::uint8 q23[triton::size::dqword]
Concrete value of q23.
Definition aarch64Cpu.hpp:201
triton::arch::arm::aarch64::AArch64Cpu::q6
triton::uint8 q6[triton::size::dqword]
Concrete value of q6.
Definition aarch64Cpu.hpp:167
triton::arch::arm::aarch64::AArch64Cpu::x19
triton::uint8 x19[triton::size::qword]
Concrete value of x19.
Definition aarch64Cpu.hpp:131
triton::arch::arm::aarch64::AArch64Cpu::getConcreteRegisterValue
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register &reg, bool execCallbacks=true) const
Returns the concrete value of a register.
Definition aarch64Cpu.cpp:605
triton::arch::arm::aarch64::AArch64Cpu::q13
triton::uint8 q13[triton::size::dqword]
Concrete value of q13.
Definition aarch64Cpu.hpp:181
triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemory
TRITON_EXPORT const std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > & getConcreteMemory(void) const
Return all memory.
Definition aarch64Cpu.cpp:288
triton::arch::arm::aarch64::AArch64Cpu::q2
triton::uint8 q2[triton::size::dqword]
Concrete value of q2.
Definition aarch64Cpu.hpp:159
triton::arch::arm::aarch64::AArch64Cpu::x17
triton::uint8 x17[triton::size::qword]
Concrete value of x17.
Definition aarch64Cpu.hpp:127
triton::arch::arm::aarch64::AArch64Cpu::setMemoryExclusiveTag
TRITON_EXPORT void setMemoryExclusiveTag(const triton::arch::MemoryAccess &mem, bool tag)
Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
Definition aarch64Cpu.cpp:1269
triton::arch::arm::aarch64::AArch64Cpu::q21
triton::uint8 q21[triton::size::dqword]
Concrete value of q21.
Definition aarch64Cpu.hpp:197
triton::arch::arm::aarch64::AArch64Cpu::x9
triton::uint8 x9[triton::size::qword]
Concrete value of x9.
Definition aarch64Cpu.hpp:111
triton::arch::arm::aarch64::AArch64Cpu::q11
triton::uint8 q11[triton::size::dqword]
Concrete value of q11.
Definition aarch64Cpu.hpp:177
triton::arch::arm::aarch64::AArch64Cpu::x13
triton::uint8 x13[triton::size::qword]
Concrete value of x13.
Definition aarch64Cpu.hpp:119
triton::arch::arm::aarch64::AArch64Cpu::x21
triton::uint8 x21[triton::size::qword]
Concrete value of x21.
Definition aarch64Cpu.hpp:135
triton::arch::arm::aarch64::AArch64Cpu::q3
triton::uint8 q3[triton::size::dqword]
Concrete value of q3.
Definition aarch64Cpu.hpp:161
triton::arch::arm::aarch64::AArch64Cpu::q5
triton::uint8 q5[triton::size::dqword]
Concrete value of q5.
Definition aarch64Cpu.hpp:165
triton::arch::arm::aarch64::AArch64Cpu::q19
triton::uint8 q19[triton::size::dqword]
Concrete value of q19.
Definition aarch64Cpu.hpp:193
triton::arch::arm::aarch64::AArch64Cpu::x14
triton::uint8 x14[triton::size::qword]
Concrete value of x14.
Definition aarch64Cpu.hpp:121
triton::arch::arm::aarch64::AArch64Cpu::x4
triton::uint8 x4[triton::size::qword]
Concrete value of x4.
Definition aarch64Cpu.hpp:101
triton::arch::arm::aarch64::AArch64Cpu::x25
triton::uint8 x25[triton::size::qword]
Concrete value of x25.
Definition aarch64Cpu.hpp:143
triton::arch::arm::aarch64::AArch64Cpu::x16
triton::uint8 x16[triton::size::qword]
Concrete value of x16.
Definition aarch64Cpu.hpp:125
triton::arch::arm::aarch64::AArch64Cpu::q24
triton::uint8 q24[triton::size::dqword]
Concrete value of q24.
Definition aarch64Cpu.hpp:203
triton::arch::arm::aarch64::AArch64Cpu::q16
triton::uint8 q16[triton::size::dqword]
Concrete value of q16.
Definition aarch64Cpu.hpp:187
triton::arch::arm::aarch64::AArch64Cpu::pc
triton::uint8 pc[triton::size::qword]
Concrete value of pc.
Definition aarch64Cpu.hpp:221
triton::arch::arm::aarch64::AArch64Specifications
The AArch64Specifications class defines specifications about the AArch64 CPU.
Definition aarch64Specifications.hpp:54
triton::arch::arm::aarch64::AArch64Specifications::getMemoryOperandSpecialSize
TRITON_EXPORT triton::uint32 getMemoryOperandSpecialSize(triton::uint32 id) const
Returns memory access size if it is specified by instruction.
Definition aarch64Specifications.cpp:2166
triton::arch::arm::aarch64::AArch64Specifications::capstoneVASToTritonVAS
TRITON_EXPORT triton::arch::arm::vas_e capstoneVASToTritonVAS(triton::uint32 id) const
Converts a capstone's vas id to a triton's vas id.
Definition aarch64Specifications.cpp:155
triton::arch::arm::aarch64::AArch64Specifications::capstoneConditionToTritonCondition
TRITON_EXPORT triton::arch::arm::condition_e capstoneConditionToTritonCondition(triton::uint32 id) const
Converts a capstone's condition id to a triton's condition id.
Definition aarch64Specifications.cpp:236
triton::arch::arm::aarch64::AArch64Specifications::capstoneShiftToTritonShift
TRITON_EXPORT triton::arch::arm::shift_e capstoneShiftToTritonShift(triton::uint32 id) const
Converts a capstone's shift id to a triton's shift id.
Definition aarch64Specifications.cpp:73
triton::arch::arm::aarch64::AArch64Specifications::capstoneRegisterToTritonRegister
TRITON_EXPORT triton::arch::register_e capstoneRegisterToTritonRegister(triton::uint32 id) const
Converts a capstone's register id to a triton's register id.
Definition aarch64Specifications.cpp:43
triton::arch::arm::aarch64::AArch64Specifications::capstoneExtendToTritonExtend
TRITON_EXPORT triton::arch::arm::extend_e capstoneExtendToTritonExtend(triton::uint32 id) const
Converts a capstone's extend id to a triton's extend id.
Definition aarch64Specifications.cpp:106
triton::arch::arm::aarch64::AArch64Specifications::capstoneInstructionToTritonInstruction
TRITON_EXPORT triton::uint32 capstoneInstructionToTritonInstruction(triton::uint32 id) const
Converts a capstone's instruction id to a triton's instruction id.
Definition aarch64Specifications.cpp:313
triton::arch::arm::aarch64::AArch64Specifications::id2reg
std::unordered_map< triton::arch::register_e, const triton::arch::Register > id2reg
List of registers specification available for this architecture.
Definition aarch64Specifications.hpp:57
triton::callbacks::Callbacks
The callbacks class.
Definition callbacks.hpp:79
triton::callbacks::Callbacks::processCallbacks
TRITON_EXPORT triton::ast::SharedAbstractNode processCallbacks(triton::callbacks::callback_e kind, triton::ast::SharedAbstractNode node)
Processes callbacks according to the kind and the C++ polymorphism.
Definition callbacks.cpp:193
triton::exceptions::Cpu
The exception class used by all CPUs.
Definition exceptions.hpp:317
triton::exceptions::Disassembly
The exception class used by the disassembler.
Definition exceptions.hpp:365
triton::exceptions::Register
The exception class used by register operands.
Definition exceptions.hpp:257
triton::arch::register_e
register_e
Types of register.
Definition archEnums.hpp:68
triton::arch::endianness_e
endianness_e
Definition archEnums.hpp:45
triton::arch::ARCH_AARCH64
@ ARCH_AARCH64
Definition archEnums.hpp:34
triton::arch::ID_REG_LAST_ITEM
@ ID_REG_LAST_ITEM
must be the last item
Definition archEnums.hpp:100
triton::arch::LE_ENDIANNESS
@ LE_ENDIANNESS
Definition archEnums.hpp:46
triton::bitsize::byte
constexpr triton::uint32 byte
byte size in bit
Definition cpuSize.hpp:60
triton::bitsize::qword
constexpr triton::uint32 qword
qword size in bit
Definition cpuSize.hpp:66
triton::bitsize::dqword
constexpr triton::uint32 dqword
dqword size in bit
Definition cpuSize.hpp:70
triton::callbacks::GET_CONCRETE_REGISTER_VALUE
@ GET_CONCRETE_REGISTER_VALUE
Definition callbacksEnums.hpp:31
triton::callbacks::GET_CONCRETE_MEMORY_VALUE
@ GET_CONCRETE_MEMORY_VALUE
Definition callbacksEnums.hpp:30
triton::callbacks::SET_CONCRETE_MEMORY_VALUE
@ SET_CONCRETE_MEMORY_VALUE
Definition callbacksEnums.hpp:32
triton::callbacks::SET_CONCRETE_REGISTER_VALUE
@ SET_CONCRETE_REGISTER_VALUE
Definition callbacksEnums.hpp:33
triton::size::dqqword
constexpr triton::uint32 dqqword
dqqword size in byte
Definition cpuSize.hpp:44
triton::size::byte
constexpr triton::uint32 byte
byte size in byte
Definition cpuSize.hpp:30
triton::size::qword
constexpr triton::uint32 qword
qword size in byte
Definition cpuSize.hpp:36
triton::sint32
std::int32_t sint32
signed 32-bits
Definition tritonTypes.hpp:79
triton::uint16
std::uint16_t uint16
unisgned 16-bits
Definition tritonTypes.hpp:36
triton::usize
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
Definition tritonTypes.hpp:106
triton::uint64
std::uint64_t uint64
unisgned 64-bits
Definition tritonTypes.hpp:42
triton::uint32
std::uint32_t uint32
unisgned 32-bits
Definition tritonTypes.hpp:39
triton::uint8
std::uint8_t uint8
unisgned 8-bits
Definition tritonTypes.hpp:33
triton::utils::fromUintToBuffer
TRITON_EXPORT void fromUintToBuffer(triton::uint80 value, triton::uint8 *buffer)
Inject the value into the buffer. Make sure that the buffer contains at least 10 allocated bytes.
Definition coreUtils.cpp:16
triton
The Triton namespace.
Definition architecture.cpp:27
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