libTriton
version 1.0 build 1532
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This class is used to describe the ARM (64-bits) spec. More...
#include <aarch64Cpu.hpp>
Public Member Functions | |
TRITON_EXPORT | AArch64Cpu (triton::callbacks::Callbacks *callbacks=nullptr) |
Constructor. More... | |
TRITON_EXPORT | AArch64Cpu (const AArch64Cpu &other) |
Constructor. More... | |
virtual TRITON_EXPORT | ~AArch64Cpu () |
Destructor. More... | |
TRITON_EXPORT AArch64Cpu & | operator= (const AArch64Cpu &other) |
Copies a AArch64Cpu class. More... | |
TRITON_EXPORT bool | isGPR (triton::arch::register_e regId) const |
Returns true if regId is a GRP. More... | |
TRITON_EXPORT bool | isScalarRegister (triton::arch::register_e regId) const |
Returns true if regId is a scalar register. More... | |
TRITON_EXPORT bool | isFlag (triton::arch::register_e regId) const |
Returns true if the register ID is a flag. More... | |
TRITON_EXPORT bool | isRegister (triton::arch::register_e regId) const |
Returns true if the register ID is a register. More... | |
TRITON_EXPORT bool | isRegisterValid (triton::arch::register_e regId) const |
Returns true if the register ID is valid. More... | |
TRITON_EXPORT bool | isThumb (void) const |
Returns true if the execution mode is Thumb. Only useful for Arm32. More... | |
TRITON_EXPORT bool | isMemoryExclusiveAccess (void) const |
Returns true if the exclusive memory access flag is set. Only valid for Arm32. More... | |
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & | getAllRegisters (void) const |
Returns all registers. More... | |
TRITON_EXPORT const triton::arch::Register & | getParentRegister (const triton::arch::Register ®) const |
Returns parent register from a given one. More... | |
TRITON_EXPORT const triton::arch::Register & | getParentRegister (triton::arch::register_e id) const |
Returns parent register from a given one. More... | |
TRITON_EXPORT const triton::arch::Register & | getProgramCounter (void) const |
Returns the program counter register. More... | |
TRITON_EXPORT const triton::arch::Register & | getRegister (triton::arch::register_e id) const |
Returns register from id. More... | |
TRITON_EXPORT const triton::arch::Register & | getRegister (const std::string &name) const |
Returns register from name. More... | |
TRITON_EXPORT const triton::arch::Register & | getStackPointer (void) const |
Returns the stack pointer register. More... | |
TRITON_EXPORT std::set< const triton::arch::Register * > | getParentRegisters (void) const |
Returns all parent registers. More... | |
TRITON_EXPORT std::vector< triton::uint8 > | getConcreteMemoryAreaValue (triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const |
Returns the concrete value of a memory area. More... | |
TRITON_EXPORT triton::arch::endianness_e | getEndianness (void) const |
Returns the kind of endianness as triton::arch::endianness_e. More... | |
TRITON_EXPORT triton::uint32 | gprBitSize (void) const |
Returns the bit in bit of the General Purpose Registers. More... | |
TRITON_EXPORT triton::uint32 | gprSize (void) const |
Returns the bit in byte of the General Purpose Registers. More... | |
TRITON_EXPORT triton::uint32 | numberOfRegisters (void) const |
Returns the number of registers according to the CPU architecture. More... | |
TRITON_EXPORT triton::uint512 | getConcreteMemoryValue (const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const |
Returns the concrete value of memory cells. More... | |
TRITON_EXPORT triton::uint512 | getConcreteRegisterValue (const triton::arch::Register ®, bool execCallbacks=true) const |
Returns the concrete value of a register. More... | |
TRITON_EXPORT triton::uint8 | getConcreteMemoryValue (triton::uint64 addr, bool execCallbacks=true) const |
Returns the concrete value of a memory cell. More... | |
TRITON_EXPORT void | clear (void) |
Clears the architecture states (registers and memory). More... | |
TRITON_EXPORT void | disassembly (triton::arch::Instruction &inst) |
Disassembles the instruction according to the architecture. More... | |
TRITON_EXPORT void | setConcreteMemoryAreaValue (triton::uint64 baseAddr, const std::vector< triton::uint8 > &values) |
[architecture api] - Sets the concrete value of a memory area. More... | |
TRITON_EXPORT void | setConcreteMemoryAreaValue (triton::uint64 baseAddr, const triton::uint8 *area, triton::usize size) |
[architecture api] - Sets the concrete value of a memory area. More... | |
TRITON_EXPORT void | setConcreteMemoryValue (const triton::arch::MemoryAccess &mem, const triton::uint512 &value) |
[architecture api] - Sets the concrete value of memory cells. More... | |
TRITON_EXPORT void | setConcreteMemoryValue (triton::uint64 addr, triton::uint8 value) |
[architecture api] - Sets the concrete value of a memory cell. More... | |
TRITON_EXPORT void | setConcreteRegisterValue (const triton::arch::Register ®, const triton::uint512 &value) |
[architecture api] - Sets the concrete value of a register. More... | |
TRITON_EXPORT void | setThumb (bool state) |
Sets CPU state to Thumb mode. More... | |
TRITON_EXPORT void | setMemoryExclusiveAccess (bool state) |
Sets exclusive memory access flag. Only valid for Arm32. More... | |
TRITON_EXPORT bool | isConcreteMemoryValueDefined (const triton::arch::MemoryAccess &mem) const |
Returns true if memory cells have a defined concrete value. More... | |
TRITON_EXPORT bool | isConcreteMemoryValueDefined (triton::uint64 baseAddr, triton::usize size=1) const |
Returns true if memory cells have a defined concrete value. More... | |
TRITON_EXPORT void | clearConcreteMemoryValue (const triton::arch::MemoryAccess &mem) |
Clears concrete values assigned to the memory cells. More... | |
TRITON_EXPORT void | clearConcreteMemoryValue (triton::uint64 baseAddr, triton::usize size=1) |
Clears concrete values assigned to the memory cells. More... | |
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virtual TRITON_EXPORT | ~CpuInterface () |
Destructor. More... | |
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TRITON_EXPORT | AArch64Specifications (triton::arch::architecture_e) |
Constructor. More... | |
TRITON_EXPORT triton::arch::register_e | capstoneRegisterToTritonRegister (triton::uint32 id) const |
Converts a capstone's register id to a triton's register id. More... | |
TRITON_EXPORT triton::arch::arm::shift_e | capstoneShiftToTritonShift (triton::uint32 id) const |
Converts a capstone's shift id to a triton's shift id. More... | |
TRITON_EXPORT triton::arch::arm::extend_e | capstoneExtendToTritonExtend (triton::uint32 id) const |
Converts a capstone's extend id to a triton's extend id. More... | |
TRITON_EXPORT triton::arch::arm::condition_e | capstoneConditionToTritonCondition (triton::uint32 id) const |
Converts a capstone's condition id to a triton's condition id. More... | |
TRITON_EXPORT triton::uint32 | capstoneInstructionToTritonInstruction (triton::uint32 id) const |
Converts a capstone's instruction id to a triton's instruction id. More... | |
This class is used to describe the ARM (64-bits) spec.
Definition at line 61 of file aarch64Cpu.hpp.
triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu | ( | triton::callbacks::Callbacks * | callbacks = nullptr | ) |
Constructor.
Definition at line 27 of file aarch64Cpu.cpp.
triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu | ( | const AArch64Cpu & | other | ) |
Constructor.
Definition at line 36 of file aarch64Cpu.cpp.
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Destructor.
Definition at line 41 of file aarch64Cpu.cpp.
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Clears the architecture states (registers and memory).
Implements triton::arch::CpuInterface.
Definition at line 134 of file aarch64Cpu.cpp.
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Clears concrete values assigned to the memory cells.
Implements triton::arch::CpuInterface.
Definition at line 1141 of file aarch64Cpu.cpp.
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Clears concrete values assigned to the memory cells.
Implements triton::arch::CpuInterface.
Definition at line 1146 of file aarch64Cpu.cpp.
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Disassembles the instruction according to the architecture.
Implements triton::arch::CpuInterface.
Definition at line 328 of file aarch64Cpu.cpp.
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Returns all registers.
Implements triton::arch::CpuInterface.
Definition at line 259 of file aarch64Cpu.cpp.
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Returns the concrete value of a memory area.
Implements triton::arch::CpuInterface.
Definition at line 535 of file aarch64Cpu.cpp.
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Returns the concrete value of memory cells.
Implements triton::arch::CpuInterface.
Definition at line 514 of file aarch64Cpu.cpp.
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Returns the concrete value of a memory cell.
Implements triton::arch::CpuInterface.
Definition at line 502 of file aarch64Cpu.cpp.
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Returns the concrete value of a register.
Implements triton::arch::CpuInterface.
Definition at line 545 of file aarch64Cpu.cpp.
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Returns the kind of endianness as triton::arch::endianness_e.
Implements triton::arch::CpuInterface.
Definition at line 214 of file aarch64Cpu.cpp.
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Returns parent register from a given one.
Implements triton::arch::CpuInterface.
Definition at line 308 of file aarch64Cpu.cpp.
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Returns parent register from a given one.
Implements triton::arch::CpuInterface.
Definition at line 313 of file aarch64Cpu.cpp.
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Returns all parent registers.
Implements triton::arch::CpuInterface.
Definition at line 264 of file aarch64Cpu.cpp.
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Returns the program counter register.
Implements triton::arch::CpuInterface.
Definition at line 318 of file aarch64Cpu.cpp.
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Returns register from name.
Implements triton::arch::CpuInterface.
Definition at line 297 of file aarch64Cpu.cpp.
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Returns register from id.
Implements triton::arch::CpuInterface.
Definition at line 288 of file aarch64Cpu.cpp.
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Returns the stack pointer register.
Implements triton::arch::CpuInterface.
Definition at line 323 of file aarch64Cpu.cpp.
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Returns the bit in bit of the General Purpose Registers.
Implements triton::arch::CpuInterface.
Definition at line 254 of file aarch64Cpu.cpp.
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Returns the bit in byte of the General Purpose Registers.
Implements triton::arch::CpuInterface.
Definition at line 249 of file aarch64Cpu.cpp.
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Returns true if memory cells have a defined concrete value.
Implements triton::arch::CpuInterface.
Definition at line 1127 of file aarch64Cpu.cpp.
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Returns true if memory cells have a defined concrete value.
Implements triton::arch::CpuInterface.
Definition at line 1132 of file aarch64Cpu.cpp.
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Returns true if the register ID is a flag.
Implements triton::arch::CpuInterface.
Definition at line 219 of file aarch64Cpu.cpp.
bool triton::arch::arm::aarch64::AArch64Cpu::isGPR | ( | triton::arch::register_e | regId | ) | const |
Returns true if regId is a GRP.
Definition at line 234 of file aarch64Cpu.cpp.
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Returns true if the exclusive memory access flag is set. Only valid for Arm32.
Implements triton::arch::CpuInterface.
Definition at line 1116 of file aarch64Cpu.cpp.
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Returns true if the register ID is a register.
Implements triton::arch::CpuInterface.
Definition at line 224 of file aarch64Cpu.cpp.
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Returns true if the register ID is valid.
Implements triton::arch::CpuInterface.
Definition at line 229 of file aarch64Cpu.cpp.
bool triton::arch::arm::aarch64::AArch64Cpu::isScalarRegister | ( | triton::arch::register_e | regId | ) | const |
Returns true if regId is a scalar register.
Definition at line 239 of file aarch64Cpu.cpp.
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Returns true if the execution mode is Thumb. Only useful for Arm32.
Implements triton::arch::CpuInterface.
Definition at line 1105 of file aarch64Cpu.cpp.
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Returns the number of registers according to the CPU architecture.
Implements triton::arch::CpuInterface.
Definition at line 244 of file aarch64Cpu.cpp.
AArch64Cpu & triton::arch::arm::aarch64::AArch64Cpu::operator= | ( | const AArch64Cpu & | other | ) |
Copies a AArch64Cpu class.
Definition at line 208 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a memory area.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 820 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a memory area.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 828 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of memory cells.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 799 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a memory cell.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 792 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a register.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 836 of file aarch64Cpu.cpp.
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Sets exclusive memory access flag. Only valid for Arm32.
Implements triton::arch::CpuInterface.
Definition at line 1122 of file aarch64Cpu.cpp.
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Sets CPU state to Thumb mode.
Implements triton::arch::CpuInterface.
Definition at line 1111 of file aarch64Cpu.cpp.
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map of address -> concrete value
item1: memory address
item2: concrete value
Definition at line 87 of file aarch64Cpu.hpp.
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Concrete value of pc.
Definition at line 218 of file aarch64Cpu.hpp.
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Concrete value of q0.
Definition at line 152 of file aarch64Cpu.hpp.
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Concrete value of q1.
Definition at line 154 of file aarch64Cpu.hpp.
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Concrete value of q10.
Definition at line 172 of file aarch64Cpu.hpp.
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Concrete value of q11.
Definition at line 174 of file aarch64Cpu.hpp.
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Concrete value of q12.
Definition at line 176 of file aarch64Cpu.hpp.
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Concrete value of q13.
Definition at line 178 of file aarch64Cpu.hpp.
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Concrete value of q14.
Definition at line 180 of file aarch64Cpu.hpp.
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Concrete value of q15.
Definition at line 182 of file aarch64Cpu.hpp.
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Concrete value of q16.
Definition at line 184 of file aarch64Cpu.hpp.
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Concrete value of q17.
Definition at line 186 of file aarch64Cpu.hpp.
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Concrete value of q18.
Definition at line 188 of file aarch64Cpu.hpp.
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Concrete value of q19.
Definition at line 190 of file aarch64Cpu.hpp.
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Concrete value of q2.
Definition at line 156 of file aarch64Cpu.hpp.
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Concrete value of q20.
Definition at line 192 of file aarch64Cpu.hpp.
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Concrete value of q21.
Definition at line 194 of file aarch64Cpu.hpp.
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Concrete value of q22.
Definition at line 196 of file aarch64Cpu.hpp.
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Concrete value of q23.
Definition at line 198 of file aarch64Cpu.hpp.
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Concrete value of q24.
Definition at line 200 of file aarch64Cpu.hpp.
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Concrete value of q25.
Definition at line 202 of file aarch64Cpu.hpp.
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Concrete value of q26.
Definition at line 204 of file aarch64Cpu.hpp.
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Concrete value of q27.
Definition at line 206 of file aarch64Cpu.hpp.
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Concrete value of q28.
Definition at line 208 of file aarch64Cpu.hpp.
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Concrete value of q29.
Definition at line 210 of file aarch64Cpu.hpp.
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Concrete value of q3.
Definition at line 158 of file aarch64Cpu.hpp.
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Concrete value of q30.
Definition at line 212 of file aarch64Cpu.hpp.
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Concrete value of q31.
Definition at line 214 of file aarch64Cpu.hpp.
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Concrete value of q4.
Definition at line 160 of file aarch64Cpu.hpp.
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Concrete value of q5.
Definition at line 162 of file aarch64Cpu.hpp.
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Concrete value of q6.
Definition at line 164 of file aarch64Cpu.hpp.
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Concrete value of q7.
Definition at line 166 of file aarch64Cpu.hpp.
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Concrete value of q8.
Definition at line 168 of file aarch64Cpu.hpp.
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Concrete value of q9.
Definition at line 170 of file aarch64Cpu.hpp.
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Concrete value of sp.
Definition at line 216 of file aarch64Cpu.hpp.
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Concrete value of spsr.
Definition at line 220 of file aarch64Cpu.hpp.
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Concrete value of x0.
Definition at line 90 of file aarch64Cpu.hpp.
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Concrete value of x1.
Definition at line 92 of file aarch64Cpu.hpp.
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Concrete value of x10.
Definition at line 110 of file aarch64Cpu.hpp.
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Concrete value of x11.
Definition at line 112 of file aarch64Cpu.hpp.
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Concrete value of x12.
Definition at line 114 of file aarch64Cpu.hpp.
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Concrete value of x13.
Definition at line 116 of file aarch64Cpu.hpp.
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Concrete value of x14.
Definition at line 118 of file aarch64Cpu.hpp.
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Concrete value of x15.
Definition at line 120 of file aarch64Cpu.hpp.
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Concrete value of x16.
Definition at line 122 of file aarch64Cpu.hpp.
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Concrete value of x17.
Definition at line 124 of file aarch64Cpu.hpp.
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Concrete value of x18.
Definition at line 126 of file aarch64Cpu.hpp.
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Concrete value of x19.
Definition at line 128 of file aarch64Cpu.hpp.
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Concrete value of x2.
Definition at line 94 of file aarch64Cpu.hpp.
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Concrete value of x20.
Definition at line 130 of file aarch64Cpu.hpp.
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Concrete value of x21.
Definition at line 132 of file aarch64Cpu.hpp.
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Concrete value of x22.
Definition at line 134 of file aarch64Cpu.hpp.
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Concrete value of x23.
Definition at line 136 of file aarch64Cpu.hpp.
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Concrete value of x24.
Definition at line 138 of file aarch64Cpu.hpp.
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Concrete value of x25.
Definition at line 140 of file aarch64Cpu.hpp.
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Concrete value of x26.
Definition at line 142 of file aarch64Cpu.hpp.
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Concrete value of x27.
Definition at line 144 of file aarch64Cpu.hpp.
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Concrete value of x28.
Definition at line 146 of file aarch64Cpu.hpp.
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Concrete value of x29.
Definition at line 148 of file aarch64Cpu.hpp.
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Concrete value of x3.
Definition at line 96 of file aarch64Cpu.hpp.
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Concrete value of x30.
Definition at line 150 of file aarch64Cpu.hpp.
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Concrete value of x4.
Definition at line 98 of file aarch64Cpu.hpp.
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Concrete value of x5.
Definition at line 100 of file aarch64Cpu.hpp.
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Concrete value of x6.
Definition at line 102 of file aarch64Cpu.hpp.
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Concrete value of x7.
Definition at line 104 of file aarch64Cpu.hpp.
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Concrete value of x8.
Definition at line 106 of file aarch64Cpu.hpp.
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Concrete value of x9.
Definition at line 108 of file aarch64Cpu.hpp.