libTriton version 1.0 build 1592
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Public Member Functions | Protected Attributes | List of all members
triton::arch::arm::aarch64::AArch64Cpu Class Reference

This class is used to describe the ARM (64-bits) spec. More...

#include <aarch64Cpu.hpp>

Inheritance diagram for triton::arch::arm::aarch64::AArch64Cpu:

Public Member Functions

TRITON_EXPORT AArch64Cpu (triton::callbacks::Callbacks *callbacks=nullptr)
 Constructor.
 
TRITON_EXPORT AArch64Cpu (const AArch64Cpu &other)
 Constructor.
 
virtual TRITON_EXPORT ~AArch64Cpu ()
 Destructor.
 
TRITON_EXPORT AArch64Cpuoperator= (const AArch64Cpu &other)
 Copies a AArch64Cpu class.
 
TRITON_EXPORT bool isGPR (triton::arch::register_e regId) const
 Returns true if regId is a GRP.
 
TRITON_EXPORT bool isScalarRegister (triton::arch::register_e regId) const
 Returns true if regId is a scalar register.
 
TRITON_EXPORT bool isVectorRegister (triton::arch::register_e regId) const
 Returns true if regId is a vector register.
 
TRITON_EXPORT bool isSystemRegister (triton::arch::register_e regId) const
 Returns true if regId is a system register.
 
TRITON_EXPORT bool isFlag (triton::arch::register_e regId) const
 Returns true if the register ID is a flag.
 
TRITON_EXPORT bool isRegister (triton::arch::register_e regId) const
 Returns true if the register ID is a register.
 
TRITON_EXPORT bool isRegisterValid (triton::arch::register_e regId) const
 Returns true if the register ID is valid.
 
TRITON_EXPORT bool isThumb (void) const
 Returns true if the execution mode is Thumb. Only useful for Arm32.
 
TRITON_EXPORT bool isMemoryExclusive (const triton::arch::MemoryAccess &mem) const
 Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
 
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters (void) const
 Returns all registers.
 
TRITON_EXPORT const std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > & getConcreteMemory (void) const
 Return all memory.
 
TRITON_EXPORT const triton::arch::RegistergetParentRegister (const triton::arch::Register &reg) const
 Returns parent register from a given one.
 
TRITON_EXPORT const triton::arch::RegistergetParentRegister (triton::arch::register_e id) const
 Returns parent register from a given one.
 
TRITON_EXPORT const triton::arch::RegistergetProgramCounter (void) const
 Returns the program counter register.
 
TRITON_EXPORT const triton::arch::RegistergetRegister (triton::arch::register_e id) const
 Returns register from id.
 
TRITON_EXPORT const triton::arch::RegistergetRegister (const std::string &name) const
 Returns register from name.
 
TRITON_EXPORT const triton::arch::RegistergetStackPointer (void) const
 Returns the stack pointer register.
 
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters (void) const
 Returns all parent registers.
 
TRITON_EXPORT std::vector< triton::uint8getConcreteMemoryAreaValue (triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
 Returns the concrete value of a memory area.
 
TRITON_EXPORT triton::arch::endianness_e getEndianness (void) const
 Returns the kind of endianness as triton::arch::endianness_e.
 
TRITON_EXPORT triton::uint32 gprBitSize (void) const
 Returns the bit in bit of the General Purpose Registers.
 
TRITON_EXPORT triton::uint32 gprSize (void) const
 Returns the bit in byte of the General Purpose Registers.
 
TRITON_EXPORT triton::uint32 numberOfRegisters (void) const
 Returns the number of registers according to the CPU architecture.
 
TRITON_EXPORT triton::uint512 getConcreteMemoryValue (const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const
 Returns the concrete value of memory cells.
 
TRITON_EXPORT triton::uint512 getConcreteRegisterValue (const triton::arch::Register &reg, bool execCallbacks=true) const
 Returns the concrete value of a register.
 
TRITON_EXPORT triton::uint8 getConcreteMemoryValue (triton::uint64 addr, bool execCallbacks=true) const
 Returns the concrete value of a memory cell.
 
TRITON_EXPORT void clear (void)
 Clears the architecture states (registers and memory).
 
TRITON_EXPORT void disassembly (triton::arch::Instruction &inst)
 Disassembles the instruction according to the architecture.
 
TRITON_EXPORT void setConcreteMemoryAreaValue (triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
 [architecture api] - Sets the concrete value of a memory area.
 
TRITON_EXPORT void setConcreteMemoryAreaValue (triton::uint64 baseAddr, const void *area, triton::usize size, bool execCallbacks=true)
 [architecture api] - Sets the concrete value of a memory area.
 
TRITON_EXPORT void setConcreteMemoryValue (const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true)
 [architecture api] - Sets the concrete value of memory cells.
 
TRITON_EXPORT void setConcreteMemoryValue (triton::uint64 addr, triton::uint8 value, bool execCallbacks=true)
 [architecture api] - Sets the concrete value of a memory cell.
 
TRITON_EXPORT void setConcreteRegisterValue (const triton::arch::Register &reg, const triton::uint512 &value, bool execCallbacks=true)
 [architecture api] - Sets the concrete value of a register.
 
TRITON_EXPORT void setThumb (bool state)
 Sets CPU state to Thumb mode.
 
TRITON_EXPORT void setMemoryExclusiveTag (const triton::arch::MemoryAccess &mem, bool tag)
 Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
 
TRITON_EXPORT bool isConcreteMemoryValueDefined (const triton::arch::MemoryAccess &mem) const
 Returns true if memory cells have a defined concrete value.
 
TRITON_EXPORT bool isConcreteMemoryValueDefined (triton::uint64 baseAddr, triton::usize size=1) const
 Returns true if memory cells have a defined concrete value.
 
TRITON_EXPORT void clearConcreteMemoryValue (const triton::arch::MemoryAccess &mem)
 Clears concrete values assigned to the memory cells.
 
TRITON_EXPORT void clearConcreteMemoryValue (triton::uint64 baseAddr, triton::usize size=1)
 Clears concrete values assigned to the memory cells.
 
- Public Member Functions inherited from triton::arch::CpuInterface
virtual TRITON_EXPORT ~CpuInterface ()
 Destructor.
 
- Public Member Functions inherited from triton::arch::arm::aarch64::AArch64Specifications
TRITON_EXPORT AArch64Specifications (triton::arch::architecture_e)
 Constructor.
 
TRITON_EXPORT triton::arch::register_e capstoneRegisterToTritonRegister (triton::uint32 id) const
 Converts a capstone's register id to a triton's register id.
 
TRITON_EXPORT triton::arch::arm::shift_e capstoneShiftToTritonShift (triton::uint32 id) const
 Converts a capstone's shift id to a triton's shift id.
 
TRITON_EXPORT triton::arch::arm::extend_e capstoneExtendToTritonExtend (triton::uint32 id) const
 Converts a capstone's extend id to a triton's extend id.
 
TRITON_EXPORT triton::arch::arm::condition_e capstoneConditionToTritonCondition (triton::uint32 id) const
 Converts a capstone's condition id to a triton's condition id.
 
TRITON_EXPORT triton::arch::arm::vas_e capstoneVASToTritonVAS (triton::uint32 id) const
 Converts a capstone's vas id to a triton's vas id.
 
TRITON_EXPORT triton::uint32 capstoneInstructionToTritonInstruction (triton::uint32 id) const
 Converts a capstone's instruction id to a triton's instruction id.
 
TRITON_EXPORT triton::uint32 getMemoryOperandSpecialSize (triton::uint32 id) const
 Returns memory access size if it is specified by instruction.
 

Protected Attributes

std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > memory
 map of address -> concrete value
 
triton::uint8 x0 [triton::size::qword]
 Concrete value of x0.
 
triton::uint8 x1 [triton::size::qword]
 Concrete value of x1.
 
triton::uint8 x2 [triton::size::qword]
 Concrete value of x2.
 
triton::uint8 x3 [triton::size::qword]
 Concrete value of x3.
 
triton::uint8 x4 [triton::size::qword]
 Concrete value of x4.
 
triton::uint8 x5 [triton::size::qword]
 Concrete value of x5.
 
triton::uint8 x6 [triton::size::qword]
 Concrete value of x6.
 
triton::uint8 x7 [triton::size::qword]
 Concrete value of x7.
 
triton::uint8 x8 [triton::size::qword]
 Concrete value of x8.
 
triton::uint8 x9 [triton::size::qword]
 Concrete value of x9.
 
triton::uint8 x10 [triton::size::qword]
 Concrete value of x10.
 
triton::uint8 x11 [triton::size::qword]
 Concrete value of x11.
 
triton::uint8 x12 [triton::size::qword]
 Concrete value of x12.
 
triton::uint8 x13 [triton::size::qword]
 Concrete value of x13.
 
triton::uint8 x14 [triton::size::qword]
 Concrete value of x14.
 
triton::uint8 x15 [triton::size::qword]
 Concrete value of x15.
 
triton::uint8 x16 [triton::size::qword]
 Concrete value of x16.
 
triton::uint8 x17 [triton::size::qword]
 Concrete value of x17.
 
triton::uint8 x18 [triton::size::qword]
 Concrete value of x18.
 
triton::uint8 x19 [triton::size::qword]
 Concrete value of x19.
 
triton::uint8 x20 [triton::size::qword]
 Concrete value of x20.
 
triton::uint8 x21 [triton::size::qword]
 Concrete value of x21.
 
triton::uint8 x22 [triton::size::qword]
 Concrete value of x22.
 
triton::uint8 x23 [triton::size::qword]
 Concrete value of x23.
 
triton::uint8 x24 [triton::size::qword]
 Concrete value of x24.
 
triton::uint8 x25 [triton::size::qword]
 Concrete value of x25.
 
triton::uint8 x26 [triton::size::qword]
 Concrete value of x26.
 
triton::uint8 x27 [triton::size::qword]
 Concrete value of x27.
 
triton::uint8 x28 [triton::size::qword]
 Concrete value of x28.
 
triton::uint8 x29 [triton::size::qword]
 Concrete value of x29.
 
triton::uint8 x30 [triton::size::qword]
 Concrete value of x30.
 
triton::uint8 q0 [triton::size::dqword]
 Concrete value of q0.
 
triton::uint8 q1 [triton::size::dqword]
 Concrete value of q1.
 
triton::uint8 q2 [triton::size::dqword]
 Concrete value of q2.
 
triton::uint8 q3 [triton::size::dqword]
 Concrete value of q3.
 
triton::uint8 q4 [triton::size::dqword]
 Concrete value of q4.
 
triton::uint8 q5 [triton::size::dqword]
 Concrete value of q5.
 
triton::uint8 q6 [triton::size::dqword]
 Concrete value of q6.
 
triton::uint8 q7 [triton::size::dqword]
 Concrete value of q7.
 
triton::uint8 q8 [triton::size::dqword]
 Concrete value of q8.
 
triton::uint8 q9 [triton::size::dqword]
 Concrete value of q9.
 
triton::uint8 q10 [triton::size::dqword]
 Concrete value of q10.
 
triton::uint8 q11 [triton::size::dqword]
 Concrete value of q11.
 
triton::uint8 q12 [triton::size::dqword]
 Concrete value of q12.
 
triton::uint8 q13 [triton::size::dqword]
 Concrete value of q13.
 
triton::uint8 q14 [triton::size::dqword]
 Concrete value of q14.
 
triton::uint8 q15 [triton::size::dqword]
 Concrete value of q15.
 
triton::uint8 q16 [triton::size::dqword]
 Concrete value of q16.
 
triton::uint8 q17 [triton::size::dqword]
 Concrete value of q17.
 
triton::uint8 q18 [triton::size::dqword]
 Concrete value of q18.
 
triton::uint8 q19 [triton::size::dqword]
 Concrete value of q19.
 
triton::uint8 q20 [triton::size::dqword]
 Concrete value of q20.
 
triton::uint8 q21 [triton::size::dqword]
 Concrete value of q21.
 
triton::uint8 q22 [triton::size::dqword]
 Concrete value of q22.
 
triton::uint8 q23 [triton::size::dqword]
 Concrete value of q23.
 
triton::uint8 q24 [triton::size::dqword]
 Concrete value of q24.
 
triton::uint8 q25 [triton::size::dqword]
 Concrete value of q25.
 
triton::uint8 q26 [triton::size::dqword]
 Concrete value of q26.
 
triton::uint8 q27 [triton::size::dqword]
 Concrete value of q27.
 
triton::uint8 q28 [triton::size::dqword]
 Concrete value of q28.
 
triton::uint8 q29 [triton::size::dqword]
 Concrete value of q29.
 
triton::uint8 q30 [triton::size::dqword]
 Concrete value of q30.
 
triton::uint8 q31 [triton::size::dqword]
 Concrete value of q31.
 
triton::uint8 sp [triton::size::qword]
 Concrete value of sp.
 
triton::uint8 pc [triton::size::qword]
 Concrete value of pc.
 
triton::uint8 spsr [triton::size::dword]
 Concrete value of spsr.
 
- Protected Attributes inherited from triton::arch::arm::aarch64::AArch64Specifications
std::unordered_map< triton::arch::register_e, const triton::arch::Registerid2reg
 List of registers specification available for this architecture.
 
std::unordered_map< std::string, triton::arch::register_ename2id
 

Detailed Description

This class is used to describe the ARM (64-bits) spec.

Definition at line 61 of file aarch64Cpu.hpp.

Constructor & Destructor Documentation

◆ AArch64Cpu() [1/2]

triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu ( triton::callbacks::Callbacks * callbacks = nullptr)

Constructor.

Definition at line 27 of file aarch64Cpu.cpp.

◆ AArch64Cpu() [2/2]

triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu ( const AArch64Cpu & other)

Constructor.

Definition at line 36 of file aarch64Cpu.cpp.

◆ ~AArch64Cpu()

triton::arch::arm::aarch64::AArch64Cpu::~AArch64Cpu ( )
virtual

Destructor.

Definition at line 41 of file aarch64Cpu.cpp.

Member Function Documentation

◆ clear()

void triton::arch::arm::aarch64::AArch64Cpu::clear ( void )
virtual

Clears the architecture states (registers and memory).

System registers

Implements triton::arch::CpuInterface.

Definition at line 142 of file aarch64Cpu.cpp.

◆ clearConcreteMemoryValue() [1/2]

void triton::arch::arm::aarch64::AArch64Cpu::clearConcreteMemoryValue ( const triton::arch::MemoryAccess & mem)
virtual

Clears concrete values assigned to the memory cells.

Implements triton::arch::CpuInterface.

Definition at line 1297 of file aarch64Cpu.cpp.

◆ clearConcreteMemoryValue() [2/2]

void triton::arch::arm::aarch64::AArch64Cpu::clearConcreteMemoryValue ( triton::uint64 baseAddr,
triton::usize size = 1 )
virtual

Clears concrete values assigned to the memory cells.

Implements triton::arch::CpuInterface.

Definition at line 1302 of file aarch64Cpu.cpp.

◆ disassembly()

void triton::arch::arm::aarch64::AArch64Cpu::disassembly ( triton::arch::Instruction & inst)
virtual

Disassembles the instruction according to the architecture.

Implements triton::arch::CpuInterface.

Definition at line 369 of file aarch64Cpu.cpp.

◆ getAllRegisters()

const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & triton::arch::arm::aarch64::AArch64Cpu::getAllRegisters ( void ) const
virtual

Returns all registers.

Implements triton::arch::CpuInterface.

Definition at line 284 of file aarch64Cpu.cpp.

◆ getConcreteMemory()

const std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > & triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemory ( void ) const
virtual

Return all memory.

Implements triton::arch::CpuInterface.

Definition at line 288 of file aarch64Cpu.cpp.

◆ getConcreteMemoryAreaValue()

std::vector< triton::uint8 > triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemoryAreaValue ( triton::uint64 baseAddr,
triton::usize size,
bool execCallbacks = true ) const
virtual

Returns the concrete value of a memory area.

Implements triton::arch::CpuInterface.

Definition at line 595 of file aarch64Cpu.cpp.

◆ getConcreteMemoryValue() [1/2]

triton::uint512 triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemoryValue ( const triton::arch::MemoryAccess & mem,
bool execCallbacks = true ) const
virtual

Returns the concrete value of memory cells.

Implements triton::arch::CpuInterface.

Definition at line 574 of file aarch64Cpu.cpp.

◆ getConcreteMemoryValue() [2/2]

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::getConcreteMemoryValue ( triton::uint64 addr,
bool execCallbacks = true ) const
virtual

Returns the concrete value of a memory cell.

Implements triton::arch::CpuInterface.

Definition at line 562 of file aarch64Cpu.cpp.

◆ getConcreteRegisterValue()

triton::uint512 triton::arch::arm::aarch64::AArch64Cpu::getConcreteRegisterValue ( const triton::arch::Register & reg,
bool execCallbacks = true ) const
virtual

Returns the concrete value of a register.

System registers

Implements triton::arch::CpuInterface.

Definition at line 605 of file aarch64Cpu.cpp.

◆ getEndianness()

triton::arch::endianness_e triton::arch::arm::aarch64::AArch64Cpu::getEndianness ( void ) const
virtual

Returns the kind of endianness as triton::arch::endianness_e.

Implements triton::arch::CpuInterface.

Definition at line 229 of file aarch64Cpu.cpp.

◆ getParentRegister() [1/2]

const triton::arch::Register & triton::arch::arm::aarch64::AArch64Cpu::getParentRegister ( const triton::arch::Register & reg) const
virtual

Returns parent register from a given one.

Implements triton::arch::CpuInterface.

Definition at line 349 of file aarch64Cpu.cpp.

◆ getParentRegister() [2/2]

const triton::arch::Register & triton::arch::arm::aarch64::AArch64Cpu::getParentRegister ( triton::arch::register_e id) const
virtual

Returns parent register from a given one.

Implements triton::arch::CpuInterface.

Definition at line 354 of file aarch64Cpu.cpp.

◆ getParentRegisters()

std::set< const triton::arch::Register * > triton::arch::arm::aarch64::AArch64Cpu::getParentRegisters ( void ) const
virtual

Returns all parent registers.

Implements triton::arch::CpuInterface.

Definition at line 293 of file aarch64Cpu.cpp.

◆ getProgramCounter()

const triton::arch::Register & triton::arch::arm::aarch64::AArch64Cpu::getProgramCounter ( void ) const
virtual

Returns the program counter register.

Implements triton::arch::CpuInterface.

Definition at line 359 of file aarch64Cpu.cpp.

◆ getRegister() [1/2]

const triton::arch::Register & triton::arch::arm::aarch64::AArch64Cpu::getRegister ( const std::string & name) const
virtual

Returns register from name.

Implements triton::arch::CpuInterface.

Definition at line 338 of file aarch64Cpu.cpp.

◆ getRegister() [2/2]

const triton::arch::Register & triton::arch::arm::aarch64::AArch64Cpu::getRegister ( triton::arch::register_e id) const
virtual

Returns register from id.

Implements triton::arch::CpuInterface.

Definition at line 329 of file aarch64Cpu.cpp.

◆ getStackPointer()

const triton::arch::Register & triton::arch::arm::aarch64::AArch64Cpu::getStackPointer ( void ) const
virtual

Returns the stack pointer register.

Implements triton::arch::CpuInterface.

Definition at line 364 of file aarch64Cpu.cpp.

◆ gprBitSize()

triton::uint32 triton::arch::arm::aarch64::AArch64Cpu::gprBitSize ( void ) const
virtual

Returns the bit in bit of the General Purpose Registers.

Implements triton::arch::CpuInterface.

Definition at line 279 of file aarch64Cpu.cpp.

◆ gprSize()

triton::uint32 triton::arch::arm::aarch64::AArch64Cpu::gprSize ( void ) const
virtual

Returns the bit in byte of the General Purpose Registers.

Implements triton::arch::CpuInterface.

Definition at line 274 of file aarch64Cpu.cpp.

◆ isConcreteMemoryValueDefined() [1/2]

bool triton::arch::arm::aarch64::AArch64Cpu::isConcreteMemoryValueDefined ( const triton::arch::MemoryAccess & mem) const
virtual

Returns true if memory cells have a defined concrete value.

Implements triton::arch::CpuInterface.

Definition at line 1283 of file aarch64Cpu.cpp.

◆ isConcreteMemoryValueDefined() [2/2]

bool triton::arch::arm::aarch64::AArch64Cpu::isConcreteMemoryValueDefined ( triton::uint64 baseAddr,
triton::usize size = 1 ) const
virtual

Returns true if memory cells have a defined concrete value.

Implements triton::arch::CpuInterface.

Definition at line 1288 of file aarch64Cpu.cpp.

◆ isFlag()

bool triton::arch::arm::aarch64::AArch64Cpu::isFlag ( triton::arch::register_e regId) const
virtual

Returns true if the register ID is a flag.

Implements triton::arch::CpuInterface.

Definition at line 234 of file aarch64Cpu.cpp.

◆ isGPR()

bool triton::arch::arm::aarch64::AArch64Cpu::isGPR ( triton::arch::register_e regId) const

Returns true if regId is a GRP.

Definition at line 249 of file aarch64Cpu.cpp.

◆ isMemoryExclusive()

bool triton::arch::arm::aarch64::AArch64Cpu::isMemoryExclusive ( const triton::arch::MemoryAccess & mem) const
virtual

Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.

Implements triton::arch::CpuInterface.

Definition at line 1256 of file aarch64Cpu.cpp.

◆ isRegister()

bool triton::arch::arm::aarch64::AArch64Cpu::isRegister ( triton::arch::register_e regId) const
virtual

Returns true if the register ID is a register.

Implements triton::arch::CpuInterface.

Definition at line 239 of file aarch64Cpu.cpp.

◆ isRegisterValid()

bool triton::arch::arm::aarch64::AArch64Cpu::isRegisterValid ( triton::arch::register_e regId) const
virtual

Returns true if the register ID is valid.

Implements triton::arch::CpuInterface.

Definition at line 244 of file aarch64Cpu.cpp.

◆ isScalarRegister()

bool triton::arch::arm::aarch64::AArch64Cpu::isScalarRegister ( triton::arch::register_e regId) const

Returns true if regId is a scalar register.

Definition at line 254 of file aarch64Cpu.cpp.

◆ isSystemRegister()

bool triton::arch::arm::aarch64::AArch64Cpu::isSystemRegister ( triton::arch::register_e regId) const

Returns true if regId is a system register.

Definition at line 264 of file aarch64Cpu.cpp.

◆ isThumb()

bool triton::arch::arm::aarch64::AArch64Cpu::isThumb ( void ) const
virtual

Returns true if the execution mode is Thumb. Only useful for Arm32.

Implements triton::arch::CpuInterface.

Definition at line 1245 of file aarch64Cpu.cpp.

◆ isVectorRegister()

bool triton::arch::arm::aarch64::AArch64Cpu::isVectorRegister ( triton::arch::register_e regId) const

Returns true if regId is a vector register.

Definition at line 259 of file aarch64Cpu.cpp.

◆ numberOfRegisters()

triton::uint32 triton::arch::arm::aarch64::AArch64Cpu::numberOfRegisters ( void ) const
virtual

Returns the number of registers according to the CPU architecture.

Implements triton::arch::CpuInterface.

Definition at line 269 of file aarch64Cpu.cpp.

◆ operator=()

AArch64Cpu & triton::arch::arm::aarch64::AArch64Cpu::operator= ( const AArch64Cpu & other)

Copies a AArch64Cpu class.

Definition at line 223 of file aarch64Cpu.cpp.

◆ setConcreteMemoryAreaValue() [1/2]

void triton::arch::arm::aarch64::AArch64Cpu::setConcreteMemoryAreaValue ( triton::uint64 baseAddr,
const std::vector< triton::uint8 > & values,
bool execCallbacks = true )
virtual

[architecture api] - Sets the concrete value of a memory area.

Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.

Implements triton::arch::CpuInterface.

Definition at line 920 of file aarch64Cpu.cpp.

◆ setConcreteMemoryAreaValue() [2/2]

void triton::arch::arm::aarch64::AArch64Cpu::setConcreteMemoryAreaValue ( triton::uint64 baseAddr,
const void * area,
triton::usize size,
bool execCallbacks = true )
virtual

[architecture api] - Sets the concrete value of a memory area.

Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.

Implements triton::arch::CpuInterface.

Definition at line 928 of file aarch64Cpu.cpp.

◆ setConcreteMemoryValue() [1/2]

void triton::arch::arm::aarch64::AArch64Cpu::setConcreteMemoryValue ( const triton::arch::MemoryAccess & mem,
const triton::uint512 & value,
bool execCallbacks = true )
virtual

[architecture api] - Sets the concrete value of memory cells.

Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.

Implements triton::arch::CpuInterface.

Definition at line 899 of file aarch64Cpu.cpp.

◆ setConcreteMemoryValue() [2/2]

void triton::arch::arm::aarch64::AArch64Cpu::setConcreteMemoryValue ( triton::uint64 addr,
triton::uint8 value,
bool execCallbacks = true )
virtual

[architecture api] - Sets the concrete value of a memory cell.

Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.

Implements triton::arch::CpuInterface.

Definition at line 892 of file aarch64Cpu.cpp.

◆ setConcreteRegisterValue()

void triton::arch::arm::aarch64::AArch64Cpu::setConcreteRegisterValue ( const triton::arch::Register & reg,
const triton::uint512 & value,
bool execCallbacks = true )
virtual

[architecture api] - Sets the concrete value of a register.

Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.

System registers

Implements triton::arch::CpuInterface.

Definition at line 936 of file aarch64Cpu.cpp.

◆ setMemoryExclusiveTag()

void triton::arch::arm::aarch64::AArch64Cpu::setMemoryExclusiveTag ( const triton::arch::MemoryAccess & mem,
bool tag )
virtual

Sets exclusive memory access tag. Only valid for Arm32 and AArch64.

Implements triton::arch::CpuInterface.

Definition at line 1269 of file aarch64Cpu.cpp.

◆ setThumb()

void triton::arch::arm::aarch64::AArch64Cpu::setThumb ( bool state)
virtual

Sets CPU state to Thumb mode.

Implements triton::arch::CpuInterface.

Definition at line 1251 of file aarch64Cpu.cpp.

Member Data Documentation

◆ memory

std::unordered_map<triton::uint64, triton::uint8, IdentityHash<triton::uint64> > triton::arch::arm::aarch64::AArch64Cpu::memory
protected

map of address -> concrete value

item1: memory address
item2: concrete value

Definition at line 90 of file aarch64Cpu.hpp.

◆ pc

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::pc[triton::size::qword]
protected

Concrete value of pc.

Definition at line 221 of file aarch64Cpu.hpp.

◆ q0

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q0[triton::size::dqword]
protected

Concrete value of q0.

Definition at line 155 of file aarch64Cpu.hpp.

◆ q1

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q1[triton::size::dqword]
protected

Concrete value of q1.

Definition at line 157 of file aarch64Cpu.hpp.

◆ q10

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q10[triton::size::dqword]
protected

Concrete value of q10.

Definition at line 175 of file aarch64Cpu.hpp.

◆ q11

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q11[triton::size::dqword]
protected

Concrete value of q11.

Definition at line 177 of file aarch64Cpu.hpp.

◆ q12

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q12[triton::size::dqword]
protected

Concrete value of q12.

Definition at line 179 of file aarch64Cpu.hpp.

◆ q13

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q13[triton::size::dqword]
protected

Concrete value of q13.

Definition at line 181 of file aarch64Cpu.hpp.

◆ q14

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q14[triton::size::dqword]
protected

Concrete value of q14.

Definition at line 183 of file aarch64Cpu.hpp.

◆ q15

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q15[triton::size::dqword]
protected

Concrete value of q15.

Definition at line 185 of file aarch64Cpu.hpp.

◆ q16

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q16[triton::size::dqword]
protected

Concrete value of q16.

Definition at line 187 of file aarch64Cpu.hpp.

◆ q17

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q17[triton::size::dqword]
protected

Concrete value of q17.

Definition at line 189 of file aarch64Cpu.hpp.

◆ q18

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q18[triton::size::dqword]
protected

Concrete value of q18.

Definition at line 191 of file aarch64Cpu.hpp.

◆ q19

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q19[triton::size::dqword]
protected

Concrete value of q19.

Definition at line 193 of file aarch64Cpu.hpp.

◆ q2

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q2[triton::size::dqword]
protected

Concrete value of q2.

Definition at line 159 of file aarch64Cpu.hpp.

◆ q20

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q20[triton::size::dqword]
protected

Concrete value of q20.

Definition at line 195 of file aarch64Cpu.hpp.

◆ q21

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q21[triton::size::dqword]
protected

Concrete value of q21.

Definition at line 197 of file aarch64Cpu.hpp.

◆ q22

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q22[triton::size::dqword]
protected

Concrete value of q22.

Definition at line 199 of file aarch64Cpu.hpp.

◆ q23

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q23[triton::size::dqword]
protected

Concrete value of q23.

Definition at line 201 of file aarch64Cpu.hpp.

◆ q24

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q24[triton::size::dqword]
protected

Concrete value of q24.

Definition at line 203 of file aarch64Cpu.hpp.

◆ q25

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q25[triton::size::dqword]
protected

Concrete value of q25.

Definition at line 205 of file aarch64Cpu.hpp.

◆ q26

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q26[triton::size::dqword]
protected

Concrete value of q26.

Definition at line 207 of file aarch64Cpu.hpp.

◆ q27

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q27[triton::size::dqword]
protected

Concrete value of q27.

Definition at line 209 of file aarch64Cpu.hpp.

◆ q28

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q28[triton::size::dqword]
protected

Concrete value of q28.

Definition at line 211 of file aarch64Cpu.hpp.

◆ q29

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q29[triton::size::dqword]
protected

Concrete value of q29.

Definition at line 213 of file aarch64Cpu.hpp.

◆ q3

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q3[triton::size::dqword]
protected

Concrete value of q3.

Definition at line 161 of file aarch64Cpu.hpp.

◆ q30

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q30[triton::size::dqword]
protected

Concrete value of q30.

Definition at line 215 of file aarch64Cpu.hpp.

◆ q31

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q31[triton::size::dqword]
protected

Concrete value of q31.

Definition at line 217 of file aarch64Cpu.hpp.

◆ q4

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q4[triton::size::dqword]
protected

Concrete value of q4.

Definition at line 163 of file aarch64Cpu.hpp.

◆ q5

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q5[triton::size::dqword]
protected

Concrete value of q5.

Definition at line 165 of file aarch64Cpu.hpp.

◆ q6

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q6[triton::size::dqword]
protected

Concrete value of q6.

Definition at line 167 of file aarch64Cpu.hpp.

◆ q7

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q7[triton::size::dqword]
protected

Concrete value of q7.

Definition at line 169 of file aarch64Cpu.hpp.

◆ q8

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q8[triton::size::dqword]
protected

Concrete value of q8.

Definition at line 171 of file aarch64Cpu.hpp.

◆ q9

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::q9[triton::size::dqword]
protected

Concrete value of q9.

Definition at line 173 of file aarch64Cpu.hpp.

◆ sp

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::sp[triton::size::qword]
protected

Concrete value of sp.

Definition at line 219 of file aarch64Cpu.hpp.

◆ spsr

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::spsr[triton::size::dword]
protected

Concrete value of spsr.

Definition at line 223 of file aarch64Cpu.hpp.

◆ x0

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x0[triton::size::qword]
protected

Concrete value of x0.

Definition at line 93 of file aarch64Cpu.hpp.

◆ x1

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x1[triton::size::qword]
protected

Concrete value of x1.

Definition at line 95 of file aarch64Cpu.hpp.

◆ x10

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x10[triton::size::qword]
protected

Concrete value of x10.

Definition at line 113 of file aarch64Cpu.hpp.

◆ x11

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x11[triton::size::qword]
protected

Concrete value of x11.

Definition at line 115 of file aarch64Cpu.hpp.

◆ x12

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x12[triton::size::qword]
protected

Concrete value of x12.

Definition at line 117 of file aarch64Cpu.hpp.

◆ x13

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x13[triton::size::qword]
protected

Concrete value of x13.

Definition at line 119 of file aarch64Cpu.hpp.

◆ x14

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x14[triton::size::qword]
protected

Concrete value of x14.

Definition at line 121 of file aarch64Cpu.hpp.

◆ x15

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x15[triton::size::qword]
protected

Concrete value of x15.

Definition at line 123 of file aarch64Cpu.hpp.

◆ x16

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x16[triton::size::qword]
protected

Concrete value of x16.

Definition at line 125 of file aarch64Cpu.hpp.

◆ x17

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x17[triton::size::qword]
protected

Concrete value of x17.

Definition at line 127 of file aarch64Cpu.hpp.

◆ x18

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x18[triton::size::qword]
protected

Concrete value of x18.

Definition at line 129 of file aarch64Cpu.hpp.

◆ x19

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x19[triton::size::qword]
protected

Concrete value of x19.

Definition at line 131 of file aarch64Cpu.hpp.

◆ x2

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x2[triton::size::qword]
protected

Concrete value of x2.

Definition at line 97 of file aarch64Cpu.hpp.

◆ x20

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x20[triton::size::qword]
protected

Concrete value of x20.

Definition at line 133 of file aarch64Cpu.hpp.

◆ x21

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x21[triton::size::qword]
protected

Concrete value of x21.

Definition at line 135 of file aarch64Cpu.hpp.

◆ x22

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x22[triton::size::qword]
protected

Concrete value of x22.

Definition at line 137 of file aarch64Cpu.hpp.

◆ x23

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x23[triton::size::qword]
protected

Concrete value of x23.

Definition at line 139 of file aarch64Cpu.hpp.

◆ x24

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x24[triton::size::qword]
protected

Concrete value of x24.

Definition at line 141 of file aarch64Cpu.hpp.

◆ x25

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x25[triton::size::qword]
protected

Concrete value of x25.

Definition at line 143 of file aarch64Cpu.hpp.

◆ x26

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x26[triton::size::qword]
protected

Concrete value of x26.

Definition at line 145 of file aarch64Cpu.hpp.

◆ x27

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x27[triton::size::qword]
protected

Concrete value of x27.

Definition at line 147 of file aarch64Cpu.hpp.

◆ x28

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x28[triton::size::qword]
protected

Concrete value of x28.

Definition at line 149 of file aarch64Cpu.hpp.

◆ x29

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x29[triton::size::qword]
protected

Concrete value of x29.

Definition at line 151 of file aarch64Cpu.hpp.

◆ x3

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x3[triton::size::qword]
protected

Concrete value of x3.

Definition at line 99 of file aarch64Cpu.hpp.

◆ x30

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x30[triton::size::qword]
protected

Concrete value of x30.

Definition at line 153 of file aarch64Cpu.hpp.

◆ x4

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x4[triton::size::qword]
protected

Concrete value of x4.

Definition at line 101 of file aarch64Cpu.hpp.

◆ x5

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x5[triton::size::qword]
protected

Concrete value of x5.

Definition at line 103 of file aarch64Cpu.hpp.

◆ x6

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x6[triton::size::qword]
protected

Concrete value of x6.

Definition at line 105 of file aarch64Cpu.hpp.

◆ x7

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x7[triton::size::qword]
protected

Concrete value of x7.

Definition at line 107 of file aarch64Cpu.hpp.

◆ x8

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x8[triton::size::qword]
protected

Concrete value of x8.

Definition at line 109 of file aarch64Cpu.hpp.

◆ x9

triton::uint8 triton::arch::arm::aarch64::AArch64Cpu::x9[triton::size::qword]
protected

Concrete value of x9.

Definition at line 111 of file aarch64Cpu.hpp.


The documentation for this class was generated from the following files: