libTriton version 1.0 build 1592
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This class is used to describe the ARM (64-bits) spec. More...
#include <aarch64Cpu.hpp>
Public Member Functions | |
TRITON_EXPORT | AArch64Cpu (triton::callbacks::Callbacks *callbacks=nullptr) |
Constructor. | |
TRITON_EXPORT | AArch64Cpu (const AArch64Cpu &other) |
Constructor. | |
virtual TRITON_EXPORT | ~AArch64Cpu () |
Destructor. | |
TRITON_EXPORT AArch64Cpu & | operator= (const AArch64Cpu &other) |
Copies a AArch64Cpu class. | |
TRITON_EXPORT bool | isGPR (triton::arch::register_e regId) const |
Returns true if regId is a GRP. | |
TRITON_EXPORT bool | isScalarRegister (triton::arch::register_e regId) const |
Returns true if regId is a scalar register. | |
TRITON_EXPORT bool | isVectorRegister (triton::arch::register_e regId) const |
Returns true if regId is a vector register. | |
TRITON_EXPORT bool | isSystemRegister (triton::arch::register_e regId) const |
Returns true if regId is a system register. | |
TRITON_EXPORT bool | isFlag (triton::arch::register_e regId) const |
Returns true if the register ID is a flag. | |
TRITON_EXPORT bool | isRegister (triton::arch::register_e regId) const |
Returns true if the register ID is a register. | |
TRITON_EXPORT bool | isRegisterValid (triton::arch::register_e regId) const |
Returns true if the register ID is valid. | |
TRITON_EXPORT bool | isThumb (void) const |
Returns true if the execution mode is Thumb. Only useful for Arm32. | |
TRITON_EXPORT bool | isMemoryExclusive (const triton::arch::MemoryAccess &mem) const |
Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64. | |
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & | getAllRegisters (void) const |
Returns all registers. | |
TRITON_EXPORT const std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > & | getConcreteMemory (void) const |
Return all memory. | |
TRITON_EXPORT const triton::arch::Register & | getParentRegister (const triton::arch::Register ®) const |
Returns parent register from a given one. | |
TRITON_EXPORT const triton::arch::Register & | getParentRegister (triton::arch::register_e id) const |
Returns parent register from a given one. | |
TRITON_EXPORT const triton::arch::Register & | getProgramCounter (void) const |
Returns the program counter register. | |
TRITON_EXPORT const triton::arch::Register & | getRegister (triton::arch::register_e id) const |
Returns register from id. | |
TRITON_EXPORT const triton::arch::Register & | getRegister (const std::string &name) const |
Returns register from name. | |
TRITON_EXPORT const triton::arch::Register & | getStackPointer (void) const |
Returns the stack pointer register. | |
TRITON_EXPORT std::set< const triton::arch::Register * > | getParentRegisters (void) const |
Returns all parent registers. | |
TRITON_EXPORT std::vector< triton::uint8 > | getConcreteMemoryAreaValue (triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const |
Returns the concrete value of a memory area. | |
TRITON_EXPORT triton::arch::endianness_e | getEndianness (void) const |
Returns the kind of endianness as triton::arch::endianness_e. | |
TRITON_EXPORT triton::uint32 | gprBitSize (void) const |
Returns the bit in bit of the General Purpose Registers. | |
TRITON_EXPORT triton::uint32 | gprSize (void) const |
Returns the bit in byte of the General Purpose Registers. | |
TRITON_EXPORT triton::uint32 | numberOfRegisters (void) const |
Returns the number of registers according to the CPU architecture. | |
TRITON_EXPORT triton::uint512 | getConcreteMemoryValue (const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const |
Returns the concrete value of memory cells. | |
TRITON_EXPORT triton::uint512 | getConcreteRegisterValue (const triton::arch::Register ®, bool execCallbacks=true) const |
Returns the concrete value of a register. | |
TRITON_EXPORT triton::uint8 | getConcreteMemoryValue (triton::uint64 addr, bool execCallbacks=true) const |
Returns the concrete value of a memory cell. | |
TRITON_EXPORT void | clear (void) |
Clears the architecture states (registers and memory). | |
TRITON_EXPORT void | disassembly (triton::arch::Instruction &inst) |
Disassembles the instruction according to the architecture. | |
TRITON_EXPORT void | setConcreteMemoryAreaValue (triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true) |
[architecture api] - Sets the concrete value of a memory area. | |
TRITON_EXPORT void | setConcreteMemoryAreaValue (triton::uint64 baseAddr, const void *area, triton::usize size, bool execCallbacks=true) |
[architecture api] - Sets the concrete value of a memory area. | |
TRITON_EXPORT void | setConcreteMemoryValue (const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true) |
[architecture api] - Sets the concrete value of memory cells. | |
TRITON_EXPORT void | setConcreteMemoryValue (triton::uint64 addr, triton::uint8 value, bool execCallbacks=true) |
[architecture api] - Sets the concrete value of a memory cell. | |
TRITON_EXPORT void | setConcreteRegisterValue (const triton::arch::Register ®, const triton::uint512 &value, bool execCallbacks=true) |
[architecture api] - Sets the concrete value of a register. | |
TRITON_EXPORT void | setThumb (bool state) |
Sets CPU state to Thumb mode. | |
TRITON_EXPORT void | setMemoryExclusiveTag (const triton::arch::MemoryAccess &mem, bool tag) |
Sets exclusive memory access tag. Only valid for Arm32 and AArch64. | |
TRITON_EXPORT bool | isConcreteMemoryValueDefined (const triton::arch::MemoryAccess &mem) const |
Returns true if memory cells have a defined concrete value. | |
TRITON_EXPORT bool | isConcreteMemoryValueDefined (triton::uint64 baseAddr, triton::usize size=1) const |
Returns true if memory cells have a defined concrete value. | |
TRITON_EXPORT void | clearConcreteMemoryValue (const triton::arch::MemoryAccess &mem) |
Clears concrete values assigned to the memory cells. | |
TRITON_EXPORT void | clearConcreteMemoryValue (triton::uint64 baseAddr, triton::usize size=1) |
Clears concrete values assigned to the memory cells. | |
Public Member Functions inherited from triton::arch::CpuInterface | |
virtual TRITON_EXPORT | ~CpuInterface () |
Destructor. | |
Public Member Functions inherited from triton::arch::arm::aarch64::AArch64Specifications | |
TRITON_EXPORT | AArch64Specifications (triton::arch::architecture_e) |
Constructor. | |
TRITON_EXPORT triton::arch::register_e | capstoneRegisterToTritonRegister (triton::uint32 id) const |
Converts a capstone's register id to a triton's register id. | |
TRITON_EXPORT triton::arch::arm::shift_e | capstoneShiftToTritonShift (triton::uint32 id) const |
Converts a capstone's shift id to a triton's shift id. | |
TRITON_EXPORT triton::arch::arm::extend_e | capstoneExtendToTritonExtend (triton::uint32 id) const |
Converts a capstone's extend id to a triton's extend id. | |
TRITON_EXPORT triton::arch::arm::condition_e | capstoneConditionToTritonCondition (triton::uint32 id) const |
Converts a capstone's condition id to a triton's condition id. | |
TRITON_EXPORT triton::arch::arm::vas_e | capstoneVASToTritonVAS (triton::uint32 id) const |
Converts a capstone's vas id to a triton's vas id. | |
TRITON_EXPORT triton::uint32 | capstoneInstructionToTritonInstruction (triton::uint32 id) const |
Converts a capstone's instruction id to a triton's instruction id. | |
TRITON_EXPORT triton::uint32 | getMemoryOperandSpecialSize (triton::uint32 id) const |
Returns memory access size if it is specified by instruction. | |
This class is used to describe the ARM (64-bits) spec.
Definition at line 61 of file aarch64Cpu.hpp.
triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu | ( | triton::callbacks::Callbacks * | callbacks = nullptr | ) |
Constructor.
Definition at line 27 of file aarch64Cpu.cpp.
triton::arch::arm::aarch64::AArch64Cpu::AArch64Cpu | ( | const AArch64Cpu & | other | ) |
Constructor.
Definition at line 36 of file aarch64Cpu.cpp.
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Destructor.
Definition at line 41 of file aarch64Cpu.cpp.
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Clears the architecture states (registers and memory).
System registers
Implements triton::arch::CpuInterface.
Definition at line 142 of file aarch64Cpu.cpp.
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Clears concrete values assigned to the memory cells.
Implements triton::arch::CpuInterface.
Definition at line 1297 of file aarch64Cpu.cpp.
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Clears concrete values assigned to the memory cells.
Implements triton::arch::CpuInterface.
Definition at line 1302 of file aarch64Cpu.cpp.
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Disassembles the instruction according to the architecture.
Implements triton::arch::CpuInterface.
Definition at line 369 of file aarch64Cpu.cpp.
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Returns all registers.
Implements triton::arch::CpuInterface.
Definition at line 284 of file aarch64Cpu.cpp.
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Return all memory.
Implements triton::arch::CpuInterface.
Definition at line 288 of file aarch64Cpu.cpp.
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Returns the concrete value of a memory area.
Implements triton::arch::CpuInterface.
Definition at line 595 of file aarch64Cpu.cpp.
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Returns the concrete value of memory cells.
Implements triton::arch::CpuInterface.
Definition at line 574 of file aarch64Cpu.cpp.
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Returns the concrete value of a memory cell.
Implements triton::arch::CpuInterface.
Definition at line 562 of file aarch64Cpu.cpp.
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Returns the concrete value of a register.
System registers
Implements triton::arch::CpuInterface.
Definition at line 605 of file aarch64Cpu.cpp.
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Returns the kind of endianness as triton::arch::endianness_e.
Implements triton::arch::CpuInterface.
Definition at line 229 of file aarch64Cpu.cpp.
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Returns parent register from a given one.
Implements triton::arch::CpuInterface.
Definition at line 349 of file aarch64Cpu.cpp.
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Returns parent register from a given one.
Implements triton::arch::CpuInterface.
Definition at line 354 of file aarch64Cpu.cpp.
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Returns all parent registers.
Implements triton::arch::CpuInterface.
Definition at line 293 of file aarch64Cpu.cpp.
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Returns the program counter register.
Implements triton::arch::CpuInterface.
Definition at line 359 of file aarch64Cpu.cpp.
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Returns register from name.
Implements triton::arch::CpuInterface.
Definition at line 338 of file aarch64Cpu.cpp.
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Returns register from id.
Implements triton::arch::CpuInterface.
Definition at line 329 of file aarch64Cpu.cpp.
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Returns the stack pointer register.
Implements triton::arch::CpuInterface.
Definition at line 364 of file aarch64Cpu.cpp.
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Returns the bit in bit of the General Purpose Registers.
Implements triton::arch::CpuInterface.
Definition at line 279 of file aarch64Cpu.cpp.
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Returns the bit in byte of the General Purpose Registers.
Implements triton::arch::CpuInterface.
Definition at line 274 of file aarch64Cpu.cpp.
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Returns true if memory cells have a defined concrete value.
Implements triton::arch::CpuInterface.
Definition at line 1283 of file aarch64Cpu.cpp.
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Returns true if memory cells have a defined concrete value.
Implements triton::arch::CpuInterface.
Definition at line 1288 of file aarch64Cpu.cpp.
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Returns true if the register ID is a flag.
Implements triton::arch::CpuInterface.
Definition at line 234 of file aarch64Cpu.cpp.
bool triton::arch::arm::aarch64::AArch64Cpu::isGPR | ( | triton::arch::register_e | regId | ) | const |
Returns true if regId is a GRP.
Definition at line 249 of file aarch64Cpu.cpp.
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Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
Implements triton::arch::CpuInterface.
Definition at line 1256 of file aarch64Cpu.cpp.
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Returns true if the register ID is a register.
Implements triton::arch::CpuInterface.
Definition at line 239 of file aarch64Cpu.cpp.
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Returns true if the register ID is valid.
Implements triton::arch::CpuInterface.
Definition at line 244 of file aarch64Cpu.cpp.
bool triton::arch::arm::aarch64::AArch64Cpu::isScalarRegister | ( | triton::arch::register_e | regId | ) | const |
Returns true if regId is a scalar register.
Definition at line 254 of file aarch64Cpu.cpp.
bool triton::arch::arm::aarch64::AArch64Cpu::isSystemRegister | ( | triton::arch::register_e | regId | ) | const |
Returns true if regId is a system register.
Definition at line 264 of file aarch64Cpu.cpp.
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Returns true if the execution mode is Thumb. Only useful for Arm32.
Implements triton::arch::CpuInterface.
Definition at line 1245 of file aarch64Cpu.cpp.
bool triton::arch::arm::aarch64::AArch64Cpu::isVectorRegister | ( | triton::arch::register_e | regId | ) | const |
Returns true if regId is a vector register.
Definition at line 259 of file aarch64Cpu.cpp.
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Returns the number of registers according to the CPU architecture.
Implements triton::arch::CpuInterface.
Definition at line 269 of file aarch64Cpu.cpp.
AArch64Cpu & triton::arch::arm::aarch64::AArch64Cpu::operator= | ( | const AArch64Cpu & | other | ) |
Copies a AArch64Cpu class.
Definition at line 223 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a memory area.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 920 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a memory area.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 928 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of memory cells.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 899 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a memory cell.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
Implements triton::arch::CpuInterface.
Definition at line 892 of file aarch64Cpu.cpp.
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[architecture api] - Sets the concrete value of a register.
Note that by setting a concrete value will probably imply a desynchronization with the symbolic state (if it exists). You should probably use the concretize functions after this.
System registers
Implements triton::arch::CpuInterface.
Definition at line 936 of file aarch64Cpu.cpp.
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Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
Implements triton::arch::CpuInterface.
Definition at line 1269 of file aarch64Cpu.cpp.
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Sets CPU state to Thumb mode.
Implements triton::arch::CpuInterface.
Definition at line 1251 of file aarch64Cpu.cpp.
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map of address -> concrete value
item1: memory address
item2: concrete value
Definition at line 90 of file aarch64Cpu.hpp.
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Concrete value of pc.
Definition at line 221 of file aarch64Cpu.hpp.
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Concrete value of q0.
Definition at line 155 of file aarch64Cpu.hpp.
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Concrete value of q1.
Definition at line 157 of file aarch64Cpu.hpp.
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Concrete value of q10.
Definition at line 175 of file aarch64Cpu.hpp.
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Concrete value of q11.
Definition at line 177 of file aarch64Cpu.hpp.
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Concrete value of q12.
Definition at line 179 of file aarch64Cpu.hpp.
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Concrete value of q13.
Definition at line 181 of file aarch64Cpu.hpp.
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Concrete value of q14.
Definition at line 183 of file aarch64Cpu.hpp.
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Concrete value of q15.
Definition at line 185 of file aarch64Cpu.hpp.
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Concrete value of q16.
Definition at line 187 of file aarch64Cpu.hpp.
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Concrete value of q17.
Definition at line 189 of file aarch64Cpu.hpp.
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Concrete value of q18.
Definition at line 191 of file aarch64Cpu.hpp.
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Concrete value of q19.
Definition at line 193 of file aarch64Cpu.hpp.
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Concrete value of q2.
Definition at line 159 of file aarch64Cpu.hpp.
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Concrete value of q20.
Definition at line 195 of file aarch64Cpu.hpp.
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Concrete value of q21.
Definition at line 197 of file aarch64Cpu.hpp.
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Concrete value of q22.
Definition at line 199 of file aarch64Cpu.hpp.
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Concrete value of q23.
Definition at line 201 of file aarch64Cpu.hpp.
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Concrete value of q24.
Definition at line 203 of file aarch64Cpu.hpp.
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Concrete value of q25.
Definition at line 205 of file aarch64Cpu.hpp.
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Concrete value of q26.
Definition at line 207 of file aarch64Cpu.hpp.
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Concrete value of q27.
Definition at line 209 of file aarch64Cpu.hpp.
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Concrete value of q28.
Definition at line 211 of file aarch64Cpu.hpp.
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Concrete value of q29.
Definition at line 213 of file aarch64Cpu.hpp.
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Concrete value of q3.
Definition at line 161 of file aarch64Cpu.hpp.
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Concrete value of q30.
Definition at line 215 of file aarch64Cpu.hpp.
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Concrete value of q31.
Definition at line 217 of file aarch64Cpu.hpp.
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Concrete value of q4.
Definition at line 163 of file aarch64Cpu.hpp.
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Concrete value of q5.
Definition at line 165 of file aarch64Cpu.hpp.
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Concrete value of q6.
Definition at line 167 of file aarch64Cpu.hpp.
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Concrete value of q7.
Definition at line 169 of file aarch64Cpu.hpp.
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Concrete value of q8.
Definition at line 171 of file aarch64Cpu.hpp.
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Concrete value of q9.
Definition at line 173 of file aarch64Cpu.hpp.
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Concrete value of sp.
Definition at line 219 of file aarch64Cpu.hpp.
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Concrete value of spsr.
Definition at line 223 of file aarch64Cpu.hpp.
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Concrete value of x0.
Definition at line 93 of file aarch64Cpu.hpp.
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Concrete value of x1.
Definition at line 95 of file aarch64Cpu.hpp.
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Concrete value of x10.
Definition at line 113 of file aarch64Cpu.hpp.
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Concrete value of x11.
Definition at line 115 of file aarch64Cpu.hpp.
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Concrete value of x12.
Definition at line 117 of file aarch64Cpu.hpp.
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Concrete value of x13.
Definition at line 119 of file aarch64Cpu.hpp.
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Concrete value of x14.
Definition at line 121 of file aarch64Cpu.hpp.
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Concrete value of x15.
Definition at line 123 of file aarch64Cpu.hpp.
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Concrete value of x16.
Definition at line 125 of file aarch64Cpu.hpp.
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Concrete value of x17.
Definition at line 127 of file aarch64Cpu.hpp.
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Concrete value of x18.
Definition at line 129 of file aarch64Cpu.hpp.
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Concrete value of x19.
Definition at line 131 of file aarch64Cpu.hpp.
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Concrete value of x2.
Definition at line 97 of file aarch64Cpu.hpp.
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Concrete value of x20.
Definition at line 133 of file aarch64Cpu.hpp.
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Concrete value of x21.
Definition at line 135 of file aarch64Cpu.hpp.
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Concrete value of x22.
Definition at line 137 of file aarch64Cpu.hpp.
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Concrete value of x23.
Definition at line 139 of file aarch64Cpu.hpp.
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Concrete value of x24.
Definition at line 141 of file aarch64Cpu.hpp.
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Concrete value of x25.
Definition at line 143 of file aarch64Cpu.hpp.
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Concrete value of x26.
Definition at line 145 of file aarch64Cpu.hpp.
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Concrete value of x27.
Definition at line 147 of file aarch64Cpu.hpp.
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Concrete value of x28.
Definition at line 149 of file aarch64Cpu.hpp.
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Concrete value of x29.
Definition at line 151 of file aarch64Cpu.hpp.
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Concrete value of x3.
Definition at line 99 of file aarch64Cpu.hpp.
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Concrete value of x30.
Definition at line 153 of file aarch64Cpu.hpp.
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Concrete value of x4.
Definition at line 101 of file aarch64Cpu.hpp.
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Concrete value of x5.
Definition at line 103 of file aarch64Cpu.hpp.
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Concrete value of x6.
Definition at line 105 of file aarch64Cpu.hpp.
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Concrete value of x7.
Definition at line 107 of file aarch64Cpu.hpp.
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Concrete value of x8.
Definition at line 109 of file aarch64Cpu.hpp.
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Concrete value of x9.
Definition at line 111 of file aarch64Cpu.hpp.