8#ifndef TRITON_ARM32CPU_HPP
9#define TRITON_ARM32CPU_HPP
13#include <unordered_map>
71 std::size_t handleArm;
74 std::size_t handleThumb;
92 std::set<triton::uint64> exclusiveMemoryTags;
98 inline void disassInit(
void);
114 std::unordered_map<triton::uint64, triton::uint8, IdentityHash<triton::uint64>>
memory;
174 TRITON_EXPORT
bool isThumb(
void)
const;
176 TRITON_EXPORT
const std::unordered_map<triton::arch::register_e, const triton::arch::Register>&
getAllRegisters(
void)
const;
177 TRITON_EXPORT
const std::unordered_map<triton::uint64, triton::uint8, IdentityHash<triton::uint64>>&
getConcreteMemory(
void)
const;
193 TRITON_EXPORT
void clear(
void);
200 TRITON_EXPORT
void setThumb(
bool state);
This interface is used as abstract CPU interface. All CPU must use this interface.
This class is used to represent an instruction.
This class is used to represent a memory access.
This class is used when an instruction has a register operand.
This class is used to describe the ARM (32-bits) spec.
TRITON_EXPORT void setMemoryExclusiveTag(const triton::arch::MemoryAccess &mem, bool tag)
Sets exclusive memory access tag. Only valid for Arm32 and AArch64.
TRITON_EXPORT std::set< const triton::arch::Register * > getParentRegisters(void) const
Returns all parent registers.
triton::uint8 r2[triton::size::dword]
Concrete value of r2.
TRITON_EXPORT const std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > & getConcreteMemory(void) const
Return all memory.
TRITON_EXPORT triton::uint32 gprSize(void) const
Returns the bit in byte of the General Purpose Registers.
triton::uint8 pc[triton::size::dword]
Concrete value of pc.
triton::uint8 r7[triton::size::dword]
Concrete value of r7.
triton::uint8 sp[triton::size::dword]
Concrete value of sp.
triton::uint8 r1[triton::size::dword]
Concrete value of r1.
TRITON_EXPORT const triton::arch::Register & getStackPointer(void) const
Returns the stack pointer register.
TRITON_EXPORT bool isGPR(triton::arch::register_e regId) const
Returns true if regId is a GRP.
TRITON_EXPORT triton::arch::endianness_e getEndianness(void) const
Returns the kind of endianness as triton::arch::endianness_e.
triton::uint8 r14[triton::size::dword]
Concrete value of r14.
TRITON_EXPORT void clearConcreteMemoryValue(const triton::arch::MemoryAccess &mem)
Clears concrete values assigned to the memory cells.
TRITON_EXPORT triton::uint512 getConcreteRegisterValue(const triton::arch::Register ®, bool execCallbacks=true) const
Returns the concrete value of a register.
triton::uint8 r6[triton::size::dword]
Concrete value of r6.
TRITON_EXPORT bool isFlag(triton::arch::register_e regId) const
Returns true if the register ID is a flag.
TRITON_EXPORT bool isConcreteMemoryValueDefined(const triton::arch::MemoryAccess &mem) const
Returns true if memory cells have a defined concrete value.
TRITON_EXPORT void setConcreteMemoryValue(const triton::arch::MemoryAccess &mem, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of memory cells.
TRITON_EXPORT bool isRegisterValid(triton::arch::register_e regId) const
Returns true if the register ID is valid.
TRITON_EXPORT bool isThumb(void) const
Returns true if the execution mode is Thumb. Only useful for Arm32.
TRITON_EXPORT const triton::arch::Register & getRegister(triton::arch::register_e id) const
Returns register from id.
TRITON_EXPORT const triton::arch::Register & getProgramCounter(void) const
Returns the program counter register.
virtual TRITON_EXPORT ~Arm32Cpu()
Destructor.
TRITON_EXPORT void clear(void)
Clears the architecture states (registers and memory).
bool thumb
Thumb mode flag.
std::unordered_map< triton::uint64, triton::uint8, IdentityHash< triton::uint64 > > memory
map of address -> concrete value
TRITON_EXPORT void disassembly(triton::arch::Instruction &inst)
Disassembles the instruction according to the architecture.
TRITON_EXPORT triton::uint32 gprBitSize(void) const
Returns the bit in bit of the General Purpose Registers.
TRITON_EXPORT Arm32Cpu(triton::callbacks::Callbacks *callbacks=nullptr)
Constructor.
triton::uint8 r5[triton::size::dword]
Concrete value of r5.
triton::uint8 r11[triton::size::dword]
Concrete value of r11.
triton::uint8 r8[triton::size::dword]
Concrete value of r8.
TRITON_EXPORT std::vector< triton::uint8 > getConcreteMemoryAreaValue(triton::uint64 baseAddr, triton::usize size, bool execCallbacks=true) const
Returns the concrete value of a memory area.
triton::uint8 r10[triton::size::dword]
Concrete value of r10.
TRITON_EXPORT triton::uint512 getConcreteMemoryValue(const triton::arch::MemoryAccess &mem, bool execCallbacks=true) const
Returns the concrete value of memory cells.
triton::uint8 r12[triton::size::dword]
Concrete value of r12.
TRITON_EXPORT bool isRegister(triton::arch::register_e regId) const
Returns true if the register ID is a register.
TRITON_EXPORT triton::uint32 numberOfRegisters(void) const
Returns the number of registers according to the CPU architecture.
TRITON_EXPORT Arm32Cpu & operator=(const Arm32Cpu &other)
Copies a Arm32Cpu class.
TRITON_EXPORT void setConcreteRegisterValue(const triton::arch::Register ®, const triton::uint512 &value, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a register.
TRITON_EXPORT const std::unordered_map< triton::arch::register_e, const triton::arch::Register > & getAllRegisters(void) const
Returns all registers.
TRITON_EXPORT const triton::arch::Register & getParentRegister(const triton::arch::Register ®) const
Returns parent register from a given one.
triton::uint8 r3[triton::size::dword]
Concrete value of r3.
TRITON_EXPORT bool isMemoryExclusive(const triton::arch::MemoryAccess &mem) const
Returns true if the given memory access is tagged as exclusive. Only valid for Arm32 and AArch64.
triton::uint8 r0[triton::size::dword]
Concrete value of r0.
TRITON_EXPORT void setThumb(bool state)
Sets CPU state to Thumb mode.
TRITON_EXPORT void setConcreteMemoryAreaValue(triton::uint64 baseAddr, const std::vector< triton::uint8 > &values, bool execCallbacks=true)
[architecture api] - Sets the concrete value of a memory area.
triton::uint8 r4[triton::size::dword]
Concrete value of r4.
triton::uint8 r9[triton::size::dword]
Concrete value of r9.
The Arm32Specifications class defines specifications about the Arm32 CPU.
register_e
Types of register.
condition_e
Types of condition.
constexpr triton::uint32 dword
dword size in byte
std::size_t usize
unsigned MAX_INT 32 or 64 bits according to the CPU.
std::uint64_t uint64
unisgned 64-bits
std::uint32_t uint32
unisgned 32-bits
std::uint8_t uint8
unisgned 8-bits